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drm/amdgpu: fix the fw size for sdma

For SDMA, if use the total size of SDMA TH0 and TH1 to allocate fw BO
may result to the ucode data overflow when copy ucode to BO as the PAGE
alignment.
IMU have the same issue.
Fix the above issue by alignment the fw size per fw ID.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Likun Gao and committed by
Alex Deucher
aca670e4 a76be7bb

+2 -2
+2 -2
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
··· 688 688 if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { 689 689 switch (ucode->ucode_id) { 690 690 case AMDGPU_UCODE_ID_SDMA_UCODE_TH0: 691 - ucode->ucode_size = le32_to_cpu(sdma_hdr->ctx_jt_offset + sdma_hdr->ctx_jt_size); 691 + ucode->ucode_size = le32_to_cpu(sdma_hdr->ctx_ucode_size_bytes); 692 692 ucode_addr = (u8 *)ucode->fw->data + 693 693 le32_to_cpu(sdma_hdr->header.ucode_array_offset_bytes); 694 694 break; 695 695 case AMDGPU_UCODE_ID_SDMA_UCODE_TH1: 696 - ucode->ucode_size = le32_to_cpu(sdma_hdr->ctl_jt_offset + sdma_hdr->ctl_jt_size); 696 + ucode->ucode_size = le32_to_cpu(sdma_hdr->ctl_ucode_size_bytes); 697 697 ucode_addr = (u8 *)ucode->fw->data + 698 698 le32_to_cpu(sdma_hdr->ctl_ucode_offset); 699 699 break;