Merge tag 'rtc-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

+62

Documentation/devicetree/bindings/rtc/amlogic,meson6-rtc.yaml

··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/rtc/amlogic,meson6-rtc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Amlogic Meson6, Meson8, Meson8b and Meson8m2 RTC 8 + 9 + maintainers: 10 + - Neil Armstrong <neil.armstrong@linaro.org> 11 + - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 12 + 13 + allOf: 14 + - $ref: rtc.yaml# 15 + - $ref: /schemas/nvmem/nvmem.yaml# 16 + 17 + properties: 18 + compatible: 19 + enum: 20 + - amlogic,meson6-rtc 21 + - amlogic,meson8-rtc 22 + - amlogic,meson8b-rtc 23 + - amlogic,meson8m2-rtc 24 + 25 + reg: 26 + maxItems: 1 27 + 28 + clocks: 29 + maxItems: 1 30 + 31 + interrupts: 32 + maxItems: 1 33 + 34 + resets: 35 + maxItems: 1 36 + 37 + vdd-supply: true 38 + 39 + required: 40 + - compatible 41 + - reg 42 + 43 + unevaluatedProperties: false 44 + 45 + examples: 46 + - | 47 + #include <dt-bindings/interrupt-controller/irq.h> 48 + #include <dt-bindings/interrupt-controller/arm-gic.h> 49 + rtc: rtc@740 { 50 + compatible = "amlogic,meson6-rtc"; 51 + reg = <0x740 0x14>; 52 + interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>; 53 + clocks = <&rtc32k_xtal>; 54 + vdd-supply = <&rtc_vdd>; 55 + resets = <&reset_rtc>; 56 + #address-cells = <1>; 57 + #size-cells = <1>; 58 + 59 + mac@0 { 60 + reg = <0 6>; 61 + }; 62 + };

-30

Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt

··· 1 - Haoyu Microelectronics HYM8563 Real Time Clock 2 - 3 - The HYM8563 provides basic rtc and alarm functionality 4 - as well as a clock output of up to 32kHz. 5 - 6 - Required properties: 7 - - compatible: should be: "haoyu,hym8563" 8 - - reg: i2c address 9 - - #clock-cells: the value should be 0 10 - 11 - Optional properties: 12 - - clock-output-names: From common clock binding 13 - - interrupts: rtc alarm/event interrupt 14 - 15 - Example: 16 - 17 - hym8563: hym8563@51 { 18 - compatible = "haoyu,hym8563"; 19 - reg = <0x51>; 20 - 21 - interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 22 - 23 - #clock-cells = <0>; 24 - }; 25 - 26 - device { 27 - ... 28 - clocks = <&hym8563>; 29 - ... 30 - };

+56

Documentation/devicetree/bindings/rtc/haoyu,hym8563.yaml

··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Haoyu Microelectronics HYM8563 RTC 8 + 9 + maintainers: 10 + - Alexandre Belloni <alexandre.belloni@bootlin.com> 11 + 12 + properties: 13 + compatible: 14 + const: haoyu,hym8563 15 + 16 + reg: 17 + maxItems: 1 18 + 19 + interrupts: 20 + maxItems: 1 21 + 22 + "#clock-cells": 23 + const: 0 24 + 25 + clock-output-names: 26 + description: From common clock binding to override the default output clock name. 27 + maxItems: 1 28 + 29 + wakeup-source: 30 + description: Enables wake up of host system on alarm. 31 + 32 + allOf: 33 + - $ref: rtc.yaml 34 + 35 + unevaluatedProperties: false 36 + 37 + required: 38 + - compatible 39 + - reg 40 + - "#clock-cells" 41 + 42 + examples: 43 + - | 44 + #include <dt-bindings/interrupt-controller/irq.h> 45 + 46 + i2c { 47 + #address-cells = <1>; 48 + #size-cells = <0>; 49 + 50 + rtc@51 { 51 + compatible = "haoyu,hym8563"; 52 + reg = <0x51>; 53 + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 54 + #clock-cells = <0>; 55 + }; 56 + };

+10 -6

Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml

··· 11 11 12 12 properties: 13 13 compatible: 14 - enum: 15 - - qcom,pm8058-rtc 16 - - qcom,pm8921-rtc 17 - - qcom,pm8941-rtc 18 - - qcom,pm8018-rtc 19 - - qcom,pmk8350-rtc 14 + oneOf: 15 + - enum: 16 + - qcom,pm8058-rtc 17 + - qcom,pm8921-rtc 18 + - qcom,pm8941-rtc 19 + - qcom,pmk8350-rtc 20 + - items: 21 + - enum: 22 + - qcom,pm8018-rtc 23 + - const: qcom,pm8921-rtc 20 24 21 25 reg: 22 26 minItems: 1

-39

Documentation/devicetree/bindings/rtc/rtc-m41t80.txt

··· 1 - ST M41T80 family of RTC and compatible 2 - 3 - Required properties: 4 - - compatible: should be one of: 5 - "st,m41t62", 6 - "st,m41t65", 7 - "st,m41t80", 8 - "st,m41t81", 9 - "st,m41t81s", 10 - "st,m41t82", 11 - "st,m41t83", 12 - "st,m41t84", 13 - "st,m41t85", 14 - "st,m41t87", 15 - "microcrystal,rv4162", 16 - - reg: I2C bus address of the device 17 - 18 - Optional properties: 19 - - interrupts: rtc alarm interrupt. 20 - - clock-output-names: From common clock binding to override the default output 21 - clock name 22 - - wakeup-source: Enables wake up of host system on alarm 23 - 24 - Optional child node: 25 - - clock: Provide this if the square wave pin is used as boot-enabled fixed clock. 26 - 27 - Example: 28 - rtc@68 { 29 - compatible = "st,m41t80"; 30 - reg = <0x68>; 31 - interrupt-parent = <&UIC0>; 32 - interrupts = <0x9 0x8>; 33 - 34 - clock { 35 - compatible = "fixed-clock"; 36 - #clock-cells = <0>; 37 - clock-frequency = <32768>; 38 - }; 39 - };

-35

Documentation/devicetree/bindings/rtc/rtc-meson.txt

··· 1 - * Amlogic Meson6, Meson8, Meson8b and Meson8m2 RTC 2 - 3 - Required properties: 4 - - compatible: should be one of the following describing the hardware: 5 - * "amlogic,meson6-rtc" 6 - * "amlogic,meson8-rtc" 7 - * "amlogic,meson8b-rtc" 8 - * "amlogic,meson8m2-rtc" 9 - 10 - - reg: physical register space for the controller's memory mapped registers. 11 - - interrupts: the interrupt line of the RTC block. 12 - - clocks: reference to the external 32.768kHz crystal oscillator. 13 - - vdd-supply: reference to the power supply of the RTC block. 14 - - resets: reset controller reference to allow reset of the controller 15 - 16 - Optional properties for the battery-backed non-volatile memory: 17 - - #address-cells: should be 1 to address the battery-backed non-volatile memory 18 - - #size-cells: should be 1 to reference the battery-backed non-volatile memory 19 - 20 - Optional child nodes: 21 - - see ../nvmem/nvmem.txt 22 - 23 - Example: 24 - 25 - rtc: rtc@740 { 26 - compatible = "amlogic,meson6-rtc"; 27 - reg = <0x740 0x14>; 28 - interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>; 29 - clocks = <&rtc32k_xtal>; 30 - vdd-supply = <&rtc_vdd>; 31 - resets = <&reset RESET_RTC>; 32 - 33 - #address-cells = <1>; 34 - #size-cells = <1>; 35 - };

+73

Documentation/devicetree/bindings/rtc/st,m41t80.yaml

··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/rtc/st,m41t80.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: ST M41T80 family of RTC and compatible 8 + 9 + maintainers: 10 + - Alexandre Belloni <alexandre.belloni@bootlin.com> 11 + 12 + properties: 13 + compatible: 14 + enum: 15 + - st,m41t62 16 + - st,m41t65 17 + - st,m41t80 18 + - st,m41t81 19 + - st,m41t81s 20 + - st,m41t82 21 + - st,m41t83 22 + - st,m41t84 23 + - st,m41t85 24 + - st,m41t87 25 + - microcrystal,rv4162 26 + 27 + reg: 28 + maxItems: 1 29 + 30 + interrupts: 31 + maxItems: 1 32 + 33 + "#clock-cells": 34 + const: 1 35 + 36 + clock-output-names: 37 + maxItems: 1 38 + description: From common clock binding to override the default output clock name. 39 + 40 + clock: 41 + type: object 42 + $ref: /schemas/clock/fixed-clock.yaml# 43 + properties: 44 + clock-frequency: 45 + const: 32768 46 + 47 + allOf: 48 + - $ref: rtc.yaml 49 + 50 + unevaluatedProperties: false 51 + 52 + required: 53 + - compatible 54 + - reg 55 + 56 + examples: 57 + - | 58 + i2c { 59 + #address-cells = <1>; 60 + #size-cells = <0>; 61 + rtc@68 { 62 + compatible = "st,m41t80"; 63 + reg = <0x68>; 64 + interrupt-parent = <&UIC0>; 65 + interrupts = <0x9 0x8>; 66 + 67 + clock { 68 + compatible = "fixed-clock"; 69 + #clock-cells = <0>; 70 + clock-frequency = <32768>; 71 + }; 72 + }; 73 + };

+1 -11

drivers/rtc/Kconfig

··· 433 433 434 434 config RTC_DRV_ISL12026 435 435 tristate "Intersil ISL12026" 436 - depends on OF || COMPILE_TEST 436 + depends on OF 437 437 help 438 438 If you say yes here you get support for the 439 439 Intersil ISL12026 RTC chip. ··· 1350 1350 1351 1351 This driver can also be built as a module. If so, the module 1352 1352 will be called rtc-asm9260. 1353 - 1354 - config RTC_DRV_DAVINCI 1355 - tristate "TI DaVinci RTC" 1356 - depends on ARCH_DAVINCI_DM365 || COMPILE_TEST 1357 - help 1358 - If you say yes here you get support for the RTC on the 1359 - DaVinci platforms (DM365). 1360 - 1361 - This driver can also be built as a module. If so, the module 1362 - will be called rtc-davinci. 1363 1353 1364 1354 config RTC_DRV_DIGICOLOR 1365 1355 tristate "Conexant Digicolor RTC"

-1

drivers/rtc/Makefile

··· 44 44 obj-$(CONFIG_RTC_DRV_DA9052) += rtc-da9052.o 45 45 obj-$(CONFIG_RTC_DRV_DA9055) += rtc-da9055.o 46 46 obj-$(CONFIG_RTC_DRV_DA9063) += rtc-da9063.o 47 - obj-$(CONFIG_RTC_DRV_DAVINCI) += rtc-davinci.o 48 47 obj-$(CONFIG_RTC_DRV_DIGICOLOR) += rtc-digicolor.o 49 48 obj-$(CONFIG_RTC_DRV_DM355EVM) += rtc-dm355evm.o 50 49 obj-$(CONFIG_RTC_DRV_DS1216) += rtc-ds1216.o

+2 -2

drivers/rtc/class.c

··· 374 374 375 375 rtc->id = id; 376 376 rtc->dev.parent = dev; 377 - err = dev_set_name(&rtc->dev, "rtc%d", id); 377 + err = devm_add_action_or_reset(dev, devm_rtc_release_device, rtc); 378 378 if (err) 379 379 return ERR_PTR(err); 380 380 381 - err = devm_add_action_or_reset(dev, devm_rtc_release_device, rtc); 381 + err = dev_set_name(&rtc->dev, "rtc%d", id); 382 382 if (err) 383 383 return ERR_PTR(err); 384 384

+1 -1

drivers/rtc/interface.c

··· 256 256 * 257 257 * This could all instead be done in the lower level driver, 258 258 * but since more than one lower level RTC implementation needs it, 259 - * then it's probably best best to do it here instead of there.. 259 + * then it's probably best to do it here instead of there.. 260 260 */ 261 261 262 262 /* Get the "before" timestamp */

+19 -18

drivers/rtc/rtc-abx80x.c

··· 12 12 13 13 #include <linux/bcd.h> 14 14 #include <linux/i2c.h> 15 + #include <linux/kstrtox.h> 15 16 #include <linux/module.h> 16 17 #include <linux/of_device.h> 17 18 #include <linux/rtc.h> ··· 674 673 } 675 674 #endif 676 675 677 - static int abx80x_probe(struct i2c_client *client, 678 - const struct i2c_device_id *id) 676 + static const struct i2c_device_id abx80x_id[] = { 677 + { "abx80x", ABX80X }, 678 + { "ab0801", AB0801 }, 679 + { "ab0803", AB0803 }, 680 + { "ab0804", AB0804 }, 681 + { "ab0805", AB0805 }, 682 + { "ab1801", AB1801 }, 683 + { "ab1803", AB1803 }, 684 + { "ab1804", AB1804 }, 685 + { "ab1805", AB1805 }, 686 + { "rv1805", RV1805 }, 687 + { } 688 + }; 689 + MODULE_DEVICE_TABLE(i2c, abx80x_id); 690 + 691 + static int abx80x_probe(struct i2c_client *client) 679 692 { 680 693 struct device_node *np = client->dev.of_node; 681 694 struct abx80x_priv *priv; 682 695 int i, data, err, trickle_cfg = -EINVAL; 683 696 char buf[7]; 697 + const struct i2c_device_id *id = i2c_match_id(abx80x_id, client); 684 698 unsigned int part = id->driver_data; 685 699 unsigned int partnumber; 686 700 unsigned int majrev, minrev; ··· 863 847 return devm_rtc_register_device(priv->rtc); 864 848 } 865 849 866 - static const struct i2c_device_id abx80x_id[] = { 867 - { "abx80x", ABX80X }, 868 - { "ab0801", AB0801 }, 869 - { "ab0803", AB0803 }, 870 - { "ab0804", AB0804 }, 871 - { "ab0805", AB0805 }, 872 - { "ab1801", AB1801 }, 873 - { "ab1803", AB1803 }, 874 - { "ab1804", AB1804 }, 875 - { "ab1805", AB1805 }, 876 - { "rv1805", RV1805 }, 877 - { } 878 - }; 879 - MODULE_DEVICE_TABLE(i2c, abx80x_id); 880 - 881 850 #ifdef CONFIG_OF 882 851 static const struct of_device_id abx80x_of_match[] = { 883 852 { ··· 915 914 .name = "rtc-abx80x", 916 915 .of_match_table = of_match_ptr(abx80x_of_match), 917 916 }, 918 - .probe = abx80x_probe, 917 + .probe_new = abx80x_probe, 919 918 .id_table = abx80x_id, 920 919 }; 921 920

+1 -1

drivers/rtc/rtc-at91rm9200.c

··· 130 130 * 131 131 * Note that there is still a possibility that the mask is updated 132 132 * before interrupts have actually been disabled in hardware. The only 133 - * way to be certain would be to poll the IMR-register, which is is 133 + * way to be certain would be to poll the IMR-register, which is 134 134 * the very register we are trying to emulate. The register read back 135 135 * is a reasonable heuristic. 136 136 */

+1

drivers/rtc/rtc-bq32k.c

··· 13 13 #include <linux/i2c.h> 14 14 #include <linux/rtc.h> 15 15 #include <linux/init.h> 16 + #include <linux/kstrtox.h> 16 17 #include <linux/errno.h> 17 18 #include <linux/bcd.h> 18 19

+190 -188

drivers/rtc/rtc-cmos.c

··· 744 744 return IRQ_NONE; 745 745 } 746 746 747 + #ifdef CONFIG_ACPI 748 + 749 + #include <linux/acpi.h> 750 + 751 + static u32 rtc_handler(void *context) 752 + { 753 + struct device *dev = context; 754 + struct cmos_rtc *cmos = dev_get_drvdata(dev); 755 + unsigned char rtc_control = 0; 756 + unsigned char rtc_intr; 757 + unsigned long flags; 758 + 759 + 760 + /* 761 + * Always update rtc irq when ACPI is used as RTC Alarm. 762 + * Or else, ACPI SCI is enabled during suspend/resume only, 763 + * update rtc irq in that case. 764 + */ 765 + if (cmos_use_acpi_alarm()) 766 + cmos_interrupt(0, (void *)cmos->rtc); 767 + else { 768 + /* Fix me: can we use cmos_interrupt() here as well? */ 769 + spin_lock_irqsave(&rtc_lock, flags); 770 + if (cmos_rtc.suspend_ctrl) 771 + rtc_control = CMOS_READ(RTC_CONTROL); 772 + if (rtc_control & RTC_AIE) { 773 + cmos_rtc.suspend_ctrl &= ~RTC_AIE; 774 + CMOS_WRITE(rtc_control, RTC_CONTROL); 775 + rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 776 + rtc_update_irq(cmos->rtc, 1, rtc_intr); 777 + } 778 + spin_unlock_irqrestore(&rtc_lock, flags); 779 + } 780 + 781 + pm_wakeup_hard_event(dev); 782 + acpi_clear_event(ACPI_EVENT_RTC); 783 + acpi_disable_event(ACPI_EVENT_RTC, 0); 784 + return ACPI_INTERRUPT_HANDLED; 785 + } 786 + 787 + static void acpi_rtc_event_setup(struct device *dev) 788 + { 789 + if (acpi_disabled) 790 + return; 791 + 792 + acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 793 + /* 794 + * After the RTC handler is installed, the Fixed_RTC event should 795 + * be disabled. Only when the RTC alarm is set will it be enabled. 796 + */ 797 + acpi_clear_event(ACPI_EVENT_RTC); 798 + acpi_disable_event(ACPI_EVENT_RTC, 0); 799 + } 800 + 801 + static void acpi_rtc_event_cleanup(void) 802 + { 803 + if (acpi_disabled) 804 + return; 805 + 806 + acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler); 807 + } 808 + 809 + static void rtc_wake_on(struct device *dev) 810 + { 811 + acpi_clear_event(ACPI_EVENT_RTC); 812 + acpi_enable_event(ACPI_EVENT_RTC, 0); 813 + } 814 + 815 + static void rtc_wake_off(struct device *dev) 816 + { 817 + acpi_disable_event(ACPI_EVENT_RTC, 0); 818 + } 819 + 820 + #ifdef CONFIG_X86 821 + /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */ 822 + static void use_acpi_alarm_quirks(void) 823 + { 824 + if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 825 + return; 826 + 827 + if (!is_hpet_enabled()) 828 + return; 829 + 830 + if (dmi_get_bios_year() < 2015) 831 + return; 832 + 833 + use_acpi_alarm = true; 834 + } 835 + #else 836 + static inline void use_acpi_alarm_quirks(void) { } 837 + #endif 838 + 839 + static void acpi_cmos_wake_setup(struct device *dev) 840 + { 841 + if (acpi_disabled) 842 + return; 843 + 844 + use_acpi_alarm_quirks(); 845 + 846 + cmos_rtc.wake_on = rtc_wake_on; 847 + cmos_rtc.wake_off = rtc_wake_off; 848 + 849 + /* ACPI tables bug workaround. */ 850 + if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 851 + dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 852 + acpi_gbl_FADT.month_alarm); 853 + acpi_gbl_FADT.month_alarm = 0; 854 + } 855 + 856 + cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm; 857 + cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm; 858 + cmos_rtc.century = acpi_gbl_FADT.century; 859 + 860 + if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 861 + dev_info(dev, "RTC can wake from S4\n"); 862 + 863 + /* RTC always wakes from S1/S2/S3, and often S4/STD */ 864 + device_init_wakeup(dev, 1); 865 + } 866 + 867 + static void cmos_check_acpi_rtc_status(struct device *dev, 868 + unsigned char *rtc_control) 869 + { 870 + struct cmos_rtc *cmos = dev_get_drvdata(dev); 871 + acpi_event_status rtc_status; 872 + acpi_status status; 873 + 874 + if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 875 + return; 876 + 877 + status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 878 + if (ACPI_FAILURE(status)) { 879 + dev_err(dev, "Could not get RTC status\n"); 880 + } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 881 + unsigned char mask; 882 + *rtc_control &= ~RTC_AIE; 883 + CMOS_WRITE(*rtc_control, RTC_CONTROL); 884 + mask = CMOS_READ(RTC_INTR_FLAGS); 885 + rtc_update_irq(cmos->rtc, 1, mask); 886 + } 887 + } 888 + 889 + #else /* !CONFIG_ACPI */ 890 + 891 + static inline void acpi_rtc_event_setup(struct device *dev) 892 + { 893 + } 894 + 895 + static inline void acpi_rtc_event_cleanup(void) 896 + { 897 + } 898 + 899 + static inline void acpi_cmos_wake_setup(struct device *dev) 900 + { 901 + } 902 + 903 + static inline void cmos_check_acpi_rtc_status(struct device *dev, 904 + unsigned char *rtc_control) 905 + { 906 + } 907 + #endif /* CONFIG_ACPI */ 908 + 747 909 #ifdef CONFIG_PNP 748 910 #define INITSECTION 749 911 ··· 989 827 if (info->address_space) 990 828 address_space = info->address_space; 991 829 992 - if (info->rtc_day_alarm && info->rtc_day_alarm < 128) 993 - cmos_rtc.day_alrm = info->rtc_day_alarm; 994 - if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) 995 - cmos_rtc.mon_alrm = info->rtc_mon_alarm; 996 - if (info->rtc_century && info->rtc_century < 128) 997 - cmos_rtc.century = info->rtc_century; 830 + cmos_rtc.day_alrm = info->rtc_day_alarm; 831 + cmos_rtc.mon_alrm = info->rtc_mon_alarm; 832 + cmos_rtc.century = info->rtc_century; 998 833 999 834 if (info->wake_on && info->wake_off) { 1000 835 cmos_rtc.wake_on = info->wake_on; 1001 836 cmos_rtc.wake_off = info->wake_off; 1002 837 } 838 + } else { 839 + acpi_cmos_wake_setup(dev); 1003 840 } 841 + 842 + if (cmos_rtc.day_alrm >= 128) 843 + cmos_rtc.day_alrm = 0; 844 + 845 + if (cmos_rtc.mon_alrm >= 128) 846 + cmos_rtc.mon_alrm = 0; 847 + 848 + if (cmos_rtc.century >= 128) 849 + cmos_rtc.century = 0; 1004 850 1005 851 cmos_rtc.dev = dev; 1006 852 dev_set_drvdata(dev, &cmos_rtc); ··· 1098 928 nvmem_cfg.size = address_space - NVRAM_OFFSET; 1099 929 devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg); 1100 930 931 + /* 932 + * Everything has gone well so far, so by default register a handler for 933 + * the ACPI RTC fixed event. 934 + */ 935 + if (!info) 936 + acpi_rtc_event_setup(dev); 937 + 1101 938 dev_info(dev, "%s%s, %d bytes nvram%s\n", 1102 939 !is_valid_irq(rtc_irq) ? "no alarms" : 1103 940 cmos_rtc.mon_alrm ? "alarms up to one year" : ··· 1149 972 if (use_hpet_alarm()) 1150 973 hpet_unregister_irq_handler(cmos_interrupt); 1151 974 } 975 + 976 + if (!dev_get_platdata(dev)) 977 + acpi_rtc_event_cleanup(); 1152 978 1153 979 cmos->rtc = NULL; 1154 980 ··· 1302 1122 } 1303 1123 } 1304 1124 1305 - static void cmos_check_acpi_rtc_status(struct device *dev, 1306 - unsigned char *rtc_control); 1307 - 1308 1125 static int __maybe_unused cmos_resume(struct device *dev) 1309 1126 { 1310 1127 struct cmos_rtc *cmos = dev_get_drvdata(dev); ··· 1368 1191 * predate even PNPBIOS should set up platform_bus devices. 1369 1192 */ 1370 1193 1371 - #ifdef CONFIG_ACPI 1372 - 1373 - #include <linux/acpi.h> 1374 - 1375 - static u32 rtc_handler(void *context) 1376 - { 1377 - struct device *dev = context; 1378 - struct cmos_rtc *cmos = dev_get_drvdata(dev); 1379 - unsigned char rtc_control = 0; 1380 - unsigned char rtc_intr; 1381 - unsigned long flags; 1382 - 1383 - 1384 - /* 1385 - * Always update rtc irq when ACPI is used as RTC Alarm. 1386 - * Or else, ACPI SCI is enabled during suspend/resume only, 1387 - * update rtc irq in that case. 1388 - */ 1389 - if (cmos_use_acpi_alarm()) 1390 - cmos_interrupt(0, (void *)cmos->rtc); 1391 - else { 1392 - /* Fix me: can we use cmos_interrupt() here as well? */ 1393 - spin_lock_irqsave(&rtc_lock, flags); 1394 - if (cmos_rtc.suspend_ctrl) 1395 - rtc_control = CMOS_READ(RTC_CONTROL); 1396 - if (rtc_control & RTC_AIE) { 1397 - cmos_rtc.suspend_ctrl &= ~RTC_AIE; 1398 - CMOS_WRITE(rtc_control, RTC_CONTROL); 1399 - rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 1400 - rtc_update_irq(cmos->rtc, 1, rtc_intr); 1401 - } 1402 - spin_unlock_irqrestore(&rtc_lock, flags); 1403 - } 1404 - 1405 - pm_wakeup_hard_event(dev); 1406 - acpi_clear_event(ACPI_EVENT_RTC); 1407 - acpi_disable_event(ACPI_EVENT_RTC, 0); 1408 - return ACPI_INTERRUPT_HANDLED; 1409 - } 1410 - 1411 - static inline void rtc_wake_setup(struct device *dev) 1412 - { 1413 - if (acpi_disabled) 1414 - return; 1415 - 1416 - acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 1417 - /* 1418 - * After the RTC handler is installed, the Fixed_RTC event should 1419 - * be disabled. Only when the RTC alarm is set will it be enabled. 1420 - */ 1421 - acpi_clear_event(ACPI_EVENT_RTC); 1422 - acpi_disable_event(ACPI_EVENT_RTC, 0); 1423 - } 1424 - 1425 - static void rtc_wake_on(struct device *dev) 1426 - { 1427 - acpi_clear_event(ACPI_EVENT_RTC); 1428 - acpi_enable_event(ACPI_EVENT_RTC, 0); 1429 - } 1430 - 1431 - static void rtc_wake_off(struct device *dev) 1432 - { 1433 - acpi_disable_event(ACPI_EVENT_RTC, 0); 1434 - } 1435 - 1436 - #ifdef CONFIG_X86 1437 - /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */ 1438 - static void use_acpi_alarm_quirks(void) 1439 - { 1440 - if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 1441 - return; 1442 - 1443 - if (!is_hpet_enabled()) 1444 - return; 1445 - 1446 - if (dmi_get_bios_year() < 2015) 1447 - return; 1448 - 1449 - use_acpi_alarm = true; 1450 - } 1451 - #else 1452 - static inline void use_acpi_alarm_quirks(void) { } 1453 - #endif 1454 - 1455 - /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find 1456 - * its device node and pass extra config data. This helps its driver use 1457 - * capabilities that the now-obsolete mc146818 didn't have, and informs it 1458 - * that this board's RTC is wakeup-capable (per ACPI spec). 1459 - */ 1460 - static struct cmos_rtc_board_info acpi_rtc_info; 1461 - 1462 - static void cmos_wake_setup(struct device *dev) 1463 - { 1464 - if (acpi_disabled) 1465 - return; 1466 - 1467 - use_acpi_alarm_quirks(); 1468 - 1469 - acpi_rtc_info.wake_on = rtc_wake_on; 1470 - acpi_rtc_info.wake_off = rtc_wake_off; 1471 - 1472 - /* workaround bug in some ACPI tables */ 1473 - if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 1474 - dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 1475 - acpi_gbl_FADT.month_alarm); 1476 - acpi_gbl_FADT.month_alarm = 0; 1477 - } 1478 - 1479 - acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; 1480 - acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; 1481 - acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; 1482 - 1483 - /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ 1484 - if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 1485 - dev_info(dev, "RTC can wake from S4\n"); 1486 - 1487 - dev->platform_data = &acpi_rtc_info; 1488 - 1489 - /* RTC always wakes from S1/S2/S3, and often S4/STD */ 1490 - device_init_wakeup(dev, 1); 1491 - } 1492 - 1493 - static void cmos_check_acpi_rtc_status(struct device *dev, 1494 - unsigned char *rtc_control) 1495 - { 1496 - struct cmos_rtc *cmos = dev_get_drvdata(dev); 1497 - acpi_event_status rtc_status; 1498 - acpi_status status; 1499 - 1500 - if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 1501 - return; 1502 - 1503 - status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 1504 - if (ACPI_FAILURE(status)) { 1505 - dev_err(dev, "Could not get RTC status\n"); 1506 - } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 1507 - unsigned char mask; 1508 - *rtc_control &= ~RTC_AIE; 1509 - CMOS_WRITE(*rtc_control, RTC_CONTROL); 1510 - mask = CMOS_READ(RTC_INTR_FLAGS); 1511 - rtc_update_irq(cmos->rtc, 1, mask); 1512 - } 1513 - } 1514 - 1515 - #else 1516 - 1517 - static void cmos_wake_setup(struct device *dev) 1518 - { 1519 - } 1520 - 1521 - static void cmos_check_acpi_rtc_status(struct device *dev, 1522 - unsigned char *rtc_control) 1523 - { 1524 - } 1525 - 1526 - static void rtc_wake_setup(struct device *dev) 1527 - { 1528 - } 1529 - #endif 1530 - 1531 1194 #ifdef CONFIG_PNP 1532 1195 1533 1196 #include <linux/pnp.h> 1534 1197 1535 1198 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1536 1199 { 1537 - int irq, ret; 1538 - 1539 - cmos_wake_setup(&pnp->dev); 1200 + int irq; 1540 1201 1541 1202 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { 1542 1203 irq = 0; ··· 1390 1375 irq = pnp_irq(pnp, 0); 1391 1376 } 1392 1377 1393 - ret = cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1394 - if (ret) 1395 - return ret; 1396 - 1397 - rtc_wake_setup(&pnp->dev); 1398 - 1399 - return 0; 1378 + return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1400 1379 } 1401 1380 1402 1381 static void cmos_pnp_remove(struct pnp_dev *pnp) ··· 1474 1465 static int __init cmos_platform_probe(struct platform_device *pdev) 1475 1466 { 1476 1467 struct resource *resource; 1477 - int irq, ret; 1468 + int irq; 1478 1469 1479 1470 cmos_of_init(pdev); 1480 - cmos_wake_setup(&pdev->dev); 1481 1471 1482 1472 if (RTC_IOMAPPED) 1483 1473 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); ··· 1486 1478 if (irq < 0) 1487 1479 irq = -1; 1488 1480 1489 - ret = cmos_do_probe(&pdev->dev, resource, irq); 1490 - if (ret) 1491 - return ret; 1492 - 1493 - rtc_wake_setup(&pdev->dev); 1494 - 1495 - return 0; 1481 + return cmos_do_probe(&pdev->dev, resource, irq); 1496 1482 } 1497 1483 1498 1484 static int cmos_platform_remove(struct platform_device *pdev)

+20 -15

drivers/rtc/rtc-cros-ec.c

··· 14 14 15 15 #define DRV_NAME "cros-ec-rtc" 16 16 17 + #define SECS_PER_DAY (24 * 60 * 60) 18 + 17 19 /** 18 20 * struct cros_ec_rtc - Driver data for EC RTC 19 21 * ··· 45 43 msg.msg.insize = sizeof(msg.data); 46 44 47 45 ret = cros_ec_cmd_xfer_status(cros_ec, &msg.msg); 48 - if (ret < 0) { 49 - dev_err(cros_ec->dev, 50 - "error getting %s from EC: %d\n", 51 - command == EC_CMD_RTC_GET_VALUE ? "time" : "alarm", 52 - ret); 46 + if (ret < 0) 53 47 return ret; 54 - } 55 48 56 49 *response = msg.data.time; 57 50 ··· 56 59 static int cros_ec_rtc_set(struct cros_ec_device *cros_ec, u32 command, 57 60 u32 param) 58 61 { 59 - int ret = 0; 62 + int ret; 60 63 struct { 61 64 struct cros_ec_command msg; 62 65 struct ec_response_rtc data; ··· 68 71 msg.data.time = param; 69 72 70 73 ret = cros_ec_cmd_xfer_status(cros_ec, &msg.msg); 71 - if (ret < 0) { 72 - dev_err(cros_ec->dev, "error setting %s on EC: %d\n", 73 - command == EC_CMD_RTC_SET_VALUE ? "time" : "alarm", 74 - ret); 74 + if (ret < 0) 75 75 return ret; 76 - } 77 - 78 76 return 0; 79 77 } 80 78 ··· 182 190 183 191 ret = cros_ec_rtc_set(cros_ec, EC_CMD_RTC_SET_ALARM, alarm_offset); 184 192 if (ret < 0) { 185 - dev_err(dev, "error setting alarm: %d\n", ret); 186 - return ret; 193 + if (ret == -EINVAL && alarm_offset >= SECS_PER_DAY) { 194 + /* 195 + * RTC chips on some older Chromebooks can only handle 196 + * alarms up to 24h in the future. Try to set an alarm 197 + * below that limit to avoid suspend failures. 198 + */ 199 + ret = cros_ec_rtc_set(cros_ec, EC_CMD_RTC_SET_ALARM, 200 + SECS_PER_DAY - 1); 201 + } 202 + 203 + if (ret < 0) { 204 + dev_err(dev, "error setting alarm in %u seconds: %d\n", 205 + alarm_offset, ret); 206 + return ret; 207 + } 187 208 } 188 209 189 210 return 0;

-512

drivers/rtc/rtc-davinci.c

··· 1 - // SPDX-License-Identifier: GPL-2.0-or-later 2 - /* 3 - * DaVinci Power Management and Real Time Clock Driver for TI platforms 4 - * 5 - * Copyright (C) 2009 Texas Instruments, Inc 6 - * 7 - * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com> 8 - */ 9 - #include <linux/kernel.h> 10 - #include <linux/init.h> 11 - #include <linux/module.h> 12 - #include <linux/ioport.h> 13 - #include <linux/delay.h> 14 - #include <linux/spinlock.h> 15 - #include <linux/rtc.h> 16 - #include <linux/bcd.h> 17 - #include <linux/platform_device.h> 18 - #include <linux/io.h> 19 - #include <linux/slab.h> 20 - 21 - /* 22 - * The DaVinci RTC is a simple RTC with the following 23 - * Sec: 0 - 59 : BCD count 24 - * Min: 0 - 59 : BCD count 25 - * Hour: 0 - 23 : BCD count 26 - * Day: 0 - 0x7FFF(32767) : Binary count ( Over 89 years ) 27 - */ 28 - 29 - /* PRTC interface registers */ 30 - #define DAVINCI_PRTCIF_PID 0x00 31 - #define PRTCIF_CTLR 0x04 32 - #define PRTCIF_LDATA 0x08 33 - #define PRTCIF_UDATA 0x0C 34 - #define PRTCIF_INTEN 0x10 35 - #define PRTCIF_INTFLG 0x14 36 - 37 - /* PRTCIF_CTLR bit fields */ 38 - #define PRTCIF_CTLR_BUSY BIT(31) 39 - #define PRTCIF_CTLR_SIZE BIT(25) 40 - #define PRTCIF_CTLR_DIR BIT(24) 41 - #define PRTCIF_CTLR_BENU_MSB BIT(23) 42 - #define PRTCIF_CTLR_BENU_3RD_BYTE BIT(22) 43 - #define PRTCIF_CTLR_BENU_2ND_BYTE BIT(21) 44 - #define PRTCIF_CTLR_BENU_LSB BIT(20) 45 - #define PRTCIF_CTLR_BENU_MASK (0x00F00000) 46 - #define PRTCIF_CTLR_BENL_MSB BIT(19) 47 - #define PRTCIF_CTLR_BENL_3RD_BYTE BIT(18) 48 - #define PRTCIF_CTLR_BENL_2ND_BYTE BIT(17) 49 - #define PRTCIF_CTLR_BENL_LSB BIT(16) 50 - #define PRTCIF_CTLR_BENL_MASK (0x000F0000) 51 - 52 - /* PRTCIF_INTEN bit fields */ 53 - #define PRTCIF_INTEN_RTCSS BIT(1) 54 - #define PRTCIF_INTEN_RTCIF BIT(0) 55 - #define PRTCIF_INTEN_MASK (PRTCIF_INTEN_RTCSS \ 56 - | PRTCIF_INTEN_RTCIF) 57 - 58 - /* PRTCIF_INTFLG bit fields */ 59 - #define PRTCIF_INTFLG_RTCSS BIT(1) 60 - #define PRTCIF_INTFLG_RTCIF BIT(0) 61 - #define PRTCIF_INTFLG_MASK (PRTCIF_INTFLG_RTCSS \ 62 - | PRTCIF_INTFLG_RTCIF) 63 - 64 - /* PRTC subsystem registers */ 65 - #define PRTCSS_RTC_INTC_EXTENA1 (0x0C) 66 - #define PRTCSS_RTC_CTRL (0x10) 67 - #define PRTCSS_RTC_WDT (0x11) 68 - #define PRTCSS_RTC_TMR0 (0x12) 69 - #define PRTCSS_RTC_TMR1 (0x13) 70 - #define PRTCSS_RTC_CCTRL (0x14) 71 - #define PRTCSS_RTC_SEC (0x15) 72 - #define PRTCSS_RTC_MIN (0x16) 73 - #define PRTCSS_RTC_HOUR (0x17) 74 - #define PRTCSS_RTC_DAY0 (0x18) 75 - #define PRTCSS_RTC_DAY1 (0x19) 76 - #define PRTCSS_RTC_AMIN (0x1A) 77 - #define PRTCSS_RTC_AHOUR (0x1B) 78 - #define PRTCSS_RTC_ADAY0 (0x1C) 79 - #define PRTCSS_RTC_ADAY1 (0x1D) 80 - #define PRTCSS_RTC_CLKC_CNT (0x20) 81 - 82 - /* PRTCSS_RTC_INTC_EXTENA1 */ 83 - #define PRTCSS_RTC_INTC_EXTENA1_MASK (0x07) 84 - 85 - /* PRTCSS_RTC_CTRL bit fields */ 86 - #define PRTCSS_RTC_CTRL_WDTBUS BIT(7) 87 - #define PRTCSS_RTC_CTRL_WEN BIT(6) 88 - #define PRTCSS_RTC_CTRL_WDRT BIT(5) 89 - #define PRTCSS_RTC_CTRL_WDTFLG BIT(4) 90 - #define PRTCSS_RTC_CTRL_TE BIT(3) 91 - #define PRTCSS_RTC_CTRL_TIEN BIT(2) 92 - #define PRTCSS_RTC_CTRL_TMRFLG BIT(1) 93 - #define PRTCSS_RTC_CTRL_TMMD BIT(0) 94 - 95 - /* PRTCSS_RTC_CCTRL bit fields */ 96 - #define PRTCSS_RTC_CCTRL_CALBUSY BIT(7) 97 - #define PRTCSS_RTC_CCTRL_DAEN BIT(5) 98 - #define PRTCSS_RTC_CCTRL_HAEN BIT(4) 99 - #define PRTCSS_RTC_CCTRL_MAEN BIT(3) 100 - #define PRTCSS_RTC_CCTRL_ALMFLG BIT(2) 101 - #define PRTCSS_RTC_CCTRL_AIEN BIT(1) 102 - #define PRTCSS_RTC_CCTRL_CAEN BIT(0) 103 - 104 - static DEFINE_SPINLOCK(davinci_rtc_lock); 105 - 106 - struct davinci_rtc { 107 - struct rtc_device *rtc; 108 - void __iomem *base; 109 - int irq; 110 - }; 111 - 112 - static inline void rtcif_write(struct davinci_rtc *davinci_rtc, 113 - u32 val, u32 addr) 114 - { 115 - writel(val, davinci_rtc->base + addr); 116 - } 117 - 118 - static inline u32 rtcif_read(struct davinci_rtc *davinci_rtc, u32 addr) 119 - { 120 - return readl(davinci_rtc->base + addr); 121 - } 122 - 123 - static inline void rtcif_wait(struct davinci_rtc *davinci_rtc) 124 - { 125 - while (rtcif_read(davinci_rtc, PRTCIF_CTLR) & PRTCIF_CTLR_BUSY) 126 - cpu_relax(); 127 - } 128 - 129 - static inline void rtcss_write(struct davinci_rtc *davinci_rtc, 130 - unsigned long val, u8 addr) 131 - { 132 - rtcif_wait(davinci_rtc); 133 - 134 - rtcif_write(davinci_rtc, PRTCIF_CTLR_BENL_LSB | addr, PRTCIF_CTLR); 135 - rtcif_write(davinci_rtc, val, PRTCIF_LDATA); 136 - 137 - rtcif_wait(davinci_rtc); 138 - } 139 - 140 - static inline u8 rtcss_read(struct davinci_rtc *davinci_rtc, u8 addr) 141 - { 142 - rtcif_wait(davinci_rtc); 143 - 144 - rtcif_write(davinci_rtc, PRTCIF_CTLR_DIR | PRTCIF_CTLR_BENL_LSB | addr, 145 - PRTCIF_CTLR); 146 - 147 - rtcif_wait(davinci_rtc); 148 - 149 - return rtcif_read(davinci_rtc, PRTCIF_LDATA); 150 - } 151 - 152 - static inline void davinci_rtcss_calendar_wait(struct davinci_rtc *davinci_rtc) 153 - { 154 - while (rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL) & 155 - PRTCSS_RTC_CCTRL_CALBUSY) 156 - cpu_relax(); 157 - } 158 - 159 - static irqreturn_t davinci_rtc_interrupt(int irq, void *class_dev) 160 - { 161 - struct davinci_rtc *davinci_rtc = class_dev; 162 - unsigned long events = 0; 163 - u32 irq_flg; 164 - u8 alm_irq, tmr_irq; 165 - u8 rtc_ctrl, rtc_cctrl; 166 - int ret = IRQ_NONE; 167 - 168 - irq_flg = rtcif_read(davinci_rtc, PRTCIF_INTFLG) & 169 - PRTCIF_INTFLG_RTCSS; 170 - 171 - alm_irq = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL) & 172 - PRTCSS_RTC_CCTRL_ALMFLG; 173 - 174 - tmr_irq = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL) & 175 - PRTCSS_RTC_CTRL_TMRFLG; 176 - 177 - if (irq_flg) { 178 - if (alm_irq) { 179 - events |= RTC_IRQF | RTC_AF; 180 - rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL); 181 - rtc_cctrl |= PRTCSS_RTC_CCTRL_ALMFLG; 182 - rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL); 183 - } else if (tmr_irq) { 184 - events |= RTC_IRQF | RTC_PF; 185 - rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL); 186 - rtc_ctrl |= PRTCSS_RTC_CTRL_TMRFLG; 187 - rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL); 188 - } 189 - 190 - rtcif_write(davinci_rtc, PRTCIF_INTFLG_RTCSS, 191 - PRTCIF_INTFLG); 192 - rtc_update_irq(davinci_rtc->rtc, 1, events); 193 - 194 - ret = IRQ_HANDLED; 195 - } 196 - 197 - return ret; 198 - } 199 - 200 - static int 201 - davinci_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 202 - { 203 - struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev); 204 - u8 rtc_ctrl; 205 - unsigned long flags; 206 - int ret = 0; 207 - 208 - spin_lock_irqsave(&davinci_rtc_lock, flags); 209 - 210 - rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL); 211 - 212 - switch (cmd) { 213 - case RTC_WIE_ON: 214 - rtc_ctrl |= PRTCSS_RTC_CTRL_WEN | PRTCSS_RTC_CTRL_WDTFLG; 215 - break; 216 - case RTC_WIE_OFF: 217 - rtc_ctrl &= ~PRTCSS_RTC_CTRL_WEN; 218 - break; 219 - default: 220 - ret = -ENOIOCTLCMD; 221 - } 222 - 223 - rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL); 224 - 225 - spin_unlock_irqrestore(&davinci_rtc_lock, flags); 226 - 227 - return ret; 228 - } 229 - 230 - static void convertfromdays(u16 days, struct rtc_time *tm) 231 - { 232 - int tmp_days, year, mon; 233 - 234 - for (year = 2000;; year++) { 235 - tmp_days = rtc_year_days(1, 12, year); 236 - if (days >= tmp_days) 237 - days -= tmp_days; 238 - else { 239 - for (mon = 0;; mon++) { 240 - tmp_days = rtc_month_days(mon, year); 241 - if (days >= tmp_days) { 242 - days -= tmp_days; 243 - } else { 244 - tm->tm_year = year - 1900; 245 - tm->tm_mon = mon; 246 - tm->tm_mday = days + 1; 247 - break; 248 - } 249 - } 250 - break; 251 - } 252 - } 253 - } 254 - 255 - static void convert2days(u16 *days, struct rtc_time *tm) 256 - { 257 - int i; 258 - *days = 0; 259 - 260 - for (i = 2000; i < 1900 + tm->tm_year; i++) 261 - *days += rtc_year_days(1, 12, i); 262 - 263 - *days += rtc_year_days(tm->tm_mday, tm->tm_mon, 1900 + tm->tm_year); 264 - } 265 - 266 - static int davinci_rtc_read_time(struct device *dev, struct rtc_time *tm) 267 - { 268 - struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev); 269 - u16 days = 0; 270 - u8 day0, day1; 271 - unsigned long flags; 272 - 273 - spin_lock_irqsave(&davinci_rtc_lock, flags); 274 - 275 - davinci_rtcss_calendar_wait(davinci_rtc); 276 - tm->tm_sec = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_SEC)); 277 - 278 - davinci_rtcss_calendar_wait(davinci_rtc); 279 - tm->tm_min = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_MIN)); 280 - 281 - davinci_rtcss_calendar_wait(davinci_rtc); 282 - tm->tm_hour = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_HOUR)); 283 - 284 - davinci_rtcss_calendar_wait(davinci_rtc); 285 - day0 = rtcss_read(davinci_rtc, PRTCSS_RTC_DAY0); 286 - 287 - davinci_rtcss_calendar_wait(davinci_rtc); 288 - day1 = rtcss_read(davinci_rtc, PRTCSS_RTC_DAY1); 289 - 290 - spin_unlock_irqrestore(&davinci_rtc_lock, flags); 291 - 292 - days |= day1; 293 - days <<= 8; 294 - days |= day0; 295 - 296 - convertfromdays(days, tm); 297 - 298 - return 0; 299 - } 300 - 301 - static int davinci_rtc_set_time(struct device *dev, struct rtc_time *tm) 302 - { 303 - struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev); 304 - u16 days; 305 - u8 rtc_cctrl; 306 - unsigned long flags; 307 - 308 - convert2days(&days, tm); 309 - 310 - spin_lock_irqsave(&davinci_rtc_lock, flags); 311 - 312 - davinci_rtcss_calendar_wait(davinci_rtc); 313 - rtcss_write(davinci_rtc, bin2bcd(tm->tm_sec), PRTCSS_RTC_SEC); 314 - 315 - davinci_rtcss_calendar_wait(davinci_rtc); 316 - rtcss_write(davinci_rtc, bin2bcd(tm->tm_min), PRTCSS_RTC_MIN); 317 - 318 - davinci_rtcss_calendar_wait(davinci_rtc); 319 - rtcss_write(davinci_rtc, bin2bcd(tm->tm_hour), PRTCSS_RTC_HOUR); 320 - 321 - davinci_rtcss_calendar_wait(davinci_rtc); 322 - rtcss_write(davinci_rtc, days & 0xFF, PRTCSS_RTC_DAY0); 323 - 324 - davinci_rtcss_calendar_wait(davinci_rtc); 325 - rtcss_write(davinci_rtc, (days & 0xFF00) >> 8, PRTCSS_RTC_DAY1); 326 - 327 - rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL); 328 - rtc_cctrl |= PRTCSS_RTC_CCTRL_CAEN; 329 - rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL); 330 - 331 - spin_unlock_irqrestore(&davinci_rtc_lock, flags); 332 - 333 - return 0; 334 - } 335 - 336 - static int davinci_rtc_alarm_irq_enable(struct device *dev, 337 - unsigned int enabled) 338 - { 339 - struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev); 340 - unsigned long flags; 341 - u8 rtc_cctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CCTRL); 342 - 343 - spin_lock_irqsave(&davinci_rtc_lock, flags); 344 - 345 - if (enabled) 346 - rtc_cctrl |= PRTCSS_RTC_CCTRL_DAEN | 347 - PRTCSS_RTC_CCTRL_HAEN | 348 - PRTCSS_RTC_CCTRL_MAEN | 349 - PRTCSS_RTC_CCTRL_ALMFLG | 350 - PRTCSS_RTC_CCTRL_AIEN; 351 - else 352 - rtc_cctrl &= ~PRTCSS_RTC_CCTRL_AIEN; 353 - 354 - davinci_rtcss_calendar_wait(davinci_rtc); 355 - rtcss_write(davinci_rtc, rtc_cctrl, PRTCSS_RTC_CCTRL); 356 - 357 - spin_unlock_irqrestore(&davinci_rtc_lock, flags); 358 - 359 - return 0; 360 - } 361 - 362 - static int davinci_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 363 - { 364 - struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev); 365 - u16 days = 0; 366 - u8 day0, day1; 367 - unsigned long flags; 368 - 369 - alm->time.tm_sec = 0; 370 - 371 - spin_lock_irqsave(&davinci_rtc_lock, flags); 372 - 373 - davinci_rtcss_calendar_wait(davinci_rtc); 374 - alm->time.tm_min = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_AMIN)); 375 - 376 - davinci_rtcss_calendar_wait(davinci_rtc); 377 - alm->time.tm_hour = bcd2bin(rtcss_read(davinci_rtc, PRTCSS_RTC_AHOUR)); 378 - 379 - davinci_rtcss_calendar_wait(davinci_rtc); 380 - day0 = rtcss_read(davinci_rtc, PRTCSS_RTC_ADAY0); 381 - 382 - davinci_rtcss_calendar_wait(davinci_rtc); 383 - day1 = rtcss_read(davinci_rtc, PRTCSS_RTC_ADAY1); 384 - 385 - spin_unlock_irqrestore(&davinci_rtc_lock, flags); 386 - days |= day1; 387 - days <<= 8; 388 - days |= day0; 389 - 390 - convertfromdays(days, &alm->time); 391 - 392 - alm->pending = !!(rtcss_read(davinci_rtc, 393 - PRTCSS_RTC_CCTRL) & 394 - PRTCSS_RTC_CCTRL_AIEN); 395 - alm->enabled = alm->pending && device_may_wakeup(dev); 396 - 397 - return 0; 398 - } 399 - 400 - static int davinci_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 401 - { 402 - struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev); 403 - unsigned long flags; 404 - u16 days; 405 - 406 - convert2days(&days, &alm->time); 407 - 408 - spin_lock_irqsave(&davinci_rtc_lock, flags); 409 - 410 - davinci_rtcss_calendar_wait(davinci_rtc); 411 - rtcss_write(davinci_rtc, bin2bcd(alm->time.tm_min), PRTCSS_RTC_AMIN); 412 - 413 - davinci_rtcss_calendar_wait(davinci_rtc); 414 - rtcss_write(davinci_rtc, bin2bcd(alm->time.tm_hour), PRTCSS_RTC_AHOUR); 415 - 416 - davinci_rtcss_calendar_wait(davinci_rtc); 417 - rtcss_write(davinci_rtc, days & 0xFF, PRTCSS_RTC_ADAY0); 418 - 419 - davinci_rtcss_calendar_wait(davinci_rtc); 420 - rtcss_write(davinci_rtc, (days & 0xFF00) >> 8, PRTCSS_RTC_ADAY1); 421 - 422 - spin_unlock_irqrestore(&davinci_rtc_lock, flags); 423 - 424 - return 0; 425 - } 426 - 427 - static const struct rtc_class_ops davinci_rtc_ops = { 428 - .ioctl = davinci_rtc_ioctl, 429 - .read_time = davinci_rtc_read_time, 430 - .set_time = davinci_rtc_set_time, 431 - .alarm_irq_enable = davinci_rtc_alarm_irq_enable, 432 - .read_alarm = davinci_rtc_read_alarm, 433 - .set_alarm = davinci_rtc_set_alarm, 434 - }; 435 - 436 - static int __init davinci_rtc_probe(struct platform_device *pdev) 437 - { 438 - struct device *dev = &pdev->dev; 439 - struct davinci_rtc *davinci_rtc; 440 - int ret = 0; 441 - 442 - davinci_rtc = devm_kzalloc(&pdev->dev, sizeof(struct davinci_rtc), GFP_KERNEL); 443 - if (!davinci_rtc) 444 - return -ENOMEM; 445 - 446 - davinci_rtc->irq = platform_get_irq(pdev, 0); 447 - if (davinci_rtc->irq < 0) 448 - return davinci_rtc->irq; 449 - 450 - davinci_rtc->base = devm_platform_ioremap_resource(pdev, 0); 451 - if (IS_ERR(davinci_rtc->base)) 452 - return PTR_ERR(davinci_rtc->base); 453 - 454 - platform_set_drvdata(pdev, davinci_rtc); 455 - 456 - davinci_rtc->rtc = devm_rtc_allocate_device(&pdev->dev); 457 - if (IS_ERR(davinci_rtc->rtc)) 458 - return PTR_ERR(davinci_rtc->rtc); 459 - 460 - davinci_rtc->rtc->ops = &davinci_rtc_ops; 461 - davinci_rtc->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 462 - davinci_rtc->rtc->range_max = RTC_TIMESTAMP_BEGIN_2000 + (1 << 16) * 86400ULL - 1; 463 - 464 - rtcif_write(davinci_rtc, PRTCIF_INTFLG_RTCSS, PRTCIF_INTFLG); 465 - rtcif_write(davinci_rtc, 0, PRTCIF_INTEN); 466 - rtcss_write(davinci_rtc, 0, PRTCSS_RTC_INTC_EXTENA1); 467 - 468 - rtcss_write(davinci_rtc, 0, PRTCSS_RTC_CTRL); 469 - rtcss_write(davinci_rtc, 0, PRTCSS_RTC_CCTRL); 470 - 471 - ret = devm_request_irq(dev, davinci_rtc->irq, davinci_rtc_interrupt, 472 - 0, "davinci_rtc", davinci_rtc); 473 - if (ret < 0) { 474 - dev_err(dev, "unable to register davinci RTC interrupt\n"); 475 - return ret; 476 - } 477 - 478 - /* Enable interrupts */ 479 - rtcif_write(davinci_rtc, PRTCIF_INTEN_RTCSS, PRTCIF_INTEN); 480 - rtcss_write(davinci_rtc, PRTCSS_RTC_INTC_EXTENA1_MASK, 481 - PRTCSS_RTC_INTC_EXTENA1); 482 - 483 - rtcss_write(davinci_rtc, PRTCSS_RTC_CCTRL_CAEN, PRTCSS_RTC_CCTRL); 484 - 485 - device_init_wakeup(&pdev->dev, 0); 486 - 487 - return devm_rtc_register_device(davinci_rtc->rtc); 488 - } 489 - 490 - static int __exit davinci_rtc_remove(struct platform_device *pdev) 491 - { 492 - struct davinci_rtc *davinci_rtc = platform_get_drvdata(pdev); 493 - 494 - device_init_wakeup(&pdev->dev, 0); 495 - 496 - rtcif_write(davinci_rtc, 0, PRTCIF_INTEN); 497 - 498 - return 0; 499 - } 500 - 501 - static struct platform_driver davinci_rtc_driver = { 502 - .remove = __exit_p(davinci_rtc_remove), 503 - .driver = { 504 - .name = "rtc_davinci", 505 - }, 506 - }; 507 - 508 - module_platform_driver_probe(davinci_rtc_driver, davinci_rtc_probe); 509 - 510 - MODULE_AUTHOR("Miguel Aguilar <miguel.aguilar@ridgerun.com>"); 511 - MODULE_DESCRIPTION("Texas Instruments DaVinci PRTC Driver"); 512 - MODULE_LICENSE("GPL");

-6

drivers/rtc/rtc-ds1302.c

··· 185 185 return 0; 186 186 } 187 187 188 - static void ds1302_remove(struct spi_device *spi) 189 - { 190 - spi_set_drvdata(spi, NULL); 191 - } 192 - 193 188 #ifdef CONFIG_OF 194 189 static const struct of_device_id ds1302_dt_ids[] = { 195 190 { .compatible = "maxim,ds1302", }, ··· 203 208 .driver.name = "rtc-ds1302", 204 209 .driver.of_match_table = of_match_ptr(ds1302_dt_ids), 205 210 .probe = ds1302_probe, 206 - .remove = ds1302_remove, 207 211 .id_table = ds1302_spi_ids, 208 212 }; 209 213

+2 -2

drivers/rtc/rtc-ds1307.c

··· 11 11 #include <linux/bcd.h> 12 12 #include <linux/i2c.h> 13 13 #include <linux/init.h> 14 + #include <linux/kstrtox.h> 14 15 #include <linux/mod_devicetable.h> 15 16 #include <linux/module.h> 16 17 #include <linux/property.h> ··· 1219 1218 1220 1219 regmap_read(ds1307->regmap, M41TXX_REG_CONTROL, &ctrl_reg); 1221 1220 1222 - return scnprintf(buf, PAGE_SIZE, (ctrl_reg & M41TXX_BIT_FT) ? "on\n" : 1223 - "off\n"); 1221 + return sysfs_emit(buf, (ctrl_reg & M41TXX_BIT_FT) ? "on\n" : "off\n"); 1224 1222 } 1225 1223 1226 1224 static DEVICE_ATTR_RW(frequency_test);

+1 -1

drivers/rtc/rtc-ds1347.c

··· 112 112 return err; 113 113 114 114 century = (dt->tm_year / 100) + 19; 115 - err = regmap_write(map, DS1347_CENTURY_REG, century); 115 + err = regmap_write(map, DS1347_CENTURY_REG, bin2bcd(century)); 116 116 if (err) 117 117 return err; 118 118

+1 -2

drivers/rtc/rtc-ds1742.c

··· 158 158 if (!pdata) 159 159 return -ENOMEM; 160 160 161 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 162 - ioaddr = devm_ioremap_resource(&pdev->dev, res); 161 + ioaddr = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 163 162 if (IS_ERR(ioaddr)) 164 163 return PTR_ERR(ioaddr); 165 164

+2

drivers/rtc/rtc-efi.c

··· 271 271 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->features); 272 272 set_bit(RTC_FEATURE_ALARM_WAKEUP_ONLY, rtc->features); 273 273 274 + device_init_wakeup(&dev->dev, true); 275 + 274 276 return devm_rtc_register_device(rtc); 275 277 } 276 278

+1 -6

drivers/rtc/rtc-fsl-ftm-alarm.c

··· 327 327 }, 328 328 }; 329 329 330 - static int __init ftm_alarm_init(void) 331 - { 332 - return platform_driver_register(&ftm_rtc_driver); 333 - } 334 - 335 - device_initcall(ftm_alarm_init); 330 + module_platform_driver(ftm_rtc_driver); 336 331 337 332 MODULE_DESCRIPTION("NXP/Freescale FlexTimer alarm driver"); 338 333 MODULE_AUTHOR("Biwen Li <biwen.li@nxp.com>");

+94

drivers/rtc/rtc-isl12022.c

··· 17 17 #include <linux/of.h> 18 18 #include <linux/of_device.h> 19 19 #include <linux/regmap.h> 20 + #include <linux/hwmon.h> 20 21 21 22 /* ISL register offsets */ 22 23 #define ISL12022_REG_SC 0x00 ··· 31 30 #define ISL12022_REG_SR 0x07 32 31 #define ISL12022_REG_INT 0x08 33 32 33 + #define ISL12022_REG_BETA 0x0d 34 + #define ISL12022_REG_TEMP_L 0x28 35 + 34 36 /* ISL register bits */ 35 37 #define ISL12022_HR_MIL (1 << 7) /* military or 24 hour time */ 36 38 ··· 42 38 43 39 #define ISL12022_INT_WRTC (1 << 6) 44 40 41 + #define ISL12022_BETA_TSE (1 << 7) 45 42 46 43 static struct i2c_driver isl12022_driver; 47 44 ··· 50 45 struct rtc_device *rtc; 51 46 struct regmap *regmap; 52 47 }; 48 + 49 + static umode_t isl12022_hwmon_is_visible(const void *data, 50 + enum hwmon_sensor_types type, 51 + u32 attr, int channel) 52 + { 53 + if (type == hwmon_temp && attr == hwmon_temp_input) 54 + return 0444; 55 + 56 + return 0; 57 + } 58 + 59 + /* 60 + * A user-initiated temperature conversion is not started by this function, 61 + * so the temperature is updated once every ~60 seconds. 62 + */ 63 + static int isl12022_hwmon_read_temp(struct device *dev, long *mC) 64 + { 65 + struct isl12022 *isl12022 = dev_get_drvdata(dev); 66 + struct regmap *regmap = isl12022->regmap; 67 + u8 temp_buf[2]; 68 + int temp, ret; 69 + 70 + ret = regmap_bulk_read(regmap, ISL12022_REG_TEMP_L, 71 + temp_buf, sizeof(temp_buf)); 72 + if (ret) 73 + return ret; 74 + /* 75 + * Temperature is represented as a 10-bit number, unit half-Kelvins. 76 + */ 77 + temp = (temp_buf[1] << 8) | temp_buf[0]; 78 + temp *= 500; 79 + temp -= 273000; 80 + 81 + *mC = temp; 82 + 83 + return 0; 84 + } 85 + 86 + static int isl12022_hwmon_read(struct device *dev, 87 + enum hwmon_sensor_types type, 88 + u32 attr, int channel, long *val) 89 + { 90 + if (type == hwmon_temp && attr == hwmon_temp_input) 91 + return isl12022_hwmon_read_temp(dev, val); 92 + 93 + return -EOPNOTSUPP; 94 + } 95 + 96 + static const struct hwmon_channel_info *isl12022_hwmon_info[] = { 97 + HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), 98 + NULL 99 + }; 100 + 101 + static const struct hwmon_ops isl12022_hwmon_ops = { 102 + .is_visible = isl12022_hwmon_is_visible, 103 + .read = isl12022_hwmon_read, 104 + }; 105 + 106 + static const struct hwmon_chip_info isl12022_hwmon_chip_info = { 107 + .ops = &isl12022_hwmon_ops, 108 + .info = isl12022_hwmon_info, 109 + }; 110 + 111 + static void isl12022_hwmon_register(struct device *dev) 112 + { 113 + struct isl12022 *isl12022; 114 + struct device *hwmon; 115 + int ret; 116 + 117 + if (!IS_REACHABLE(CONFIG_HWMON)) 118 + return; 119 + 120 + isl12022 = dev_get_drvdata(dev); 121 + 122 + ret = regmap_update_bits(isl12022->regmap, ISL12022_REG_BETA, 123 + ISL12022_BETA_TSE, ISL12022_BETA_TSE); 124 + if (ret) { 125 + dev_warn(dev, "unable to enable temperature sensor\n"); 126 + return; 127 + } 128 + 129 + hwmon = devm_hwmon_device_register_with_info(dev, "isl12022", isl12022, 130 + &isl12022_hwmon_chip_info, 131 + NULL); 132 + if (IS_ERR(hwmon)) 133 + dev_warn(dev, "unable to register hwmon device: %pe\n", hwmon); 134 + } 53 135 54 136 /* 55 137 * In the routines that deal directly with the isl12022 hardware, we use ··· 251 159 dev_err(&client->dev, "regmap allocation failed\n"); 252 160 return PTR_ERR(isl12022->regmap); 253 161 } 162 + 163 + isl12022_hwmon_register(&client->dev); 254 164 255 165 isl12022->rtc = devm_rtc_allocate_device(&client->dev); 256 166 if (IS_ERR(isl12022->rtc))

+4 -2

drivers/rtc/rtc-isl1208.c

··· 797 797 } 798 798 799 799 static int 800 - isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id) 800 + isl1208_probe(struct i2c_client *client) 801 801 { 802 802 int rc = 0; 803 803 struct isl1208_state *isl1208; ··· 821 821 if (!isl1208->config) 822 822 return -ENODEV; 823 823 } else { 824 + const struct i2c_device_id *id = i2c_match_id(isl1208_id, client); 825 + 824 826 if (id->driver_data >= ISL_LAST_ID) 825 827 return -ENODEV; 826 828 isl1208->config = &isl1208_configs[id->driver_data]; ··· 908 906 .name = "rtc-isl1208", 909 907 .of_match_table = of_match_ptr(isl1208_of_match), 910 908 }, 911 - .probe = isl1208_probe, 909 + .probe_new = isl1208_probe, 912 910 .id_table = isl1208_id, 913 911 }; 914 912

+7 -6

drivers/rtc/rtc-m41t80.c

··· 692 692 * @ppos: pointer to the position to write. No seeks allowed 693 693 * 694 694 * A write to a watchdog device is defined as a keepalive signal. Any 695 - * write of data will do, as we we don't define content meaning. 695 + * write of data will do, as we don't define content meaning. 696 696 */ 697 697 static ssize_t wdt_write(struct file *file, const char __user *buf, 698 698 size_t count, loff_t *ppos) ··· 876 876 ***************************************************************************** 877 877 */ 878 878 879 - static int m41t80_probe(struct i2c_client *client, 880 - const struct i2c_device_id *id) 879 + static int m41t80_probe(struct i2c_client *client) 881 880 { 882 881 struct i2c_adapter *adapter = client->adapter; 883 882 int rc = 0; ··· 896 897 return -ENOMEM; 897 898 898 899 m41t80_data->client = client; 899 - if (client->dev.of_node) 900 + if (client->dev.of_node) { 900 901 m41t80_data->features = (unsigned long) 901 902 of_device_get_match_data(&client->dev); 902 - else 903 + } else { 904 + const struct i2c_device_id *id = i2c_match_id(m41t80_id, client); 903 905 m41t80_data->features = id->driver_data; 906 + } 904 907 i2c_set_clientdata(client, m41t80_data); 905 908 906 909 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev); ··· 1008 1007 .of_match_table = of_match_ptr(m41t80_of_match), 1009 1008 .pm = &m41t80_pm, 1010 1009 }, 1011 - .probe = m41t80_probe, 1010 + .probe_new = m41t80_probe, 1012 1011 .remove = m41t80_remove, 1013 1012 .id_table = m41t80_id, 1014 1013 };

+1 -11

drivers/rtc/rtc-msc313.c

··· 212 212 return ret; 213 213 } 214 214 215 - clk = devm_clk_get(dev, NULL); 215 + clk = devm_clk_get_enabled(dev, NULL); 216 216 if (IS_ERR(clk)) { 217 217 dev_err(dev, "No input reference clock\n"); 218 218 return PTR_ERR(clk); 219 219 } 220 - 221 - ret = clk_prepare_enable(clk); 222 - if (ret) { 223 - dev_err(dev, "Failed to enable the reference clock, %d\n", ret); 224 - return ret; 225 - } 226 - 227 - ret = devm_add_action_or_reset(dev, (void (*) (void *))clk_disable_unprepare, clk); 228 - if (ret) 229 - return ret; 230 220 231 221 rate = clk_get_rate(clk); 232 222 writew(rate & 0xFFFF, priv->rtc_base + REG_RTC_FREQ_CW_L);

+3 -1

drivers/rtc/rtc-mxc_v2.c

··· 336 336 } 337 337 338 338 pdata->rtc = devm_rtc_allocate_device(&pdev->dev); 339 - if (IS_ERR(pdata->rtc)) 339 + if (IS_ERR(pdata->rtc)) { 340 + clk_disable_unprepare(pdata->clk); 340 341 return PTR_ERR(pdata->rtc); 342 + } 341 343 342 344 pdata->rtc->ops = &mxc_rtc_ops; 343 345 pdata->rtc->range_max = U32_MAX;

+2 -3

drivers/rtc/rtc-nct3018y.c

··· 452 452 .ioctl = nct3018y_ioctl, 453 453 }; 454 454 455 - static int nct3018y_probe(struct i2c_client *client, 456 - const struct i2c_device_id *id) 455 + static int nct3018y_probe(struct i2c_client *client) 457 456 { 458 457 struct nct3018y *nct3018y; 459 458 int err, flags; ··· 540 541 .name = "rtc-nct3018y", 541 542 .of_match_table = of_match_ptr(nct3018y_of_match), 542 543 }, 543 - .probe = nct3018y_probe, 544 + .probe_new = nct3018y_probe, 544 545 .id_table = nct3018y_id, 545 546 }; 546 547

+11 -11

drivers/rtc/rtc-pcf2127.c

··· 885 885 886 886 static struct i2c_driver pcf2127_i2c_driver; 887 887 888 - static int pcf2127_i2c_probe(struct i2c_client *client, 889 - const struct i2c_device_id *id) 888 + static const struct i2c_device_id pcf2127_i2c_id[] = { 889 + { "pcf2127", 1 }, 890 + { "pcf2129", 0 }, 891 + { "pca2129", 0 }, 892 + { } 893 + }; 894 + MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id); 895 + 896 + static int pcf2127_i2c_probe(struct i2c_client *client) 890 897 { 898 + const struct i2c_device_id *id = i2c_match_id(pcf2127_i2c_id, client); 891 899 struct regmap *regmap; 892 900 static const struct regmap_config config = { 893 901 .reg_bits = 8, ··· 918 910 pcf2127_i2c_driver.driver.name, id->driver_data); 919 911 } 920 912 921 - static const struct i2c_device_id pcf2127_i2c_id[] = { 922 - { "pcf2127", 1 }, 923 - { "pcf2129", 0 }, 924 - { "pca2129", 0 }, 925 - { } 926 - }; 927 - MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id); 928 - 929 913 static struct i2c_driver pcf2127_i2c_driver = { 930 914 .driver = { 931 915 .name = "rtc-pcf2127-i2c", 932 916 .of_match_table = of_match_ptr(pcf2127_of_match), 933 917 }, 934 - .probe = pcf2127_i2c_probe, 918 + .probe_new = pcf2127_i2c_probe, 935 919 .id_table = pcf2127_i2c_id, 936 920 }; 937 921

+5 -5

drivers/rtc/rtc-pcf85063.c

··· 169 169 if (ret) 170 170 return ret; 171 171 172 - alrm->time.tm_sec = bcd2bin(buf[0]); 173 - alrm->time.tm_min = bcd2bin(buf[1]); 174 - alrm->time.tm_hour = bcd2bin(buf[2]); 175 - alrm->time.tm_mday = bcd2bin(buf[3]); 172 + alrm->time.tm_sec = bcd2bin(buf[0] & 0x7f); 173 + alrm->time.tm_min = bcd2bin(buf[1] & 0x7f); 174 + alrm->time.tm_hour = bcd2bin(buf[2] & 0x3f); 175 + alrm->time.tm_mday = bcd2bin(buf[3] & 0x3f); 176 176 177 177 ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &val); 178 178 if (ret) ··· 424 424 unsigned int buf; 425 425 int ret; 426 426 427 - ret = regmap_read(pcf85063->regmap, PCF85063_REG_OFFSET, &buf); 427 + ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &buf); 428 428 if (ret < 0) 429 429 return ret; 430 430 buf &= PCF85063_REG_CLKO_F_MASK;

+10 -10

drivers/rtc/rtc-pcf8523.c

··· 99 99 static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm) 100 100 { 101 101 struct pcf8523 *pcf8523 = dev_get_drvdata(dev); 102 - u8 regs[7]; 102 + u8 regs[10]; 103 103 int err; 104 104 105 - err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_SECONDS, regs, 105 + err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_CONTROL1, regs, 106 106 sizeof(regs)); 107 107 if (err < 0) 108 108 return err; 109 109 110 - if (regs[0] & PCF8523_SECONDS_OS) 110 + if ((regs[0] & PCF8523_CONTROL1_STOP) || (regs[3] & PCF8523_SECONDS_OS)) 111 111 return -EINVAL; 112 112 113 - tm->tm_sec = bcd2bin(regs[0] & 0x7f); 114 - tm->tm_min = bcd2bin(regs[1] & 0x7f); 115 - tm->tm_hour = bcd2bin(regs[2] & 0x3f); 116 - tm->tm_mday = bcd2bin(regs[3] & 0x3f); 117 - tm->tm_wday = regs[4] & 0x7; 118 - tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1; 119 - tm->tm_year = bcd2bin(regs[6]) + 100; 113 + tm->tm_sec = bcd2bin(regs[3] & 0x7f); 114 + tm->tm_min = bcd2bin(regs[4] & 0x7f); 115 + tm->tm_hour = bcd2bin(regs[5] & 0x3f); 116 + tm->tm_mday = bcd2bin(regs[6] & 0x3f); 117 + tm->tm_wday = regs[7] & 0x7; 118 + tm->tm_mon = bcd2bin(regs[8] & 0x1f) - 1; 119 + tm->tm_year = bcd2bin(regs[9]) + 100; 120 120 121 121 return 0; 122 122 }

+2

drivers/rtc/rtc-pcf8563.c

··· 567 567 client->irq); 568 568 return err; 569 569 } 570 + } else { 571 + clear_bit(RTC_FEATURE_ALARM, pcf8563->rtc->features); 570 572 } 571 573 572 574 err = devm_rtc_register_device(pcf8563->rtc);

+4 -4

drivers/rtc/rtc-pic32.c

··· 324 324 325 325 spin_lock_init(&pdata->alarm_lock); 326 326 327 + pdata->rtc = devm_rtc_allocate_device(&pdev->dev); 328 + if (IS_ERR(pdata->rtc)) 329 + return PTR_ERR(pdata->rtc); 330 + 327 331 clk_prepare_enable(pdata->clk); 328 332 329 333 pic32_rtc_enable(pdata, 1); 330 334 331 335 device_init_wakeup(&pdev->dev, 1); 332 - 333 - pdata->rtc = devm_rtc_allocate_device(&pdev->dev); 334 - if (IS_ERR(pdata->rtc)) 335 - return PTR_ERR(pdata->rtc); 336 336 337 337 pdata->rtc->ops = &pic32_rtcops; 338 338 pdata->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;

-1

drivers/rtc/rtc-pm8xxx.c

··· 461 461 */ 462 462 static const struct of_device_id pm8xxx_id_table[] = { 463 463 { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs }, 464 - { .compatible = "qcom,pm8018-rtc", .data = &pm8921_regs }, 465 464 { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs }, 466 465 { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs }, 467 466 { .compatible = "qcom,pmk8350-rtc", .data = &pmk8350_regs },

+20 -27

drivers/rtc/rtc-rk808.c

··· 14 14 #include <linux/bcd.h> 15 15 #include <linux/mfd/rk808.h> 16 16 #include <linux/platform_device.h> 17 - #include <linux/i2c.h> 18 17 19 18 /* RTC_CTRL_REG bitfields */ 20 19 #define BIT_RTC_CTRL_REG_STOP_RTC_M BIT(0) ··· 50 51 }; 51 52 52 53 struct rk808_rtc { 53 - struct rk808 *rk808; 54 + struct regmap *regmap; 54 55 struct rtc_device *rtc; 55 56 struct rk_rtc_compat_reg *creg; 56 57 int irq; ··· 96 97 static int rk808_rtc_readtime(struct device *dev, struct rtc_time *tm) 97 98 { 98 99 struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); 99 - struct rk808 *rk808 = rk808_rtc->rk808; 100 100 u8 rtc_data[NUM_TIME_REGS]; 101 101 int ret; 102 102 103 103 /* Force an update of the shadowed registers right now */ 104 - ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 104 + ret = regmap_update_bits(rk808_rtc->regmap, rk808_rtc->creg->ctrl_reg, 105 105 BIT_RTC_CTRL_REG_RTC_GET_TIME, 106 106 BIT_RTC_CTRL_REG_RTC_GET_TIME); 107 107 if (ret) { ··· 114 116 * 32khz. If we clear the GET_TIME bit here, the time of i2c transfer 115 117 * certainly more than 31.25us: 16 * 2.5us at 400kHz bus frequency. 116 118 */ 117 - ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 119 + ret = regmap_update_bits(rk808_rtc->regmap, rk808_rtc->creg->ctrl_reg, 118 120 BIT_RTC_CTRL_REG_RTC_GET_TIME, 119 121 0); 120 122 if (ret) { ··· 122 124 return ret; 123 125 } 124 126 125 - ret = regmap_bulk_read(rk808->regmap, rk808_rtc->creg->seconds_reg, 127 + ret = regmap_bulk_read(rk808_rtc->regmap, rk808_rtc->creg->seconds_reg, 126 128 rtc_data, NUM_TIME_REGS); 127 129 if (ret) { 128 130 dev_err(dev, "Failed to bulk read rtc_data: %d\n", ret); ··· 146 148 static int rk808_rtc_set_time(struct device *dev, struct rtc_time *tm) 147 149 { 148 150 struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); 149 - struct rk808 *rk808 = rk808_rtc->rk808; 150 151 u8 rtc_data[NUM_TIME_REGS]; 151 152 int ret; 152 153 ··· 160 163 rtc_data[6] = bin2bcd(tm->tm_wday); 161 164 162 165 /* Stop RTC while updating the RTC registers */ 163 - ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 166 + ret = regmap_update_bits(rk808_rtc->regmap, rk808_rtc->creg->ctrl_reg, 164 167 BIT_RTC_CTRL_REG_STOP_RTC_M, 165 168 BIT_RTC_CTRL_REG_STOP_RTC_M); 166 169 if (ret) { ··· 168 171 return ret; 169 172 } 170 173 171 - ret = regmap_bulk_write(rk808->regmap, rk808_rtc->creg->seconds_reg, 174 + ret = regmap_bulk_write(rk808_rtc->regmap, rk808_rtc->creg->seconds_reg, 172 175 rtc_data, NUM_TIME_REGS); 173 176 if (ret) { 174 177 dev_err(dev, "Failed to bull write rtc_data: %d\n", ret); 175 178 return ret; 176 179 } 177 180 /* Start RTC again */ 178 - ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 181 + ret = regmap_update_bits(rk808_rtc->regmap, rk808_rtc->creg->ctrl_reg, 179 182 BIT_RTC_CTRL_REG_STOP_RTC_M, 0); 180 183 if (ret) { 181 184 dev_err(dev, "Failed to update RTC control: %d\n", ret); ··· 188 191 static int rk808_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) 189 192 { 190 193 struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); 191 - struct rk808 *rk808 = rk808_rtc->rk808; 192 194 u8 alrm_data[NUM_ALARM_REGS]; 193 195 uint32_t int_reg; 194 196 int ret; 195 197 196 - ret = regmap_bulk_read(rk808->regmap, 198 + ret = regmap_bulk_read(rk808_rtc->regmap, 197 199 rk808_rtc->creg->alarm_seconds_reg, 198 200 alrm_data, NUM_ALARM_REGS); 199 201 if (ret) { ··· 208 212 alrm->time.tm_year = (bcd2bin(alrm_data[5] & YEARS_REG_MSK)) + 100; 209 213 rockchip_to_gregorian(&alrm->time); 210 214 211 - ret = regmap_read(rk808->regmap, rk808_rtc->creg->int_reg, &int_reg); 215 + ret = regmap_read(rk808_rtc->regmap, rk808_rtc->creg->int_reg, &int_reg); 212 216 if (ret) { 213 217 dev_err(dev, "Failed to read RTC INT REG: %d\n", ret); 214 218 return ret; ··· 224 228 225 229 static int rk808_rtc_stop_alarm(struct rk808_rtc *rk808_rtc) 226 230 { 227 - struct rk808 *rk808 = rk808_rtc->rk808; 228 231 int ret; 229 232 230 - ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg, 233 + ret = regmap_update_bits(rk808_rtc->regmap, rk808_rtc->creg->int_reg, 231 234 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, 0); 232 235 233 236 return ret; ··· 234 239 235 240 static int rk808_rtc_start_alarm(struct rk808_rtc *rk808_rtc) 236 241 { 237 - struct rk808 *rk808 = rk808_rtc->rk808; 238 242 int ret; 239 243 240 - ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg, 244 + ret = regmap_update_bits(rk808_rtc->regmap, rk808_rtc->creg->int_reg, 241 245 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, 242 246 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); 243 247 ··· 246 252 static int rk808_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 247 253 { 248 254 struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); 249 - struct rk808 *rk808 = rk808_rtc->rk808; 250 255 u8 alrm_data[NUM_ALARM_REGS]; 251 256 int ret; 252 257 ··· 265 272 alrm_data[4] = bin2bcd(alrm->time.tm_mon + 1); 266 273 alrm_data[5] = bin2bcd(alrm->time.tm_year - 100); 267 274 268 - ret = regmap_bulk_write(rk808->regmap, 275 + ret = regmap_bulk_write(rk808_rtc->regmap, 269 276 rk808_rtc->creg->alarm_seconds_reg, 270 277 alrm_data, NUM_ALARM_REGS); 271 278 if (ret) { ··· 306 313 static irqreturn_t rk808_alarm_irq(int irq, void *data) 307 314 { 308 315 struct rk808_rtc *rk808_rtc = data; 309 - struct rk808 *rk808 = rk808_rtc->rk808; 310 - struct i2c_client *client = rk808->i2c; 311 316 int ret; 312 317 313 - ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg, 318 + ret = regmap_write(rk808_rtc->regmap, rk808_rtc->creg->status_reg, 314 319 RTC_STATUS_MASK); 315 320 if (ret) { 316 - dev_err(&client->dev, 321 + dev_err(&rk808_rtc->rtc->dev, 317 322 "%s:Failed to update RTC status: %d\n", __func__, ret); 318 323 return ret; 319 324 } 320 325 321 326 rtc_update_irq(rk808_rtc->rtc, 1, RTC_IRQF | RTC_AF); 322 - dev_dbg(&client->dev, 327 + dev_dbg(&rk808_rtc->rtc->dev, 323 328 "%s:irq=%d\n", __func__, irq); 324 329 return IRQ_HANDLED; 325 330 } ··· 395 404 break; 396 405 } 397 406 platform_set_drvdata(pdev, rk808_rtc); 398 - rk808_rtc->rk808 = rk808; 407 + rk808_rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL); 408 + if (!rk808_rtc->regmap) 409 + return -ENODEV; 399 410 400 411 /* start rtc running by default, and use shadowed timer. */ 401 - ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 412 + ret = regmap_update_bits(rk808_rtc->regmap, rk808_rtc->creg->ctrl_reg, 402 413 BIT_RTC_CTRL_REG_STOP_RTC_M | 403 414 BIT_RTC_CTRL_REG_RTC_READSEL_M, 404 415 BIT_RTC_CTRL_REG_RTC_READSEL_M); ··· 410 417 return ret; 411 418 } 412 419 413 - ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg, 420 + ret = regmap_write(rk808_rtc->regmap, rk808_rtc->creg->status_reg, 414 421 RTC_STATUS_MASK); 415 422 if (ret) { 416 423 dev_err(&pdev->dev,

+3 -3

drivers/rtc/rtc-rs5c313.c

··· 2 2 * Ricoh RS5C313 RTC device/driver 3 3 * Copyright (C) 2007 Nobuhiro Iwamatsu 4 4 * 5 - * 2005-09-19 modifed by kogiidena 5 + * 2005-09-19 modified by kogiidena 6 6 * 7 7 * Based on the old drivers/char/rs5c313_rtc.c by: 8 8 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> ··· 36 36 * 1.11a Daniele Bellucci: Audit create_proc_read_entry in rtc_init 37 37 * 1.12 Venkatesh Pallipadi: Hooks for emulating rtc on HPET base-timer 38 38 * CONFIG_HPET_EMULATE_RTC 39 - * 1.13 Nobuhiro Iwamatsu: Updata driver. 39 + * 1.13 Nobuhiro Iwamatsu: Update driver. 40 40 */ 41 41 42 42 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ··· 280 280 while (1) { 281 281 RS5C313_CEENABLE; /* CE:H */ 282 282 283 - /* Initiatlize control reg. 24 hour */ 283 + /* Initialize control reg. 24 hour */ 284 284 rs5c313_write_cntreg(0x04); 285 285 286 286 if (!(rs5c313_read_cntreg() & RS5C313_CNTREG_ADJ_BSY))

+7 -6

drivers/rtc/rtc-rs5c372.c

··· 150 150 * least 80219 chips; this works around that bug. 151 151 * 152 152 * The third method on the other hand doesn't work for the SMBus-only 153 - * configurations, so we use the the first method there, stripping off 153 + * configurations, so we use the first method there, stripping off 154 154 * the extra register in the process. 155 155 */ 156 156 if (rs5c->smbus) { ··· 791 791 return 0; 792 792 } 793 793 794 - static int rs5c372_probe(struct i2c_client *client, 795 - const struct i2c_device_id *id) 794 + static int rs5c372_probe(struct i2c_client *client) 796 795 { 797 796 int err = 0; 798 797 int smbus_mode = 0; ··· 825 826 826 827 rs5c372->client = client; 827 828 i2c_set_clientdata(client, rs5c372); 828 - if (client->dev.of_node) 829 + if (client->dev.of_node) { 829 830 rs5c372->type = (enum rtc_type) 830 831 of_device_get_match_data(&client->dev); 831 - else 832 + } else { 833 + const struct i2c_device_id *id = i2c_match_id(rs5c372_id, client); 832 834 rs5c372->type = id->driver_data; 835 + } 833 836 834 837 /* we read registers 0x0f then 0x00-0x0f; skip the first one */ 835 838 rs5c372->regs = &rs5c372->buf[1]; ··· 921 920 .name = "rtc-rs5c372", 922 921 .of_match_table = of_match_ptr(rs5c372_of_match), 923 922 }, 924 - .probe = rs5c372_probe, 923 + .probe_new = rs5c372_probe, 925 924 .remove = rs5c372_remove, 926 925 .id_table = rs5c372_id, 927 926 };

+12 -1

drivers/rtc/rtc-rv3028.c

··· 902 902 return PTR_ERR(rv3028->rtc); 903 903 904 904 if (client->irq > 0) { 905 + unsigned long flags; 906 + 907 + /* 908 + * If flags = 0, devm_request_threaded_irq() will use IRQ flags 909 + * obtained from device tree. 910 + */ 911 + if (dev_fwnode(&client->dev)) 912 + flags = 0; 913 + else 914 + flags = IRQF_TRIGGER_LOW; 915 + 905 916 ret = devm_request_threaded_irq(&client->dev, client->irq, 906 917 NULL, rv3028_handle_irq, 907 - IRQF_TRIGGER_LOW | IRQF_ONESHOT, 918 + flags | IRQF_ONESHOT, 908 919 "rv3028", rv3028); 909 920 if (ret) { 910 921 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");

+1

drivers/rtc/rtc-rv3029c2.c

··· 17 17 #include <linux/of.h> 18 18 #include <linux/hwmon.h> 19 19 #include <linux/hwmon-sysfs.h> 20 + #include <linux/kstrtox.h> 20 21 #include <linux/regmap.h> 21 22 22 23 /* Register map */

+16 -14

drivers/rtc/rtc-rv8803.c

··· 576 576 return 0; 577 577 } 578 578 579 - static int rv8803_probe(struct i2c_client *client, 580 - const struct i2c_device_id *id) 579 + static const struct i2c_device_id rv8803_id[] = { 580 + { "rv8803", rv_8803 }, 581 + { "rv8804", rx_8804 }, 582 + { "rx8803", rx_8803 }, 583 + { "rx8900", rx_8900 }, 584 + { } 585 + }; 586 + MODULE_DEVICE_TABLE(i2c, rv8803_id); 587 + 588 + static int rv8803_probe(struct i2c_client *client) 581 589 { 582 590 struct i2c_adapter *adapter = client->adapter; 583 591 struct rv8803_data *rv8803; ··· 613 605 614 606 mutex_init(&rv8803->flags_lock); 615 607 rv8803->client = client; 616 - if (client->dev.of_node) 608 + if (client->dev.of_node) { 617 609 rv8803->type = (enum rv8803_type) 618 610 of_device_get_match_data(&client->dev); 619 - else 611 + } else { 612 + const struct i2c_device_id *id = i2c_match_id(rv8803_id, client); 613 + 620 614 rv8803->type = id->driver_data; 615 + } 621 616 i2c_set_clientdata(client, rv8803); 622 617 623 618 flags = rv8803_read_reg(client, RV8803_FLAG); ··· 677 666 return 0; 678 667 } 679 668 680 - static const struct i2c_device_id rv8803_id[] = { 681 - { "rv8803", rv_8803 }, 682 - { "rv8804", rx_8804 }, 683 - { "rx8803", rx_8803 }, 684 - { "rx8900", rx_8900 }, 685 - { } 686 - }; 687 - MODULE_DEVICE_TABLE(i2c, rv8803_id); 688 - 689 669 static const __maybe_unused struct of_device_id rv8803_of_match[] = { 690 670 { 691 671 .compatible = "microcrystal,rv8803", ··· 703 701 .name = "rtc-rv8803", 704 702 .of_match_table = of_match_ptr(rv8803_of_match), 705 703 }, 706 - .probe = rv8803_probe, 704 + .probe_new = rv8803_probe, 707 705 .id_table = rv8803_id, 708 706 }; 709 707 module_i2c_driver(rv8803_driver);

+1 -1

drivers/rtc/rtc-rx6110.c

··· 376 376 }; 377 377 MODULE_DEVICE_TABLE(spi, rx6110_spi_id); 378 378 379 - static const struct of_device_id rx6110_spi_of_match[] = { 379 + static const __maybe_unused struct of_device_id rx6110_spi_of_match[] = { 380 380 { .compatible = "epson,rx6110" }, 381 381 { }, 382 382 };

+4 -3

drivers/rtc/rtc-rx8025.c

··· 19 19 #include <linux/bitops.h> 20 20 #include <linux/i2c.h> 21 21 #include <linux/kernel.h> 22 + #include <linux/kstrtox.h> 22 23 #include <linux/module.h> 23 24 #include <linux/rtc.h> 24 25 ··· 520 519 .attrs = rx8025_attrs, 521 520 }; 522 521 523 - static int rx8025_probe(struct i2c_client *client, 524 - const struct i2c_device_id *id) 522 + static int rx8025_probe(struct i2c_client *client) 525 523 { 524 + const struct i2c_device_id *id = i2c_match_id(rx8025_id, client); 526 525 struct i2c_adapter *adapter = client->adapter; 527 526 struct rx8025_data *rx8025; 528 527 int err = 0; ··· 581 580 .driver = { 582 581 .name = "rtc-rx8025", 583 582 }, 584 - .probe = rx8025_probe, 583 + .probe_new = rx8025_probe, 585 584 .id_table = rx8025_id, 586 585 }; 587 586

+3 -1

drivers/rtc/rtc-rzn1.c

··· 355 355 set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->rtcdev->features); 356 356 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtcdev->features); 357 357 358 - devm_pm_runtime_enable(&pdev->dev); 358 + ret = devm_pm_runtime_enable(&pdev->dev); 359 + if (ret < 0) 360 + return ret; 359 361 ret = pm_runtime_resume_and_get(&pdev->dev); 360 362 if (ret < 0) 361 363 return ret;

+2 -4

drivers/rtc/rtc-s35390a.c

··· 211 211 { 212 212 struct i2c_client *client = to_i2c_client(dev); 213 213 struct s35390a *s35390a = i2c_get_clientdata(client); 214 - int i, err; 214 + int i; 215 215 char buf[7], status; 216 216 217 217 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d mday=%d, " ··· 234 234 for (i = 0; i < 7; ++i) 235 235 buf[i] = bitrev8(buf[i]); 236 236 237 - err = s35390a_set_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); 238 - 239 - return err; 237 + return s35390a_set_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); 240 238 } 241 239 242 240 static int s35390a_rtc_read_time(struct device *dev, struct rtc_time *tm)

+3 -8

drivers/rtc/rtc-s3c.c

··· 429 429 return PTR_ERR(info->base); 430 430 431 431 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc"); 432 - if (IS_ERR(info->rtc_clk)) { 433 - ret = PTR_ERR(info->rtc_clk); 434 - if (ret != -EPROBE_DEFER) 435 - dev_err(&pdev->dev, "failed to find rtc clock\n"); 436 - else 437 - dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n"); 438 - return ret; 439 - } 432 + if (IS_ERR(info->rtc_clk)) 433 + return dev_err_probe(&pdev->dev, PTR_ERR(info->rtc_clk), 434 + "failed to find rtc clock\n"); 440 435 ret = clk_prepare_enable(info->rtc_clk); 441 436 if (ret) 442 437 return ret;

+14 -2

drivers/rtc/rtc-snvs.c

··· 32 32 #define SNVS_LPPGDR_INIT 0x41736166 33 33 #define CNTR_TO_SECS_SH 15 34 34 35 + /* The maximum RTC clock cycles that are allowed to pass between two 36 + * consecutive clock counter register reads. If the values are corrupted a 37 + * bigger difference is expected. The RTC frequency is 32kHz. With 320 cycles 38 + * we end at 10ms which should be enough for most cases. If it once takes 39 + * longer than expected we do a retry. 40 + */ 41 + #define MAX_RTC_READ_DIFF_CYCLES 320 42 + 35 43 struct snvs_rtc_data { 36 44 struct rtc_device *rtc; 37 45 struct regmap *regmap; ··· 64 56 static u32 rtc_read_lp_counter(struct snvs_rtc_data *data) 65 57 { 66 58 u64 read1, read2; 59 + s64 diff; 67 60 unsigned int timeout = 100; 68 61 69 62 /* As expected, the registers might update between the read of the LSB ··· 75 66 do { 76 67 read2 = read1; 77 68 read1 = rtc_read_lpsrt(data); 78 - } while (read1 != read2 && --timeout); 69 + diff = read1 - read2; 70 + } while (((diff < 0) || (diff > MAX_RTC_READ_DIFF_CYCLES)) && --timeout); 79 71 if (!timeout) 80 72 dev_err(&data->rtc->dev, "Timeout trying to get valid LPSRT Counter read\n"); 81 73 ··· 88 78 static int rtc_read_lp_counter_lsb(struct snvs_rtc_data *data, u32 *lsb) 89 79 { 90 80 u32 count1, count2; 81 + s32 diff; 91 82 unsigned int timeout = 100; 92 83 93 84 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count1); 94 85 do { 95 86 count2 = count1; 96 87 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count1); 97 - } while (count1 != count2 && --timeout); 88 + diff = count1 - count2; 89 + } while (((diff < 0) || (diff > MAX_RTC_READ_DIFF_CYCLES)) && --timeout); 98 90 if (!timeout) { 99 91 dev_err(&data->rtc->dev, "Timeout trying to get valid LPSRT Counter read\n"); 100 92 return -ETIMEDOUT;

+1

drivers/rtc/rtc-st-lpc.c

··· 238 238 239 239 rtc->clkrate = clk_get_rate(rtc->clk); 240 240 if (!rtc->clkrate) { 241 + clk_disable_unprepare(rtc->clk); 241 242 dev_err(&pdev->dev, "Unable to fetch clock rate\n"); 242 243 return -EINVAL; 243 244 }

+1

drivers/rtc/sysfs.c

··· 6 6 * Author: Alessandro Zummo <a.zummo@towertech.it> 7 7 */ 8 8 9 + #include <linux/kstrtox.h> 9 10 #include <linux/module.h> 10 11 #include <linux/rtc.h> 11 12

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