Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: fsl: correct the bit order issue for DSD
Merge series from Shengjiu Wang <shengjiu.wang@nxp.com>:
The DSD little endian format requires the msb first, the previous
understanding is not correct. The issue is found by testing with
pipewire.
+3
-4
+2
-2
sound/soc/fsl/fsl_micfil.c
+2
-2
sound/soc/fsl/fsl_micfil.c
···
131
131
.fifos = 8,
132
132
.fifo_depth = 32,
133
133
.dataline = 0xf,
134
-
.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U32_BE,
134
+
.formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE,
135
135
.use_edma = true,
136
136
.use_verid = true,
137
137
.volume_sx = false,
···
823
823
break;
824
824
}
825
825
826
-
if (format == SNDRV_PCM_FORMAT_DSD_U32_BE) {
826
+
if (format == SNDRV_PCM_FORMAT_DSD_U32_LE) {
827
827
micfil->dec_bypass = true;
828
828
/*
829
829
* According to equation 29 in RM:
+1
-2
sound/soc/fsl/fsl_sai.c
+1
-2
sound/soc/fsl/fsl_sai.c
···
353
353
break;
354
354
case SND_SOC_DAIFMT_PDM:
355
355
val_cr2 |= FSL_SAI_CR2_BCP;
356
-
val_cr4 &= ~FSL_SAI_CR4_MF;
357
356
sai->is_pdm_mode = true;
358
357
break;
359
358
case SND_SOC_DAIFMT_RIGHT_J:
···
637
638
val_cr5 |= FSL_SAI_CR5_WNW(slot_width);
638
639
val_cr5 |= FSL_SAI_CR5_W0W(slot_width);
639
640
640
-
if (sai->is_lsb_first || sai->is_pdm_mode)
641
+
if (sai->is_lsb_first)
641
642
val_cr5 |= FSL_SAI_CR5_FBT(0);
642
643
else
643
644
val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);