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iio: adc: ad7380: do not store osr in private data structure

Since regmap cache is now enabled, we don't need to store the
oversampling ratio in the private data structure.

Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20250108-ad7380-add-alert-support-v4-3-1751802471ba@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Julien Stephan and committed by
Jonathan Cameron
adc59fe0 85e56052

+65 -14
+65 -14
drivers/iio/adc/ad7380.c
··· 582 582 const struct ad7380_chip_info *chip_info; 583 583 struct spi_device *spi; 584 584 struct regmap *regmap; 585 - unsigned int oversampling_ratio; 586 585 bool resolution_boost_enabled; 587 586 unsigned int ch; 588 587 bool seq; ··· 709 710 return ret; 710 711 } 711 712 713 + /** 714 + * ad7380_regval_to_osr - convert OSR register value to ratio 715 + * @regval: register value to check 716 + * 717 + * Returns: the ratio corresponding to the OSR register. If regval is not in 718 + * bound, return 1 (oversampling disabled) 719 + * 720 + */ 721 + static int ad7380_regval_to_osr(unsigned int regval) 722 + { 723 + if (regval >= ARRAY_SIZE(ad7380_oversampling_ratios)) 724 + return 1; 725 + 726 + return ad7380_oversampling_ratios[regval]; 727 + } 728 + 729 + static int ad7380_get_osr(struct ad7380_state *st, int *val) 730 + { 731 + u32 tmp; 732 + int ret; 733 + 734 + ret = regmap_read(st->regmap, AD7380_REG_ADDR_CONFIG1, &tmp); 735 + if (ret) 736 + return ret; 737 + 738 + *val = ad7380_regval_to_osr(FIELD_GET(AD7380_CONFIG1_OSR, tmp)); 739 + 740 + return 0; 741 + } 742 + 712 743 /* 713 744 * When switching channel, the ADC require an additional settling time. 714 745 * According to the datasheet, data is value on the third CS low. We already ··· 754 725 .unit = SPI_DELAY_UNIT_NSECS, 755 726 } 756 727 }; 757 - int ret; 728 + int oversampling_ratio, ret; 758 729 759 730 if (st->ch == ch) 760 731 return 0; 732 + 733 + ret = ad7380_get_osr(st, &oversampling_ratio); 734 + if (ret) 735 + return ret; 761 736 762 737 ret = regmap_update_bits(st->regmap, 763 738 AD7380_REG_ADDR_CONFIG1, ··· 773 740 774 741 st->ch = ch; 775 742 776 - if (st->oversampling_ratio > 1) 743 + if (oversampling_ratio > 1) 777 744 xfer.delay.value = T_CONVERT_0_NS + 778 - T_CONVERT_X_NS * (st->oversampling_ratio - 1) * 745 + T_CONVERT_X_NS * (oversampling_ratio - 1) * 779 746 st->chip_info->num_simult_channels / AD7380_NUM_SDO_LINES; 780 747 781 748 return spi_sync_transfer(st->spi, &xfer, 1); ··· 786 753 * @st: device instance specific state 787 754 * @scan_type: current scan type 788 755 */ 789 - static void ad7380_update_xfers(struct ad7380_state *st, 756 + static int ad7380_update_xfers(struct ad7380_state *st, 790 757 const struct iio_scan_type *scan_type) 791 758 { 792 759 struct spi_transfer *xfer = st->seq ? st->seq_xfer : st->normal_xfer; 793 760 unsigned int t_convert = T_CONVERT_NS; 761 + int oversampling_ratio, ret; 794 762 795 763 /* 796 764 * In the case of oversampling, conversion time is higher than in normal 797 765 * mode. Technically T_CONVERT_X_NS is lower for some chips, but we use 798 766 * the maximum value for simplicity for now. 799 767 */ 800 - if (st->oversampling_ratio > 1) 768 + ret = ad7380_get_osr(st, &oversampling_ratio); 769 + if (ret) 770 + return ret; 771 + 772 + if (oversampling_ratio > 1) 801 773 t_convert = T_CONVERT_0_NS + T_CONVERT_X_NS * 802 - (st->oversampling_ratio - 1) * 774 + (oversampling_ratio - 1) * 803 775 st->chip_info->num_simult_channels / AD7380_NUM_SDO_LINES; 804 776 805 777 if (st->seq) { ··· 817 779 st->chip_info->num_simult_channels; 818 780 xfer[3].rx_buf = xfer[2].rx_buf + xfer[2].len; 819 781 /* Additional delay required here when oversampling is enabled */ 820 - if (st->oversampling_ratio > 1) 782 + if (oversampling_ratio > 1) 821 783 xfer[2].delay.value = t_convert; 822 784 else 823 785 xfer[2].delay.value = 0; ··· 829 791 xfer[1].len = BITS_TO_BYTES(scan_type->storagebits) * 830 792 st->chip_info->num_simult_channels; 831 793 } 794 + 795 + return 0; 832 796 } 833 797 834 798 static int ad7380_triggered_buffer_preenable(struct iio_dev *indio_dev) ··· 838 798 struct ad7380_state *st = iio_priv(indio_dev); 839 799 const struct iio_scan_type *scan_type; 840 800 struct spi_message *msg = &st->normal_msg; 801 + int ret; 841 802 842 803 /* 843 804 * Currently, we always read all channels at the same time. The scan_type ··· 850 809 851 810 if (st->chip_info->has_mux) { 852 811 unsigned int index; 853 - int ret; 854 812 855 813 /* 856 814 * Depending on the requested scan_mask and current state, ··· 880 840 881 841 } 882 842 883 - ad7380_update_xfers(st, scan_type); 843 + ret = ad7380_update_xfers(st, scan_type); 844 + if (ret) 845 + return ret; 884 846 885 847 return spi_optimize_message(st->spi, msg); 886 848 } ··· 955 913 return ret; 956 914 } 957 915 958 - ad7380_update_xfers(st, scan_type); 916 + ret = ad7380_update_xfers(st, scan_type); 917 + if (ret) 918 + return ret; 959 919 960 920 ret = spi_sync(st->spi, &st->normal_msg); 961 921 if (ret < 0) ··· 1035 991 1036 992 return IIO_VAL_INT; 1037 993 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 1038 - *val = st->oversampling_ratio; 994 + ret = iio_device_claim_direct_mode(indio_dev); 995 + if (ret) 996 + return ret; 997 + 998 + ret = ad7380_get_osr(st, val); 999 + 1000 + iio_device_release_direct_mode(indio_dev); 1001 + 1002 + if (ret) 1003 + return ret; 1039 1004 1040 1005 return IIO_VAL_INT; 1041 1006 default: ··· 1111 1058 if (ret) 1112 1059 return ret; 1113 1060 1114 - st->oversampling_ratio = val; 1115 1061 st->resolution_boost_enabled = boost; 1116 1062 1117 1063 /* ··· 1186 1134 } 1187 1135 1188 1136 /* This is the default value after reset. */ 1189 - st->oversampling_ratio = 1; 1190 1137 st->ch = 0; 1191 1138 st->seq = false; 1192 1139