Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm/disp: set num_planes, fetch_mode and tile_height in INTERLEAVED_RGB_FMT_TILED
All interleaved compressed RGB formats use only 2 planes,
MDP_FETCH_LINEAR and MDP_TILE_HEIGHT_UBWC. Specify num_planes,
fetch_mode and tile_height directly in the macro and remove unused
parameters.
Patchwork: https://patchwork.freedesktop.org/patch/688166/
Link: https://lore.kernel.org/r/20251114-dpu-formats-v3-3-cae312379d49@oss.qualcomm.com
Tested-by: Luca Weiss <luca.weiss@fairphone.com> # qcm6490-fairphone-fp5
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
+13
-22
+13
-22
drivers/gpu/drm/msm/disp/mdp_format.c
+13
-22
drivers/gpu/drm/msm/disp/mdp_format.c
···
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}
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#define INTERLEAVED_RGB_FMT_TILED(fmt, a, r, g, b, e0, e1, e2, e3, uc, \
90
-
alpha, bp, flg, fm, np, th) \
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+
alpha, bp, flg) \
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{ \
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.pixel_format = DRM_FORMAT_ ## fmt, \
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.fetch_type = MDP_PLANE_INTERLEAVED, \
···
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.chroma_sample = CHROMA_FULL, \
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.unpack_count = uc, \
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.bpp = bp, \
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-
.fetch_mode = fm, \
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+
.fetch_mode = MDP_FETCH_UBWC, \
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.flags = MSM_FORMAT_FLAG_UNPACK_TIGHT | flg, \
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-
.num_planes = np, \
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-
.tile_height = th \
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+
.num_planes = 2, \
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+
.tile_height = MDP_TILE_HEIGHT_UBWC, \
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}
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#define INTERLEAVED_YUV_FMT(fmt, a, r, g, b, e0, e1, e2, e3, \
···
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INTERLEAVED_RGB_FMT_TILED(BGR565,
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0, BPC5, BPC6, BPC5,
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C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
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false, 2, MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
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+
false, 2, MSM_FORMAT_FLAG_COMPRESSED),
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INTERLEAVED_RGB_FMT_TILED(ABGR8888,
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BPC8A, BPC8, BPC8, BPC8,
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C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
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-
true, 4, MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
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+
true, 4, MSM_FORMAT_FLAG_COMPRESSED),
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/* ARGB8888 and ABGR8888 purposely have the same color
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* ordering. The hardware only supports ABGR8888 UBWC
···
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INTERLEAVED_RGB_FMT_TILED(ARGB8888,
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BPC8A, BPC8, BPC8, BPC8,
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C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
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-
true, 4, MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
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+
true, 4, MSM_FORMAT_FLAG_COMPRESSED),
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INTERLEAVED_RGB_FMT_TILED(XBGR8888,
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BPC8A, BPC8, BPC8, BPC8,
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C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
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-
false, 4, MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
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+
false, 4, MSM_FORMAT_FLAG_COMPRESSED),
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512
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INTERLEAVED_RGB_FMT_TILED(XRGB8888,
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BPC8A, BPC8, BPC8, BPC8,
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C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
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-
false, 4, MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
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+
false, 4, MSM_FORMAT_FLAG_COMPRESSED),
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INTERLEAVED_RGB_FMT_TILED(ABGR2101010,
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BPC8A, BPC8, BPC8, BPC8,
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C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
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-
true, 4, MSM_FORMAT_FLAG_DX | MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
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+
true, 4, MSM_FORMAT_FLAG_DX | MSM_FORMAT_FLAG_COMPRESSED),
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INTERLEAVED_RGB_FMT_TILED(XBGR2101010,
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BPC8A, BPC8, BPC8, BPC8,
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525
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
528
-
true, 4, MSM_FORMAT_FLAG_DX | MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
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+
true, 4, MSM_FORMAT_FLAG_DX | MSM_FORMAT_FLAG_COMPRESSED),
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527
531
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INTERLEAVED_RGB_FMT_TILED(XRGB2101010,
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BPC8A, BPC8, BPC8, BPC8,
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530
C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
534
-
true, 4, MSM_FORMAT_FLAG_DX | MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
531
+
true, 4, MSM_FORMAT_FLAG_DX | MSM_FORMAT_FLAG_COMPRESSED),
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532
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533
/* XRGB2101010 and ARGB2101010 purposely have the same color
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* ordering. The hardware only supports ARGB2101010 UBWC
···
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INTERLEAVED_RGB_FMT_TILED(ARGB2101010,
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BPC8A, BPC8, BPC8, BPC8,
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C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4,
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-
true, 4, MSM_FORMAT_FLAG_DX | MSM_FORMAT_FLAG_COMPRESSED,
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-
MDP_FETCH_UBWC, 2, MDP_TILE_HEIGHT_UBWC),
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+
true, 4, MSM_FORMAT_FLAG_DX | MSM_FORMAT_FLAG_COMPRESSED),
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541
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PSEUDO_YUV_FMT_TILED(NV12,
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0, BPC8, BPC8, BPC8,