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perf vendor events: Move PM_BR_MPRED_CMPL event for power10 platform

Move PM_BR_MPRED_CMPL event from cache.json to frontend.json file
for power10 platform

Reviewed-by: Ian Rogers <irogers@google.com>
Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Cc: Disha Goel <disgoel@linux.vnet.ibm.com>
Cc: Hari Bathini <hbathini@linux.ibm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Link: https://lore.kernel.org/r/20240827053206.538814-3-kjain@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

authored by

Kajol Jain and committed by
Arnaldo Carvalho de Melo
adf50a6e 0edee819

+5 -5
-5
tools/perf/pmu-events/arch/powerpc/power10/cache.json
··· 18 18 "EventCode": "0x300F4", 19 19 "EventName": "PM_RUN_INST_CMPL_CONC", 20 20 "BriefDescription": "PowerPC instruction completed by this thread when all threads in the core had the run-latch set." 21 - }, 22 - { 23 - "EventCode": "0x400F6", 24 - "EventName": "PM_BR_MPRED_CMPL", 25 - "BriefDescription": "A mispredicted branch completed. Includes direction and target." 26 21 } 27 22 ]
+5
tools/perf/pmu-events/arch/powerpc/power10/frontend.json
··· 95 95 "BriefDescription": "Data TLB hit (DERAT reload) page size 1G. Implies radix translation. When MMCR1[16]=0 this event counts only for demand misses. When MMCR1[16]=1 this event includes demand misses and prefetches." 96 96 }, 97 97 { 98 + "EventCode": "0x400F6", 99 + "EventName": "PM_BR_MPRED_CMPL", 100 + "BriefDescription": "A mispredicted branch completed. Includes direction and target." 101 + }, 102 + { 98 103 "EventCode": "0x400FC", 99 104 "EventName": "PM_ITLB_MISS", 100 105 "BriefDescription": "Instruction TLB reload (after a miss), all page sizes. Includes only demand misses."