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Merge branch 'net-stmmac-cleanups'

Russell King says:

====================
net: stmmac: cleanups

This series removes various redundant items in the stmmac driver:

- the unused TBI and RTBI PCS flags
- the NULL pointer initialisations for PCS methods in dwxgmac2
- the stmmac_pcs_rane() method which is never called, and it's
associated implementations
- the redundant netif_carrier_off()s

Finally, it replaces asm/io.h with the preferred linux/io.h.
====================

Link: https://lore.kernel.org/r/Zlbp7xdUZAXblOZJ@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

+26 -88
-2
drivers/net/ethernet/stmicro/stmmac/common.h
··· 271 271 /* PCS defines */ 272 272 #define STMMAC_PCS_RGMII (1 << 0) 273 273 #define STMMAC_PCS_SGMII (1 << 1) 274 - #define STMMAC_PCS_TBI (1 << 2) 275 - #define STMMAC_PCS_RTBI (1 << 3) 276 274 277 275 #define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */ 278 276
+12 -12
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
··· 605 605 return 0; 606 606 } 607 607 608 + static void ethqos_set_serdes_speed(struct qcom_ethqos *ethqos, int speed) 609 + { 610 + if (ethqos->serdes_speed != speed) { 611 + phy_set_speed(ethqos->serdes_phy, speed); 612 + ethqos->serdes_speed = speed; 613 + } 614 + } 615 + 608 616 /* On interface toggle MAC registers gets reset. 609 617 * Configure MAC block for SGMII on ethernet phy link up 610 618 */ ··· 630 622 rgmii_updatel(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG, 631 623 RGMII_CONFIG2_RGMII_CLK_SEL_CFG, 632 624 RGMII_IO_MACRO_CONFIG2); 633 - if (ethqos->serdes_speed != SPEED_2500) 634 - phy_set_speed(ethqos->serdes_phy, SPEED_2500); 635 - ethqos->serdes_speed = SPEED_2500; 625 + ethqos_set_serdes_speed(ethqos, SPEED_2500); 636 626 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 0, 0, 0); 637 627 break; 638 628 case SPEED_1000: ··· 638 632 rgmii_updatel(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG, 639 633 RGMII_CONFIG2_RGMII_CLK_SEL_CFG, 640 634 RGMII_IO_MACRO_CONFIG2); 641 - if (ethqos->serdes_speed != SPEED_1000) 642 - phy_set_speed(ethqos->serdes_phy, SPEED_1000); 643 - ethqos->serdes_speed = SPEED_1000; 635 + ethqos_set_serdes_speed(ethqos, SPEED_1000); 644 636 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0); 645 637 break; 646 638 case SPEED_100: 647 639 val |= ETHQOS_MAC_CTRL_PORT_SEL | ETHQOS_MAC_CTRL_SPEED_MODE; 648 - if (ethqos->serdes_speed != SPEED_1000) 649 - phy_set_speed(ethqos->serdes_phy, SPEED_1000); 650 - ethqos->serdes_speed = SPEED_1000; 640 + ethqos_set_serdes_speed(ethqos, SPEED_1000); 651 641 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0); 652 642 break; 653 643 case SPEED_10: ··· 653 651 FIELD_PREP(RGMII_CONFIG_SGMII_CLK_DVDR, 654 652 SGMII_10M_RX_CLK_DVDR), 655 653 RGMII_IO_MACRO_CONFIG); 656 - if (ethqos->serdes_speed != SPEED_1000) 657 - phy_set_speed(ethqos->serdes_phy, ethqos->speed); 658 - ethqos->serdes_speed = SPEED_1000; 654 + ethqos_set_serdes_speed(ethqos, SPEED_1000); 659 655 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0); 660 656 break; 661 657 }
+1 -7
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
··· 15 15 #include <linux/crc32.h> 16 16 #include <linux/slab.h> 17 17 #include <linux/ethtool.h> 18 - #include <asm/io.h> 18 + #include <linux/io.h> 19 19 #include "stmmac.h" 20 20 #include "stmmac_pcs.h" 21 21 #include "dwmac1000.h" ··· 404 404 dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback); 405 405 } 406 406 407 - static void dwmac1000_rane(void __iomem *ioaddr, bool restart) 408 - { 409 - dwmac_rane(ioaddr, GMAC_PCS_BASE, restart); 410 - } 411 - 412 407 static void dwmac1000_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv) 413 408 { 414 409 dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv); ··· 514 519 .set_eee_pls = dwmac1000_set_eee_pls, 515 520 .debug = dwmac1000_debug, 516 521 .pcs_ctrl_ane = dwmac1000_ctrl_ane, 517 - .pcs_rane = dwmac1000_rane, 518 522 .pcs_get_adv_lp = dwmac1000_get_adv_lp, 519 523 .set_mac_loopback = dwmac1000_set_mac_loopback, 520 524 };
+1 -1
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
··· 12 12 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 13 13 *******************************************************************************/ 14 14 15 - #include <asm/io.h> 15 + #include <linux/io.h> 16 16 #include "dwmac1000.h" 17 17 #include "dwmac_dma.h" 18 18
+1 -1
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
··· 15 15 *******************************************************************************/ 16 16 17 17 #include <linux/crc32.h> 18 - #include <asm/io.h> 18 + #include <linux/io.h> 19 19 #include "stmmac.h" 20 20 #include "dwmac100.h" 21 21
+1 -1
drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
··· 14 14 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 15 15 *******************************************************************************/ 16 16 17 - #include <asm/io.h> 17 + #include <linux/io.h> 18 18 #include "dwmac100.h" 19 19 #include "dwmac_dma.h" 20 20
-8
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
··· 758 758 dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback); 759 759 } 760 760 761 - static void dwmac4_rane(void __iomem *ioaddr, bool restart) 762 - { 763 - dwmac_rane(ioaddr, GMAC_PCS_BASE, restart); 764 - } 765 - 766 761 static void dwmac4_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv) 767 762 { 768 763 dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv); ··· 1210 1215 .set_eee_timer = dwmac4_set_eee_timer, 1211 1216 .set_eee_pls = dwmac4_set_eee_pls, 1212 1217 .pcs_ctrl_ane = dwmac4_ctrl_ane, 1213 - .pcs_rane = dwmac4_rane, 1214 1218 .pcs_get_adv_lp = dwmac4_get_adv_lp, 1215 1219 .debug = dwmac4_debug, 1216 1220 .set_filter = dwmac4_set_filter, ··· 1254 1260 .set_eee_timer = dwmac4_set_eee_timer, 1255 1261 .set_eee_pls = dwmac4_set_eee_pls, 1256 1262 .pcs_ctrl_ane = dwmac4_ctrl_ane, 1257 - .pcs_rane = dwmac4_rane, 1258 1263 .pcs_get_adv_lp = dwmac4_get_adv_lp, 1259 1264 .debug = dwmac4_debug, 1260 1265 .set_filter = dwmac4_set_filter, ··· 1302 1309 .set_eee_timer = dwmac4_set_eee_timer, 1303 1310 .set_eee_pls = dwmac4_set_eee_pls, 1304 1311 .pcs_ctrl_ane = dwmac4_ctrl_ane, 1305 - .pcs_rane = dwmac4_rane, 1306 1312 .pcs_get_adv_lp = dwmac4_get_adv_lp, 1307 1313 .debug = dwmac4_debug, 1308 1314 .set_filter = dwmac4_set_filter,
-6
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
··· 1554 1554 .reset_eee_mode = dwxgmac2_reset_eee_mode, 1555 1555 .set_eee_timer = dwxgmac2_set_eee_timer, 1556 1556 .set_eee_pls = dwxgmac2_set_eee_pls, 1557 - .pcs_ctrl_ane = NULL, 1558 - .pcs_rane = NULL, 1559 - .pcs_get_adv_lp = NULL, 1560 1557 .debug = NULL, 1561 1558 .set_filter = dwxgmac2_set_filter, 1562 1559 .safety_feat_config = dwxgmac3_safety_feat_config, ··· 1611 1614 .reset_eee_mode = dwxgmac2_reset_eee_mode, 1612 1615 .set_eee_timer = dwxgmac2_set_eee_timer, 1613 1616 .set_eee_pls = dwxgmac2_set_eee_pls, 1614 - .pcs_ctrl_ane = NULL, 1615 - .pcs_rane = NULL, 1616 - .pcs_get_adv_lp = NULL, 1617 1617 .debug = NULL, 1618 1618 .set_filter = dwxgmac2_set_filter, 1619 1619 .safety_feat_config = dwxgmac3_safety_feat_config,
-3
drivers/net/ethernet/stmicro/stmmac/hwif.h
··· 370 370 /* PCS calls */ 371 371 void (*pcs_ctrl_ane)(void __iomem *ioaddr, bool ane, bool srgmi_ral, 372 372 bool loopback); 373 - void (*pcs_rane)(void __iomem *ioaddr, bool restart); 374 373 void (*pcs_get_adv_lp)(void __iomem *ioaddr, struct rgmii_adv *adv); 375 374 /* Safety Features */ 376 375 int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp, ··· 483 484 stmmac_do_void_callback(__priv, mac, debug, __priv, __args) 484 485 #define stmmac_pcs_ctrl_ane(__priv, __args...) \ 485 486 stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __args) 486 - #define stmmac_pcs_rane(__priv, __args...) \ 487 - stmmac_do_void_callback(__priv, mac, pcs_rane, __priv, __args) 488 487 #define stmmac_pcs_get_adv_lp(__priv, __args...) \ 489 488 stmmac_do_void_callback(__priv, mac, pcs_get_adv_lp, __args) 490 489 #define stmmac_safety_feat_config(__priv, __args...) \
+1 -1
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
··· 11 11 #include <linux/etherdevice.h> 12 12 #include <linux/ethtool.h> 13 13 #include <linux/interrupt.h> 14 + #include <linux/io.h> 14 15 #include <linux/mii.h> 15 16 #include <linux/phylink.h> 16 17 #include <linux/net_tstamp.h> 17 - #include <asm/io.h> 18 18 19 19 #include "stmmac.h" 20 20 #include "dwmac_dma.h"
+9 -29
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
··· 471 471 { 472 472 int eee_tw_timer = priv->eee_tw_timer; 473 473 474 - /* Using PCS we cannot dial with the phy registers at this stage 475 - * so we do not support extra feature like EEE. 476 - */ 477 - if (priv->hw->pcs == STMMAC_PCS_TBI || 478 - priv->hw->pcs == STMMAC_PCS_RTBI) 479 - return false; 480 - 481 474 /* Check if MAC core supports the EEE feature. */ 482 475 if (!priv->dma_cap.eee) 483 476 return false; ··· 3946 3953 if (ret < 0) 3947 3954 return ret; 3948 3955 3949 - if (priv->hw->pcs != STMMAC_PCS_TBI && 3950 - priv->hw->pcs != STMMAC_PCS_RTBI && 3951 - (!priv->hw->xpcs || 3956 + if ((!priv->hw->xpcs || 3952 3957 xpcs_get_an_mode(priv->hw->xpcs, mode) != DW_AN_C73)) { 3953 3958 ret = stmmac_init_phy(dev); 3954 3959 if (ret) { ··· 4087 4096 /* Powerdown Serdes if there is */ 4088 4097 if (priv->plat->serdes_powerdown) 4089 4098 priv->plat->serdes_powerdown(dev, priv->plat->bsp_priv); 4090 - 4091 - netif_carrier_off(dev); 4092 4099 4093 4100 stmmac_release_ptp(priv); 4094 4101 ··· 7728 7739 if (!pm_runtime_enabled(device)) 7729 7740 pm_runtime_enable(device); 7730 7741 7731 - if (priv->hw->pcs != STMMAC_PCS_TBI && 7732 - priv->hw->pcs != STMMAC_PCS_RTBI) { 7733 - /* MDIO bus Registration */ 7734 - ret = stmmac_mdio_register(ndev); 7735 - if (ret < 0) { 7736 - dev_err_probe(priv->device, ret, 7737 - "%s: MDIO bus (id: %d) registration failed\n", 7738 - __func__, priv->plat->bus_id); 7739 - goto error_mdio_register; 7740 - } 7742 + ret = stmmac_mdio_register(ndev); 7743 + if (ret < 0) { 7744 + dev_err_probe(priv->device, ret, 7745 + "MDIO bus (id: %d) registration failed\n", 7746 + priv->plat->bus_id); 7747 + goto error_mdio_register; 7741 7748 } 7742 7749 7743 7750 if (priv->plat->speed_mode_2500) ··· 7775 7790 error_phy_setup: 7776 7791 stmmac_pcs_clean(ndev); 7777 7792 error_pcs_setup: 7778 - if (priv->hw->pcs != STMMAC_PCS_TBI && 7779 - priv->hw->pcs != STMMAC_PCS_RTBI) 7780 - stmmac_mdio_unregister(ndev); 7793 + stmmac_mdio_unregister(ndev); 7781 7794 error_mdio_register: 7782 7795 stmmac_napi_del(ndev); 7783 7796 error_hw_init: ··· 7804 7821 7805 7822 stmmac_stop_all_dma(priv); 7806 7823 stmmac_mac_set(priv, priv->ioaddr, false); 7807 - netif_carrier_off(ndev); 7808 7824 unregister_netdev(ndev); 7809 7825 7810 7826 #ifdef CONFIG_DEBUG_FS ··· 7815 7833 reset_control_assert(priv->plat->stmmac_ahb_rst); 7816 7834 7817 7835 stmmac_pcs_clean(ndev); 7836 + stmmac_mdio_unregister(ndev); 7818 7837 7819 - if (priv->hw->pcs != STMMAC_PCS_TBI && 7820 - priv->hw->pcs != STMMAC_PCS_RTBI) 7821 - stmmac_mdio_unregister(ndev); 7822 7838 destroy_workqueue(priv->wq); 7823 7839 mutex_destroy(&priv->lock); 7824 7840 bitmap_free(priv->af_xdp_zc_qps);
-17
drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
··· 75 75 } 76 76 77 77 /** 78 - * dwmac_rane - To restart ANE 79 - * @ioaddr: IO registers pointer 80 - * @reg: Base address of the AN Control Register. 81 - * @restart: to restart ANE 82 - * Description: this is to just restart the Auto-Negotiation. 83 - */ 84 - static inline void dwmac_rane(void __iomem *ioaddr, u32 reg, bool restart) 85 - { 86 - u32 value = readl(ioaddr + GMAC_AN_CTRL(reg)); 87 - 88 - if (restart) 89 - value |= GMAC_AN_CTRL_RAN; 90 - 91 - writel(value, ioaddr + GMAC_AN_CTRL(reg)); 92 - } 93 - 94 - /** 95 78 * dwmac_ctrl_ane - To program the AN Control Register. 96 79 * @ioaddr: IO registers pointer 97 80 * @reg: Base address of the AN Control Register.