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net: dsa: mxl862xx: rename MDIO op arguments

The use of the 'port' argument name for functions implementing the MDIO
bus operations is misleading as the port address isn't equal to the
PHY address.

Rename the MDIO operation argument name to match the prototypes of
mdiobus_write, mdiobus_read, mdiobus_c45_read and mdiobus_c45_write.

Suggested-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/e1f4cb3bcffc7df9af0f2c9b673b14c7e1201c9a.1772507674.git.daniel@makrotopia.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Daniel Golle and committed by
Jakub Kicinski aefa52a2 8838bb18

+16 -16
+16 -16
drivers/net/dsa/mxl862xx/mxl862xx.c
··· 44 44 } 45 45 46 46 /* PHY access via firmware relay */ 47 - static int mxl862xx_phy_read_mmd(struct mxl862xx_priv *priv, int port, 48 - int devadd, int reg) 47 + static int mxl862xx_phy_read_mmd(struct mxl862xx_priv *priv, int addr, 48 + int devadd, int regnum) 49 49 { 50 50 struct mdio_relay_data param = { 51 - .phy = port, 51 + .phy = addr, 52 52 .mmd = devadd, 53 - .reg = cpu_to_le16(reg), 53 + .reg = cpu_to_le16(regnum), 54 54 }; 55 55 int ret; 56 56 ··· 61 61 return le16_to_cpu(param.data); 62 62 } 63 63 64 - static int mxl862xx_phy_write_mmd(struct mxl862xx_priv *priv, int port, 65 - int devadd, int reg, u16 data) 64 + static int mxl862xx_phy_write_mmd(struct mxl862xx_priv *priv, int addr, 65 + int devadd, int regnum, u16 data) 66 66 { 67 67 struct mdio_relay_data param = { 68 - .phy = port, 68 + .phy = addr, 69 69 .mmd = devadd, 70 - .reg = cpu_to_le16(reg), 70 + .reg = cpu_to_le16(regnum), 71 71 .data = cpu_to_le16(data), 72 72 }; 73 73 74 74 return MXL862XX_API_WRITE(priv, INT_GPHY_WRITE, param); 75 75 } 76 76 77 - static int mxl862xx_phy_read_mii_bus(struct mii_bus *bus, int port, int regnum) 77 + static int mxl862xx_phy_read_mii_bus(struct mii_bus *bus, int addr, int regnum) 78 78 { 79 - return mxl862xx_phy_read_mmd(bus->priv, port, 0, regnum); 79 + return mxl862xx_phy_read_mmd(bus->priv, addr, 0, regnum); 80 80 } 81 81 82 - static int mxl862xx_phy_write_mii_bus(struct mii_bus *bus, int port, 82 + static int mxl862xx_phy_write_mii_bus(struct mii_bus *bus, int addr, 83 83 int regnum, u16 val) 84 84 { 85 - return mxl862xx_phy_write_mmd(bus->priv, port, 0, regnum, val); 85 + return mxl862xx_phy_write_mmd(bus->priv, addr, 0, regnum, val); 86 86 } 87 87 88 - static int mxl862xx_phy_read_c45_mii_bus(struct mii_bus *bus, int port, 88 + static int mxl862xx_phy_read_c45_mii_bus(struct mii_bus *bus, int addr, 89 89 int devadd, int regnum) 90 90 { 91 - return mxl862xx_phy_read_mmd(bus->priv, port, devadd, regnum); 91 + return mxl862xx_phy_read_mmd(bus->priv, addr, devadd, regnum); 92 92 } 93 93 94 - static int mxl862xx_phy_write_c45_mii_bus(struct mii_bus *bus, int port, 94 + static int mxl862xx_phy_write_c45_mii_bus(struct mii_bus *bus, int addr, 95 95 int devadd, int regnum, u16 val) 96 96 { 97 - return mxl862xx_phy_write_mmd(bus->priv, port, devadd, regnum, val); 97 + return mxl862xx_phy_write_mmd(bus->priv, addr, devadd, regnum, val); 98 98 } 99 99 100 100 static int mxl862xx_wait_ready(struct dsa_switch *ds)