Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
dt-bindings: usb: chipidea,usb2-imx: move imx parts to dedicated schema
As more and more NXP i.MX chips come out, it becomes harder to maintain
ci-hdrc-usb2.yaml if more stuffs like property restrictions are added to
this file. This will separate i.MX parts out of ci-hdrc-usb2.yaml and add
a new schema for NXP ChipIdea USB2 Controller, also add a common schema.
1. Copy common ci-hdrc-usb2.yaml properties to a new shared
chipidea,usb2-common.yaml schema.
2. Move fsl,* compatible devices and imx spefific properties
to dedicated binding file chipidea,usb2-imx.yaml.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Link: https://lore.kernel.org/r/20240321081439.541799-4-xu.yang_2@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
authored by
Xu Yang
and committed by
Greg Kroah-Hartman
af1969a1
43590333
+396
-357
+200
Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
+200
Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: USB2 ChipIdea USB controller Common Properties
8
+
9
+
maintainers:
10
+
- Xu Yang <xu.yang_2@nxp.com>
11
+
12
+
properties:
13
+
reg:
14
+
minItems: 1
15
+
maxItems: 2
16
+
17
+
interrupts:
18
+
minItems: 1
19
+
maxItems: 2
20
+
21
+
clocks:
22
+
minItems: 1
23
+
maxItems: 3
24
+
25
+
clock-names:
26
+
minItems: 1
27
+
maxItems: 3
28
+
29
+
dr_mode: true
30
+
31
+
power-domains:
32
+
maxItems: 1
33
+
34
+
resets:
35
+
maxItems: 1
36
+
37
+
reset-names:
38
+
maxItems: 1
39
+
40
+
"#reset-cells":
41
+
const: 1
42
+
43
+
phy_type: true
44
+
45
+
itc-setting:
46
+
description:
47
+
interrupt threshold control register control, the setting should be
48
+
aligned with ITC bits at register USBCMD.
49
+
$ref: /schemas/types.yaml#/definitions/uint32
50
+
51
+
ahb-burst-config:
52
+
description:
53
+
it is vendor dependent, the required value should be aligned with
54
+
AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is
55
+
used to change AHB burst configuration, check the chipidea spec for
56
+
meaning of each value. If this property is not existed, it will use
57
+
the reset value.
58
+
$ref: /schemas/types.yaml#/definitions/uint32
59
+
minimum: 0x0
60
+
maximum: 0x7
61
+
62
+
tx-burst-size-dword:
63
+
description:
64
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it is vendor dependent, the tx burst size in dword (4 bytes), This
65
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register represents the maximum length of a the burst in 32-bit
66
+
words while moving data from system memory to the USB bus, the value
67
+
of this property will only take effect if property "ahb-burst-config"
68
+
is set to 0, if this property is missing the reset default of the
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hardware implementation will be used.
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+
$ref: /schemas/types.yaml#/definitions/uint32
71
+
minimum: 0x0
72
+
maximum: 0x20
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+
74
+
rx-burst-size-dword:
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+
description:
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it is vendor dependent, the rx burst size in dword (4 bytes), This
77
+
register represents the maximum length of a the burst in 32-bit words
78
+
while moving data from the USB bus to system memory, the value of
79
+
this property will only take effect if property "ahb-burst-config"
80
+
is set to 0, if this property is missing the reset default of the
81
+
hardware implementation will be used.
82
+
$ref: /schemas/types.yaml#/definitions/uint32
83
+
minimum: 0x0
84
+
maximum: 0x20
85
+
86
+
extcon:
87
+
description:
88
+
Phandles to external connector devices. First phandle should point
89
+
to external connector, which provide "USB" cable events, the second
90
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should point to external connector device, which provide "USB-HOST"
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cable events. If one of the external connector devices is not
92
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required, empty <0> phandle should be specified.
93
+
$ref: /schemas/types.yaml#/definitions/phandle-array
94
+
minItems: 1
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+
items:
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+
- description: vbus extcon
97
+
- description: id extcon
98
+
99
+
phy-clkgate-delay-us:
100
+
description:
101
+
The delay time (us) between putting the PHY into low power mode and
102
+
gating the PHY clock.
103
+
104
+
non-zero-ttctrl-ttha:
105
+
description:
106
+
After setting this property, the value of register ttctrl.ttha
107
+
will be 0x7f; if not, the value will be 0x0, this is the default
108
+
value. It needs to be very carefully for setting this property, it
109
+
is recommended that consult with your IC engineer before setting
110
+
this value. On the most of chipidea platforms, the "usage_tt" flag
111
+
at RTL is 0, so this property only affects siTD.
112
+
113
+
If this property is not set, the max packet size is 1023 bytes, and
114
+
if the total of packet size for previous transactions are more than
115
+
256 bytes, it can't accept any transactions within this frame. The
116
+
use case is single transaction, but higher frame rate.
117
+
118
+
If this property is set, the max packet size is 188 bytes, it can
119
+
handle more transactions than above case, it can accept transactions
120
+
until it considers the left room size within frame is less than 188
121
+
bytes, software needs to make sure it does not send more than 90%
122
+
maximum_periodic_data_per_frame. The use case is multiple
123
+
transactions, but less frame rate.
124
+
type: boolean
125
+
126
+
mux-controls:
127
+
description:
128
+
The mux control for toggling host/device output of this controller.
129
+
It's expected that a mux state of 0 indicates device mode and a mux
130
+
state of 1 indicates host mode.
131
+
maxItems: 1
132
+
133
+
mux-control-names:
134
+
const: usb_switch
135
+
136
+
pinctrl-names:
137
+
description:
138
+
Names for optional pin modes in "default", "host", "device".
139
+
In case of HSIC-mode, "idle" and "active" pin modes are mandatory.
140
+
In this case, the "idle" state needs to pull down the data and
141
+
strobe pin and the "active" state needs to pull up the strobe pin.
142
+
oneOf:
143
+
- items:
144
+
- const: idle
145
+
- const: active
146
+
- items:
147
+
- const: default
148
+
- const: host
149
+
- const: device
150
+
- items:
151
+
- const: default
152
+
- enum:
153
+
- host
154
+
- device
155
+
- items:
156
+
- const: default
157
+
158
+
pinctrl-0:
159
+
maxItems: 1
160
+
161
+
pinctrl-1:
162
+
maxItems: 1
163
+
164
+
phys:
165
+
maxItems: 1
166
+
167
+
phy-names:
168
+
const: usb-phy
169
+
170
+
vbus-supply:
171
+
description: reference to the VBUS regulator.
172
+
173
+
usb-phy:
174
+
description: phandle for the PHY device. Use "phys" instead.
175
+
maxItems: 1
176
+
deprecated: true
177
+
178
+
port:
179
+
description:
180
+
Any connector to the data bus of this controller should be modelled
181
+
using the OF graph bindings specified, if the "usb-role-switch"
182
+
property is used.
183
+
$ref: /schemas/graph.yaml#/properties/port
184
+
185
+
reset-gpios:
186
+
maxItems: 1
187
+
188
+
dependencies:
189
+
port: [ usb-role-switch ]
190
+
mux-controls: [ mux-control-names ]
191
+
192
+
required:
193
+
- reg
194
+
- interrupts
195
+
196
+
allOf:
197
+
- $ref: usb-hcd.yaml#
198
+
- $ref: usb-drd.yaml#
199
+
200
+
additionalProperties: true
+193
Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
+193
Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: NXP USB2 ChipIdea USB controller
8
+
9
+
maintainers:
10
+
- Xu Yang <xu.yang_2@nxp.com>
11
+
12
+
properties:
13
+
compatible:
14
+
oneOf:
15
+
- enum:
16
+
- fsl,imx27-usb
17
+
- items:
18
+
- enum:
19
+
- fsl,imx23-usb
20
+
- fsl,imx25-usb
21
+
- fsl,imx28-usb
22
+
- fsl,imx35-usb
23
+
- fsl,imx50-usb
24
+
- fsl,imx51-usb
25
+
- fsl,imx53-usb
26
+
- fsl,imx6q-usb
27
+
- fsl,imx6sl-usb
28
+
- fsl,imx6sx-usb
29
+
- fsl,imx6ul-usb
30
+
- fsl,imx7d-usb
31
+
- fsl,vf610-usb
32
+
- const: fsl,imx27-usb
33
+
- items:
34
+
- enum:
35
+
- fsl,imx8dxl-usb
36
+
- fsl,imx8ulp-usb
37
+
- const: fsl,imx7ulp-usb
38
+
- const: fsl,imx6ul-usb
39
+
- items:
40
+
- enum:
41
+
- fsl,imx8mm-usb
42
+
- fsl,imx8mn-usb
43
+
- const: fsl,imx7d-usb
44
+
- const: fsl,imx27-usb
45
+
- items:
46
+
- enum:
47
+
- fsl,imx6sll-usb
48
+
- fsl,imx7ulp-usb
49
+
- const: fsl,imx6ul-usb
50
+
- const: fsl,imx27-usb
51
+
52
+
clocks:
53
+
minItems: 1
54
+
maxItems: 3
55
+
56
+
clock-names:
57
+
minItems: 1
58
+
maxItems: 3
59
+
60
+
fsl,usbmisc:
61
+
description:
62
+
Phandler of non-core register device, with one argument that
63
+
indicate usb controller index
64
+
$ref: /schemas/types.yaml#/definitions/phandle-array
65
+
items:
66
+
- items:
67
+
- description: phandle to usbmisc node
68
+
- description: index of usb controller
69
+
70
+
disable-over-current:
71
+
type: boolean
72
+
description: disable over current detect
73
+
74
+
over-current-active-low:
75
+
type: boolean
76
+
description: over current signal polarity is active low
77
+
78
+
over-current-active-high:
79
+
type: boolean
80
+
description:
81
+
Over current signal polarity is active high. It's recommended to
82
+
specify the over current polarity.
83
+
84
+
power-active-high:
85
+
type: boolean
86
+
description: power signal polarity is active high
87
+
88
+
external-vbus-divider:
89
+
type: boolean
90
+
description: enables off-chip resistor divider for Vbus
91
+
92
+
samsung,picophy-pre-emp-curr-control:
93
+
description:
94
+
HS Transmitter Pre-Emphasis Current Control. This signal controls
95
+
the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN
96
+
pins after a J-to-K or K-to-J transition. The range is from 0x0 to
97
+
0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0
98
+
bits of USBNC_n_PHY_CFG1.
99
+
$ref: /schemas/types.yaml#/definitions/uint32
100
+
minimum: 0x0
101
+
maximum: 0x3
102
+
103
+
samsung,picophy-dc-vol-level-adjust:
104
+
description:
105
+
HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
106
+
level voltage. The range is from 0x0 to 0xf, the default value is
107
+
0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
108
+
$ref: /schemas/types.yaml#/definitions/uint32
109
+
minimum: 0x0
110
+
maximum: 0xf
111
+
112
+
fsl,picophy-rise-fall-time-adjust:
113
+
description:
114
+
HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times
115
+
of the high-speed transmitter waveform. It has no unit. The rise/fall
116
+
time will be increased or decreased by a certain percentage relative
117
+
to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%)
118
+
Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1.
119
+
$ref: /schemas/types.yaml#/definitions/uint32
120
+
minimum: 0
121
+
maximum: 3
122
+
default: 1
123
+
124
+
fsl,usbphy:
125
+
description: phandle of usb phy that connects to the port. Use "phys" instead.
126
+
$ref: /schemas/types.yaml#/definitions/phandle
127
+
deprecated: true
128
+
129
+
required:
130
+
- compatible
131
+
132
+
allOf:
133
+
- $ref: chipidea,usb2-common.yaml#
134
+
- if:
135
+
properties:
136
+
phy_type:
137
+
const: hsic
138
+
required:
139
+
- phy_type
140
+
then:
141
+
properties:
142
+
pinctrl-names:
143
+
items:
144
+
- const: idle
145
+
- const: active
146
+
147
+
unevaluatedProperties: false
148
+
149
+
examples:
150
+
- |
151
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
152
+
#include <dt-bindings/clock/imx7d-clock.h>
153
+
154
+
usb@30b10000 {
155
+
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
156
+
reg = <0x30b10000 0x200>;
157
+
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
158
+
clocks = <&clks IMX7D_USB_CTRL_CLK>;
159
+
fsl,usbphy = <&usbphynop1>;
160
+
fsl,usbmisc = <&usbmisc1 0>;
161
+
phy-clkgate-delay-us = <400>;
162
+
};
163
+
164
+
# Example for HSIC:
165
+
- |
166
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
167
+
#include <dt-bindings/clock/imx6qdl-clock.h>
168
+
169
+
usb@2184400 {
170
+
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
171
+
reg = <0x02184400 0x200>;
172
+
interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
173
+
clocks = <&clks IMX6QDL_CLK_USBOH3>;
174
+
fsl,usbphy = <&usbphynop1>;
175
+
fsl,usbmisc = <&usbmisc 2>;
176
+
phy_type = "hsic";
177
+
dr_mode = "host";
178
+
ahb-burst-config = <0x0>;
179
+
tx-burst-size-dword = <0x10>;
180
+
rx-burst-size-dword = <0x10>;
181
+
pinctrl-names = "idle", "active";
182
+
pinctrl-0 = <&pinctrl_usbh2_idle>;
183
+
pinctrl-1 = <&pinctrl_usbh2_active>;
184
+
#address-cells = <1>;
185
+
#size-cells = <0>;
186
+
187
+
ethernet@1 {
188
+
compatible = "usb424,9730";
189
+
reg = <1>;
190
+
};
191
+
};
192
+
193
+
...
+3
-357
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+3
-357
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
···
15
15
oneOf:
16
16
- enum:
17
17
- chipidea,usb2
18
-
- fsl,imx27-usb
19
18
- lsi,zevio-usb
20
19
- nuvoton,npcm750-udc
21
20
- nvidia,tegra20-ehci
···
31
32
- nvidia,tegra210-ehci
32
33
- const: nvidia,tegra30-ehci
33
34
- items:
34
-
- enum:
35
-
- fsl,imx23-usb
36
-
- fsl,imx25-usb
37
-
- fsl,imx28-usb
38
-
- fsl,imx35-usb
39
-
- fsl,imx50-usb
40
-
- fsl,imx51-usb
41
-
- fsl,imx53-usb
42
-
- fsl,imx6q-usb
43
-
- fsl,imx6sl-usb
44
-
- fsl,imx6sx-usb
45
-
- fsl,imx6ul-usb
46
-
- fsl,imx7d-usb
47
-
- fsl,vf610-usb
48
-
- const: fsl,imx27-usb
49
-
- items:
50
-
- enum:
51
-
- fsl,imx8dxl-usb
52
-
- fsl,imx8ulp-usb
53
-
- const: fsl,imx7ulp-usb
54
-
- const: fsl,imx6ul-usb
55
-
- items:
56
-
- enum:
57
-
- fsl,imx8mm-usb
58
-
- fsl,imx8mn-usb
59
-
- const: fsl,imx7d-usb
60
-
- const: fsl,imx27-usb
61
-
- items:
62
-
- enum:
63
-
- fsl,imx6sll-usb
64
-
- fsl,imx7ulp-usb
65
-
- const: fsl,imx6ul-usb
66
-
- const: fsl,imx27-usb
67
-
- items:
68
35
- const: xlnx,zynq-usb-2.20a
69
36
- const: chipidea,usb2
70
37
- items:
···
38
73
- nuvoton,npcm845-udc
39
74
- const: nuvoton,npcm750-udc
40
75
41
-
reg:
42
-
minItems: 1
43
-
maxItems: 2
44
-
45
-
interrupts:
46
-
minItems: 1
47
-
maxItems: 2
48
-
49
76
clocks:
50
77
minItems: 1
51
-
maxItems: 3
78
+
maxItems: 2
52
79
53
80
clock-names:
54
81
minItems: 1
55
-
maxItems: 3
56
-
57
-
dr_mode: true
58
-
59
-
power-domains:
60
-
maxItems: 1
61
-
62
-
resets:
63
-
maxItems: 1
64
-
65
-
reset-names:
66
-
maxItems: 1
67
-
68
-
"#reset-cells":
69
-
const: 1
70
-
71
-
phy_type: true
72
-
73
-
itc-setting:
74
-
description:
75
-
interrupt threshold control register control, the setting should be
76
-
aligned with ITC bits at register USBCMD.
77
-
$ref: /schemas/types.yaml#/definitions/uint32
78
-
79
-
ahb-burst-config:
80
-
description:
81
-
it is vendor dependent, the required value should be aligned with
82
-
AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is
83
-
used to change AHB burst configuration, check the chipidea spec for
84
-
meaning of each value. If this property is not existed, it will use
85
-
the reset value.
86
-
$ref: /schemas/types.yaml#/definitions/uint32
87
-
minimum: 0x0
88
-
maximum: 0x7
89
-
90
-
tx-burst-size-dword:
91
-
description:
92
-
it is vendor dependent, the tx burst size in dword (4 bytes), This
93
-
register represents the maximum length of a the burst in 32-bit
94
-
words while moving data from system memory to the USB bus, the value
95
-
of this property will only take effect if property "ahb-burst-config"
96
-
is set to 0, if this property is missing the reset default of the
97
-
hardware implementation will be used.
98
-
$ref: /schemas/types.yaml#/definitions/uint32
99
-
minimum: 0x0
100
-
maximum: 0x20
101
-
102
-
rx-burst-size-dword:
103
-
description:
104
-
it is vendor dependent, the rx burst size in dword (4 bytes), This
105
-
register represents the maximum length of a the burst in 32-bit words
106
-
while moving data from the USB bus to system memory, the value of
107
-
this property will only take effect if property "ahb-burst-config"
108
-
is set to 0, if this property is missing the reset default of the
109
-
hardware implementation will be used.
110
-
$ref: /schemas/types.yaml#/definitions/uint32
111
-
minimum: 0x0
112
-
maximum: 0x20
113
-
114
-
extcon:
115
-
description:
116
-
Phandles to external connector devices. First phandle should point
117
-
to external connector, which provide "USB" cable events, the second
118
-
should point to external connector device, which provide "USB-HOST"
119
-
cable events. If one of the external connector devices is not
120
-
required, empty <0> phandle should be specified.
121
-
$ref: /schemas/types.yaml#/definitions/phandle-array
122
-
minItems: 1
123
-
items:
124
-
- description: vbus extcon
125
-
- description: id extcon
126
-
127
-
phy-clkgate-delay-us:
128
-
description:
129
-
The delay time (us) between putting the PHY into low power mode and
130
-
gating the PHY clock.
131
-
132
-
non-zero-ttctrl-ttha:
133
-
description:
134
-
After setting this property, the value of register ttctrl.ttha
135
-
will be 0x7f; if not, the value will be 0x0, this is the default
136
-
value. It needs to be very carefully for setting this property, it
137
-
is recommended that consult with your IC engineer before setting
138
-
this value. On the most of chipidea platforms, the "usage_tt" flag
139
-
at RTL is 0, so this property only affects siTD.
140
-
141
-
If this property is not set, the max packet size is 1023 bytes, and
142
-
if the total of packet size for previous transactions are more than
143
-
256 bytes, it can't accept any transactions within this frame. The
144
-
use case is single transaction, but higher frame rate.
145
-
146
-
If this property is set, the max packet size is 188 bytes, it can
147
-
handle more transactions than above case, it can accept transactions
148
-
until it considers the left room size within frame is less than 188
149
-
bytes, software needs to make sure it does not send more than 90%
150
-
maximum_periodic_data_per_frame. The use case is multiple
151
-
transactions, but less frame rate.
152
-
type: boolean
153
-
154
-
mux-controls:
155
-
description:
156
-
The mux control for toggling host/device output of this controller.
157
-
It's expected that a mux state of 0 indicates device mode and a mux
158
-
state of 1 indicates host mode.
159
-
maxItems: 1
160
-
161
-
mux-control-names:
162
-
const: usb_switch
82
+
maxItems: 2
163
83
164
84
operating-points-v2:
165
85
description: A phandle to the OPP table containing the performance states.
166
86
$ref: /schemas/types.yaml#/definitions/phandle
167
-
168
-
pinctrl-names:
169
-
description:
170
-
Names for optional pin modes in "default", "host", "device".
171
-
In case of HSIC-mode, "idle" and "active" pin modes are mandatory.
172
-
In this case, the "idle" state needs to pull down the data and
173
-
strobe pin and the "active" state needs to pull up the strobe pin.
174
-
oneOf:
175
-
- items:
176
-
- const: idle
177
-
- const: active
178
-
- items:
179
-
- const: default
180
-
- enum:
181
-
- host
182
-
- device
183
-
- items:
184
-
- const: default
185
-
186
-
pinctrl-0:
187
-
maxItems: 1
188
-
189
-
pinctrl-1:
190
-
maxItems: 1
191
-
192
-
phys:
193
-
maxItems: 1
194
-
195
-
phy-names:
196
-
const: usb-phy
197
87
198
88
phy-select:
199
89
description:
···
60
240
- description: register offset
61
241
- description: phy index
62
242
63
-
vbus-supply:
64
-
description: reference to the VBUS regulator.
65
-
66
-
fsl,usbmisc:
67
-
description:
68
-
Phandler of non-core register device, with one argument that
69
-
indicate usb controller index
70
-
$ref: /schemas/types.yaml#/definitions/phandle-array
71
-
items:
72
-
- items:
73
-
- description: phandle to usbmisc node
74
-
- description: index of usb controller
75
-
76
-
fsl,anatop:
77
-
description: phandle for the anatop node.
78
-
$ref: /schemas/types.yaml#/definitions/phandle
79
-
80
-
disable-over-current:
81
-
type: boolean
82
-
description: disable over current detect
83
-
84
-
over-current-active-low:
85
-
type: boolean
86
-
description: over current signal polarity is active low
87
-
88
-
over-current-active-high:
89
-
type: boolean
90
-
description:
91
-
Over current signal polarity is active high. It's recommended to
92
-
specify the over current polarity.
93
-
94
-
power-active-high:
95
-
type: boolean
96
-
description: power signal polarity is active high
97
-
98
-
external-vbus-divider:
99
-
type: boolean
100
-
description: enables off-chip resistor divider for Vbus
101
-
102
-
samsung,picophy-pre-emp-curr-control:
103
-
description:
104
-
HS Transmitter Pre-Emphasis Current Control. This signal controls
105
-
the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN
106
-
pins after a J-to-K or K-to-J transition. The range is from 0x0 to
107
-
0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0
108
-
bits of USBNC_n_PHY_CFG1.
109
-
$ref: /schemas/types.yaml#/definitions/uint32
110
-
minimum: 0x0
111
-
maximum: 0x3
112
-
113
-
samsung,picophy-dc-vol-level-adjust:
114
-
description:
115
-
HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
116
-
level voltage. The range is from 0x0 to 0xf, the default value is
117
-
0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
118
-
$ref: /schemas/types.yaml#/definitions/uint32
119
-
minimum: 0x0
120
-
maximum: 0xf
121
-
122
-
fsl,picophy-rise-fall-time-adjust:
123
-
description:
124
-
HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times
125
-
of the high-speed transmitter waveform. It has no unit. The rise/fall
126
-
time will be increased or decreased by a certain percentage relative
127
-
to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%)
128
-
Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1.
129
-
$ref: /schemas/types.yaml#/definitions/uint32
130
-
minimum: 0
131
-
maximum: 3
132
-
default: 1
133
-
134
-
usb-phy:
135
-
description: phandle for the PHY device. Use "phys" instead.
136
-
maxItems: 1
137
-
deprecated: true
138
-
139
-
fsl,usbphy:
140
-
description: phandle of usb phy that connects to the port. Use "phys" instead.
141
-
$ref: /schemas/types.yaml#/definitions/phandle
142
-
deprecated: true
143
-
144
243
nvidia,phy:
145
244
description: phandle of usb phy that connects to the port. Use "phys" instead.
146
245
$ref: /schemas/types.yaml#/definitions/phandle
···
70
331
type: boolean
71
332
deprecated: true
72
333
73
-
port:
74
-
description:
75
-
Any connector to the data bus of this controller should be modelled
76
-
using the OF graph bindings specified, if the "usb-role-switch"
77
-
property is used.
78
-
$ref: /schemas/graph.yaml#/properties/port
79
-
80
-
reset-gpios:
81
-
maxItems: 1
82
-
83
334
ulpi:
84
335
type: object
85
336
additionalProperties: false
···
79
350
type: object
80
351
$ref: /schemas/phy/qcom,usb-hs-phy.yaml
81
352
82
-
dependencies:
83
-
port: [ usb-role-switch ]
84
-
mux-controls: [ mux-control-names ]
85
-
86
353
required:
87
354
- compatible
88
-
- reg
89
-
- interrupts
90
355
91
356
allOf:
357
+
- $ref: chipidea,usb2-common.yaml#
92
358
- $ref: usb-hcd.yaml#
93
359
- $ref: usb-drd.yaml#
94
-
- if:
95
-
properties:
96
-
phy_type:
97
-
const: hsic
98
-
required:
99
-
- phy_type
100
-
then:
101
-
properties:
102
-
pinctrl-names:
103
-
items:
104
-
- const: idle
105
-
- const: active
106
-
else:
107
-
properties:
108
-
pinctrl-names:
109
-
minItems: 1
110
-
maxItems: 2
111
-
oneOf:
112
-
- items:
113
-
- const: default
114
-
- enum:
115
-
- host
116
-
- device
117
-
- items:
118
-
- const: default
119
-
- if:
120
-
properties:
121
-
compatible:
122
-
contains:
123
-
enum:
124
-
- chipidea,usb2
125
-
- lsi,zevio-usb
126
-
- nuvoton,npcm750-udc
127
-
- nvidia,tegra20-udc
128
-
- nvidia,tegra30-udc
129
-
- nvidia,tegra114-udc
130
-
- nvidia,tegra124-udc
131
-
- qcom,ci-hdrc
132
-
- xlnx,zynq-usb-2.20a
133
-
then:
134
-
properties:
135
-
fsl,usbmisc: false
136
-
disable-over-current: false
137
-
over-current-active-low: false
138
-
over-current-active-high: false
139
-
power-active-high: false
140
-
external-vbus-divider: false
141
-
samsung,picophy-pre-emp-curr-control: false
142
-
samsung,picophy-dc-vol-level-adjust: false
143
360
144
361
unevaluatedProperties: false
145
362
···
111
436
phy-clkgate-delay-us = <400>;
112
437
mux-controls = <&usb_switch>;
113
438
mux-control-names = "usb_switch";
114
-
};
115
-
116
-
# Example for HSIC:
117
-
- |
118
-
#include <dt-bindings/interrupt-controller/arm-gic.h>
119
-
#include <dt-bindings/clock/imx6qdl-clock.h>
120
-
121
-
usb@2184400 {
122
-
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
123
-
reg = <0x02184400 0x200>;
124
-
interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
125
-
clocks = <&clks IMX6QDL_CLK_USBOH3>;
126
-
fsl,usbphy = <&usbphynop1>;
127
-
fsl,usbmisc = <&usbmisc 2>;
128
-
phy_type = "hsic";
129
-
dr_mode = "host";
130
-
ahb-burst-config = <0x0>;
131
-
tx-burst-size-dword = <0x10>;
132
-
rx-burst-size-dword = <0x10>;
133
-
pinctrl-names = "idle", "active";
134
-
pinctrl-0 = <&pinctrl_usbh2_idle>;
135
-
pinctrl-1 = <&pinctrl_usbh2_active>;
136
-
#address-cells = <1>;
137
-
#size-cells = <0>;
138
-
139
-
ethernet@1 {
140
-
compatible = "usb424,9730";
141
-
reg = <1>;
142
-
};
143
439
};
144
440
145
441
...