Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
clk: at91: clk-sam9x60-pll: force write to PLL_UPDT register
This register is important for sequencing the commands to PLLs, so
actually write the update bits with regmap_write_bits() instead of
relying on a read/modify/write regmap command that could skip the actual
hardware write if the value is identical to the one read.
It's changed when modification is needed to the PLL, when
read-only operation is done, we could keep the call to
regmap_update_bits().
Add a comment to the sam9x60_div_pll_set_div() function that uses this
PLL_UPDT register so that it's used consistently, according to the
product's datasheet.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Tested-by: Ryan Wanner <ryan.wanner@microchip.com> # on sama7d65 and sam9x75
Link: https://lore.kernel.org/r/20250827150811.82496-1-nicolas.ferre@microchip.com
[claudiu.beznea: fix "Alignment should match open parenthesis"
checkpatch.pl check]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
+39
-36
+39
-36
drivers/clk/at91/clk-sam9x60-pll.c
+39
-36
drivers/clk/at91/clk-sam9x60-pll.c
···
93
93
94
94
spin_lock_irqsave(core->lock, flags);
95
95
96
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
97
-
AT91_PMC_PLL_UPDT_ID_MSK, core->id);
96
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
97
+
AT91_PMC_PLL_UPDT_ID_MSK, core->id);
98
98
regmap_read(regmap, AT91_PMC_PLL_CTRL1, &val);
99
99
cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift;
100
100
cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift;
···
128
128
udelay(10);
129
129
}
130
130
131
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
132
-
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
133
-
AT91_PMC_PLL_UPDT_UPDATE | core->id);
131
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
132
+
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
133
+
AT91_PMC_PLL_UPDT_UPDATE | core->id);
134
134
135
135
regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0,
136
136
AT91_PMC_PLL_CTRL0_ENLOCK | AT91_PMC_PLL_CTRL0_ENPLL,
137
137
AT91_PMC_PLL_CTRL0_ENLOCK | AT91_PMC_PLL_CTRL0_ENPLL);
138
138
139
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
140
-
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
141
-
AT91_PMC_PLL_UPDT_UPDATE | core->id);
139
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
140
+
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
141
+
AT91_PMC_PLL_UPDT_UPDATE | core->id);
142
142
143
143
while (!sam9x60_pll_ready(regmap, core->id))
144
144
cpu_relax();
···
164
164
165
165
spin_lock_irqsave(core->lock, flags);
166
166
167
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
168
-
AT91_PMC_PLL_UPDT_ID_MSK, core->id);
167
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
168
+
AT91_PMC_PLL_UPDT_ID_MSK, core->id);
169
169
170
170
regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0, AT91_PMC_PLL_CTRL0_ENPLL, 0);
171
171
···
173
173
regmap_update_bits(regmap, AT91_PMC_PLL_ACR,
174
174
AT91_PMC_PLL_ACR_UTMIBG | AT91_PMC_PLL_ACR_UTMIVR, 0);
175
175
176
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
177
-
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
178
-
AT91_PMC_PLL_UPDT_UPDATE | core->id);
176
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
177
+
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
178
+
AT91_PMC_PLL_UPDT_UPDATE | core->id);
179
179
180
180
spin_unlock_irqrestore(core->lock, flags);
181
181
}
···
262
262
263
263
spin_lock_irqsave(core->lock, irqflags);
264
264
265
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT, AT91_PMC_PLL_UPDT_ID_MSK,
266
-
core->id);
265
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT, AT91_PMC_PLL_UPDT_ID_MSK,
266
+
core->id);
267
267
regmap_read(regmap, AT91_PMC_PLL_CTRL1, &val);
268
268
cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift;
269
269
cfrac = (val & core->layout->frac_mask) >> core->layout->frac_shift;
···
275
275
(frac->mul << core->layout->mul_shift) |
276
276
(frac->frac << core->layout->frac_shift));
277
277
278
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
279
-
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
280
-
AT91_PMC_PLL_UPDT_UPDATE | core->id);
278
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
279
+
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
280
+
AT91_PMC_PLL_UPDT_UPDATE | core->id);
281
281
282
282
regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0,
283
283
AT91_PMC_PLL_CTRL0_ENLOCK | AT91_PMC_PLL_CTRL0_ENPLL,
284
284
AT91_PMC_PLL_CTRL0_ENLOCK |
285
285
AT91_PMC_PLL_CTRL0_ENPLL);
286
286
287
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
288
-
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
289
-
AT91_PMC_PLL_UPDT_UPDATE | core->id);
287
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
288
+
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
289
+
AT91_PMC_PLL_UPDT_UPDATE | core->id);
290
290
291
291
while (!sam9x60_pll_ready(regmap, core->id))
292
292
cpu_relax();
···
338
338
.restore_context = sam9x60_frac_pll_restore_context,
339
339
};
340
340
341
-
/* This function should be called with spinlock acquired. */
341
+
/* This function should be called with spinlock acquired.
342
+
* Warning: this function must be called only if the same PLL ID was set in
343
+
* PLL_UPDT register previously.
344
+
*/
342
345
static void sam9x60_div_pll_set_div(struct sam9x60_pll_core *core, u32 div,
343
346
bool enable)
344
347
{
···
353
350
core->layout->div_mask | ena_msk,
354
351
(div << core->layout->div_shift) | ena_val);
355
352
356
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
357
-
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
358
-
AT91_PMC_PLL_UPDT_UPDATE | core->id);
353
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
354
+
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
355
+
AT91_PMC_PLL_UPDT_UPDATE | core->id);
359
356
360
357
while (!sam9x60_pll_ready(regmap, core->id))
361
358
cpu_relax();
···
369
366
unsigned int val, cdiv;
370
367
371
368
spin_lock_irqsave(core->lock, flags);
372
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
373
-
AT91_PMC_PLL_UPDT_ID_MSK, core->id);
369
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
370
+
AT91_PMC_PLL_UPDT_ID_MSK, core->id);
374
371
regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val);
375
372
cdiv = (val & core->layout->div_mask) >> core->layout->div_shift;
376
373
···
401
398
402
399
spin_lock_irqsave(core->lock, flags);
403
400
404
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
405
-
AT91_PMC_PLL_UPDT_ID_MSK, core->id);
401
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
402
+
AT91_PMC_PLL_UPDT_ID_MSK, core->id);
406
403
407
404
regmap_update_bits(regmap, AT91_PMC_PLL_CTRL0,
408
405
core->layout->endiv_mask, 0);
409
406
410
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT,
411
-
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
412
-
AT91_PMC_PLL_UPDT_UPDATE | core->id);
407
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT,
408
+
AT91_PMC_PLL_UPDT_UPDATE | AT91_PMC_PLL_UPDT_ID_MSK,
409
+
AT91_PMC_PLL_UPDT_UPDATE | core->id);
413
410
414
411
spin_unlock_irqrestore(core->lock, flags);
415
412
}
···
521
518
div->div = DIV_ROUND_CLOSEST(parent_rate, rate) - 1;
522
519
523
520
spin_lock_irqsave(core->lock, irqflags);
524
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT, AT91_PMC_PLL_UPDT_ID_MSK,
525
-
core->id);
521
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT, AT91_PMC_PLL_UPDT_ID_MSK,
522
+
core->id);
526
523
regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val);
527
524
cdiv = (val & core->layout->div_mask) >> core->layout->div_shift;
528
525
···
577
574
div->div = div->safe_div;
578
575
579
576
spin_lock_irqsave(core.lock, irqflags);
580
-
regmap_update_bits(regmap, AT91_PMC_PLL_UPDT, AT91_PMC_PLL_UPDT_ID_MSK,
581
-
core.id);
577
+
regmap_write_bits(regmap, AT91_PMC_PLL_UPDT, AT91_PMC_PLL_UPDT_ID_MSK,
578
+
core.id);
582
579
regmap_read(regmap, AT91_PMC_PLL_CTRL0, &val);
583
580
cdiv = (val & core.layout->div_mask) >> core.layout->div_shift;
584
581