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Merge tag 'staging-5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging/IIO fixes from Greg KH:
"Here are a number of small staging and IIO driver fixes for reported
issues for 5.5-rc2

Nothing major, a bunch of tiny IIO driver issues resolved, and some
staging driver fixes for things that people ran into with 5.5-rc1.
Full details are in the shortlog.

All of these have been in linux-next with no reported issues"

* tag 'staging-5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (28 commits)
fbtft: Fix the initialization from property algorithm
staging: rtl8712: fix interface sanity check
staging: rtl8188eu: fix interface sanity check
staging: gigaset: add endpoint-type sanity check
staging: gigaset: fix illegal free on probe errors
staging: gigaset: fix general protection fault on probe
staging: vchiq: call unregister_chrdev_region() when driver registration fails
staging: exfat: fix multiple definition error of `rename_file'
staging/wlan-ng: add CRC32 dependency in Kconfig
staging: hp100: Fix build error without ETHERNET
staging: fbtft: Do not hardcode SPI CS polarity inversion
staging: exfat: properly support discard in clr_alloc_bitmap()
staging/octeon: Mark Ethernet driver as BROKEN
iio: adc: max9611: Fix too short conversion time delay
iio: ad7949: fix channels mixups
iio: imu: st_lsm6dsx: do not power-off accel if events are enabled
iio: imu: st_lsm6dsx: track hw FIFO buffering with fifo_mask
iio: imu: st_lsm6dsx: fix decimation factor estimation
iio: imu: inv_mpu6050: fix temperature reporting using bad unit
iio: humidity: hdc100x: fix IIO_HUMIDITYRELATIVE channel reporting
...

+200 -92
+3 -2
Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml
··· 1 - # SPDX-License-Identifier: GPL-2.0-only 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 2 %YAML 1.2 3 3 --- 4 4 $id: http://devicetree.org/schemas/iio/adc/adi,ad7292.yaml# ··· 53 53 description: | 54 54 The channel number. It can have up to 8 channels numbered from 0 to 7. 55 55 items: 56 - maximum: 7 56 + - minimum: 0 57 + maximum: 7 57 58 58 59 diff-channels: 59 60 description: see Documentation/devicetree/bindings/iio/adc/adc.txt
+8 -4
drivers/iio/accel/st_accel_core.c
··· 992 992 #define ST_ACCEL_TRIGGER_OPS NULL 993 993 #endif 994 994 995 + #ifdef CONFIG_ACPI 995 996 static const struct iio_mount_matrix * 996 997 get_mount_matrix(const struct iio_dev *indio_dev, 997 998 const struct iio_chan_spec *chan) ··· 1013 1012 static int apply_acpi_orientation(struct iio_dev *indio_dev, 1014 1013 struct iio_chan_spec *channels) 1015 1014 { 1016 - #ifdef CONFIG_ACPI 1017 1015 struct st_sensor_data *adata = iio_priv(indio_dev); 1018 1016 struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; 1019 1017 struct acpi_device *adev; ··· 1140 1140 out: 1141 1141 kfree(buffer.pointer); 1142 1142 return ret; 1143 - #else /* !CONFIG_ACPI */ 1144 - return 0; 1145 - #endif 1146 1143 } 1144 + #else /* !CONFIG_ACPI */ 1145 + static int apply_acpi_orientation(struct iio_dev *indio_dev, 1146 + struct iio_chan_spec *channels) 1147 + { 1148 + return 0; 1149 + } 1150 + #endif 1147 1151 1148 1152 /* 1149 1153 * st_accel_get_settings() - get sensor settings from device name
+6 -1
drivers/iio/adc/ad7124.c
··· 39 39 #define AD7124_STATUS_POR_FLAG_MSK BIT(4) 40 40 41 41 /* AD7124_ADC_CONTROL */ 42 + #define AD7124_ADC_CTRL_REF_EN_MSK BIT(8) 43 + #define AD7124_ADC_CTRL_REF_EN(x) FIELD_PREP(AD7124_ADC_CTRL_REF_EN_MSK, x) 42 44 #define AD7124_ADC_CTRL_PWR_MSK GENMASK(7, 6) 43 45 #define AD7124_ADC_CTRL_PWR(x) FIELD_PREP(AD7124_ADC_CTRL_PWR_MSK, x) 44 46 #define AD7124_ADC_CTRL_MODE_MSK GENMASK(5, 2) ··· 426 424 break; 427 425 case AD7124_INT_REF: 428 426 st->channel_config[channel_number].vref_mv = 2500; 429 - break; 427 + st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK; 428 + st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); 429 + return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 430 + 2, st->adc_control); 430 431 default: 431 432 dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); 432 433 return -EINVAL;
+1 -1
drivers/iio/adc/ad7606.c
··· 85 85 86 86 static int ad7606_read_samples(struct ad7606_state *st) 87 87 { 88 - unsigned int num = st->chip_info->num_channels; 88 + unsigned int num = st->chip_info->num_channels - 1; 89 89 u16 *data = st->data; 90 90 int ret; 91 91
+17 -5
drivers/iio/adc/ad7949.c
··· 89 89 unsigned int channel) 90 90 { 91 91 int ret; 92 + int i; 92 93 int bits_per_word = ad7949_adc->resolution; 93 94 int mask = GENMASK(ad7949_adc->resolution, 0); 94 95 struct spi_message msg; ··· 101 100 }, 102 101 }; 103 102 104 - ret = ad7949_spi_write_cfg(ad7949_adc, 105 - channel << AD7949_OFFSET_CHANNEL_SEL, 106 - AD7949_MASK_CHANNEL_SEL); 107 - if (ret) 108 - return ret; 103 + /* 104 + * 1: write CFG for sample N and read old data (sample N-2) 105 + * 2: if CFG was not changed since sample N-1 then we'll get good data 106 + * at the next xfer, so we bail out now, otherwise we write something 107 + * and we read garbage (sample N-1 configuration). 108 + */ 109 + for (i = 0; i < 2; i++) { 110 + ret = ad7949_spi_write_cfg(ad7949_adc, 111 + channel << AD7949_OFFSET_CHANNEL_SEL, 112 + AD7949_MASK_CHANNEL_SEL); 113 + if (ret) 114 + return ret; 115 + if (channel == ad7949_adc->current_channel) 116 + break; 117 + } 109 118 119 + /* 3: write something and read actual data */ 110 120 ad7949_adc->buffer = 0; 111 121 spi_message_init_with_transfers(&msg, tx, 1); 112 122 ret = spi_sync(ad7949_adc->spi, &msg);
+1 -1
drivers/iio/adc/intel_mrfld_adc.c
··· 185 185 int irq; 186 186 int ret; 187 187 188 - indio_dev = devm_iio_device_alloc(dev, sizeof(*indio_dev)); 188 + indio_dev = devm_iio_device_alloc(dev, sizeof(struct mrfld_adc)); 189 189 if (!indio_dev) 190 190 return -ENOMEM; 191 191
+7 -1
drivers/iio/adc/max1027.c
··· 478 478 st->trig->ops = &max1027_trigger_ops; 479 479 st->trig->dev.parent = &spi->dev; 480 480 iio_trigger_set_drvdata(st->trig, indio_dev); 481 - iio_trigger_register(st->trig); 481 + ret = devm_iio_trigger_register(&indio_dev->dev, 482 + st->trig); 483 + if (ret < 0) { 484 + dev_err(&indio_dev->dev, 485 + "Failed to register iio trigger\n"); 486 + return ret; 487 + } 482 488 483 489 ret = devm_request_threaded_irq(&spi->dev, spi->irq, 484 490 iio_trigger_generic_data_rdy_poll,
+10 -6
drivers/iio/adc/max9611.c
··· 89 89 #define MAX9611_TEMP_SCALE_NUM 1000000 90 90 #define MAX9611_TEMP_SCALE_DIV 2083 91 91 92 + /* 93 + * Conversion time is 2 ms (typically) at Ta=25 degreeC 94 + * No maximum value is known, so play it safe. 95 + */ 96 + #define MAX9611_CONV_TIME_US_RANGE 3000, 3300 97 + 92 98 struct max9611_dev { 93 99 struct device *dev; 94 100 struct i2c_client *i2c_client; ··· 242 236 return ret; 243 237 } 244 238 245 - /* 246 - * need a delay here to make register configuration 247 - * stabilize. 1 msec at least, from empirical testing. 248 - */ 249 - usleep_range(1000, 2000); 239 + /* need a delay here to make register configuration stabilize. */ 240 + 241 + usleep_range(MAX9611_CONV_TIME_US_RANGE); 250 242 251 243 ret = i2c_smbus_read_word_swapped(max9611->i2c_client, reg_addr); 252 244 if (ret < 0) { ··· 511 507 MAX9611_REG_CTRL2, 0); 512 508 return ret; 513 509 } 514 - usleep_range(1000, 2000); 510 + usleep_range(MAX9611_CONV_TIME_US_RANGE); 515 511 516 512 return 0; 517 513 }
+1 -1
drivers/iio/humidity/hdc100x.c
··· 229 229 *val2 = 65536; 230 230 return IIO_VAL_FRACTIONAL; 231 231 } else { 232 - *val = 100; 232 + *val = 100000; 233 233 *val2 = 65536; 234 234 return IIO_VAL_FRACTIONAL; 235 235 }
+12 -11
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
··· 117 117 .reg = &reg_set_6050, 118 118 .config = &chip_config_6050, 119 119 .fifo_size = 1024, 120 + .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 120 121 }, 121 122 { 122 123 .whoami = INV_MPU6500_WHOAMI_VALUE, ··· 125 124 .reg = &reg_set_6500, 126 125 .config = &chip_config_6050, 127 126 .fifo_size = 512, 127 + .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 128 128 }, 129 129 { 130 130 .whoami = INV_MPU6515_WHOAMI_VALUE, ··· 133 131 .reg = &reg_set_6500, 134 132 .config = &chip_config_6050, 135 133 .fifo_size = 512, 134 + .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 136 135 }, 137 136 { 138 137 .whoami = INV_MPU6000_WHOAMI_VALUE, ··· 141 138 .reg = &reg_set_6050, 142 139 .config = &chip_config_6050, 143 140 .fifo_size = 1024, 141 + .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 144 142 }, 145 143 { 146 144 .whoami = INV_MPU9150_WHOAMI_VALUE, ··· 149 145 .reg = &reg_set_6050, 150 146 .config = &chip_config_6050, 151 147 .fifo_size = 1024, 148 + .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 152 149 }, 153 150 { 154 151 .whoami = INV_MPU9250_WHOAMI_VALUE, ··· 157 152 .reg = &reg_set_6500, 158 153 .config = &chip_config_6050, 159 154 .fifo_size = 512, 155 + .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 160 156 }, 161 157 { 162 158 .whoami = INV_MPU9255_WHOAMI_VALUE, ··· 165 159 .reg = &reg_set_6500, 166 160 .config = &chip_config_6050, 167 161 .fifo_size = 512, 162 + .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 168 163 }, 169 164 { 170 165 .whoami = INV_ICM20608_WHOAMI_VALUE, ··· 173 166 .reg = &reg_set_6500, 174 167 .config = &chip_config_6050, 175 168 .fifo_size = 512, 169 + .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 176 170 }, 177 171 { 178 172 .whoami = INV_ICM20602_WHOAMI_VALUE, ··· 181 173 .reg = &reg_set_icm20602, 182 174 .config = &chip_config_6050, 183 175 .fifo_size = 1008, 176 + .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 184 177 }, 185 178 }; 186 179 ··· 490 481 491 482 return IIO_VAL_INT_PLUS_MICRO; 492 483 case IIO_TEMP: 493 - *val = 0; 494 - if (st->chip_type == INV_ICM20602) 495 - *val2 = INV_ICM20602_TEMP_SCALE; 496 - else 497 - *val2 = INV_MPU6050_TEMP_SCALE; 498 - 484 + *val = st->hw->temp.scale / 1000000; 485 + *val2 = st->hw->temp.scale % 1000000; 499 486 return IIO_VAL_INT_PLUS_MICRO; 500 487 case IIO_MAGN: 501 488 return inv_mpu_magn_get_scale(st, chan, val, val2); ··· 501 496 case IIO_CHAN_INFO_OFFSET: 502 497 switch (chan->type) { 503 498 case IIO_TEMP: 504 - if (st->chip_type == INV_ICM20602) 505 - *val = INV_ICM20602_TEMP_OFFSET; 506 - else 507 - *val = INV_MPU6050_TEMP_OFFSET; 508 - 499 + *val = st->hw->temp.offset; 509 500 return IIO_VAL_INT; 510 501 default: 511 502 return -EINVAL;
+12 -4
drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
··· 107 107 * @reg: register map of the chip. 108 108 * @config: configuration of the chip. 109 109 * @fifo_size: size of the FIFO in bytes. 110 + * @temp: offset and scale to apply to raw temperature. 110 111 */ 111 112 struct inv_mpu6050_hw { 112 113 u8 whoami; ··· 115 114 const struct inv_mpu6050_reg_map *reg; 116 115 const struct inv_mpu6050_chip_config *config; 117 116 size_t fifo_size; 117 + struct { 118 + int offset; 119 + int scale; 120 + } temp; 118 121 }; 119 122 120 123 /* ··· 284 279 #define INV_MPU6050_REG_UP_TIME_MIN 5000 285 280 #define INV_MPU6050_REG_UP_TIME_MAX 10000 286 281 287 - #define INV_MPU6050_TEMP_OFFSET 12421 288 - #define INV_MPU6050_TEMP_SCALE 2941 282 + #define INV_MPU6050_TEMP_OFFSET 12420 283 + #define INV_MPU6050_TEMP_SCALE 2941176 289 284 #define INV_MPU6050_MAX_GYRO_FS_PARAM 3 290 285 #define INV_MPU6050_MAX_ACCL_FS_PARAM 3 291 286 #define INV_MPU6050_THREE_AXIS 3 292 287 #define INV_MPU6050_GYRO_CONFIG_FSR_SHIFT 3 293 288 #define INV_MPU6050_ACCL_CONFIG_FSR_SHIFT 3 294 289 295 - #define INV_ICM20602_TEMP_OFFSET 8170 296 - #define INV_ICM20602_TEMP_SCALE 3060 290 + #define INV_MPU6500_TEMP_OFFSET 7011 291 + #define INV_MPU6500_TEMP_SCALE 2995178 292 + 293 + #define INV_ICM20608_TEMP_OFFSET 8170 294 + #define INV_ICM20608_TEMP_SCALE 3059976 297 295 298 296 /* 6 + 6 + 7 (for MPU9x50) = 19 round up to 24 and plus 8 */ 299 297 #define INV_MPU6050_OUTPUT_DATA_SIZE 32
+2 -4
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
··· 320 320 * @odr: Output data rate of the sensor [Hz]. 321 321 * @watermark: Sensor watermark level. 322 322 * @sip: Number of samples in a given pattern. 323 - * @decimator: FIFO decimation factor. 324 323 * @ts_ref: Sensor timestamp reference for hw one. 325 324 * @ext_info: Sensor settings if it is connected to i2c controller 326 325 */ ··· 333 334 334 335 u16 watermark; 335 336 u8 sip; 336 - u8 decimator; 337 337 s64 ts_ref; 338 338 339 339 struct { ··· 349 351 * @fifo_lock: Mutex to prevent concurrent access to the hw FIFO. 350 352 * @conf_lock: Mutex to prevent concurrent FIFO configuration update. 351 353 * @page_lock: Mutex to prevent concurrent memory page configuration. 352 - * @fifo_mode: FIFO operating mode supported by the device. 353 354 * @suspend_mask: Suspended sensor bitmask. 354 355 * @enable_mask: Enabled sensor bitmask. 356 + * @fifo_mask: Enabled hw FIFO bitmask. 355 357 * @ts_gain: Hw timestamp rate after internal calibration. 356 358 * @ts_sip: Total number of timestamp samples in a given pattern. 357 359 * @sip: Total number of samples (acc/gyro/ts) in a given pattern. ··· 371 373 struct mutex conf_lock; 372 374 struct mutex page_lock; 373 375 374 - enum st_lsm6dsx_fifo_mode fifo_mode; 375 376 u8 suspend_mask; 376 377 u8 enable_mask; 378 + u8 fifo_mask; 377 379 s64 ts_gain; 378 380 u8 ts_sip; 379 381 u8 sip;
+32 -18
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
··· 78 78 { 32, 0x7 }, 79 79 }; 80 80 81 - static int st_lsm6dsx_get_decimator_val(u8 val) 81 + static int 82 + st_lsm6dsx_get_decimator_val(struct st_lsm6dsx_sensor *sensor, u32 max_odr) 82 83 { 83 84 const int max_size = ARRAY_SIZE(st_lsm6dsx_decimator_table); 85 + u32 decimator = max_odr / sensor->odr; 84 86 int i; 85 87 86 - for (i = 0; i < max_size; i++) 87 - if (st_lsm6dsx_decimator_table[i].decimator == val) 88 + if (decimator > 1) 89 + decimator = round_down(decimator, 2); 90 + 91 + for (i = 0; i < max_size; i++) { 92 + if (st_lsm6dsx_decimator_table[i].decimator == decimator) 88 93 break; 94 + } 89 95 90 96 return i == max_size ? 0 : st_lsm6dsx_decimator_table[i].val; 91 97 } ··· 117 111 } 118 112 } 119 113 114 + static u8 st_lsm6dsx_get_sip(struct st_lsm6dsx_sensor *sensor, u32 min_odr) 115 + { 116 + u8 sip = sensor->odr / min_odr; 117 + 118 + return sip > 1 ? round_down(sip, 2) : sip; 119 + } 120 + 120 121 static int st_lsm6dsx_update_decimators(struct st_lsm6dsx_hw *hw) 121 122 { 122 123 const struct st_lsm6dsx_reg *ts_dec_reg; ··· 144 131 sensor = iio_priv(hw->iio_devs[i]); 145 132 /* update fifo decimators and sample in pattern */ 146 133 if (hw->enable_mask & BIT(sensor->id)) { 147 - sensor->sip = sensor->odr / min_odr; 148 - sensor->decimator = max_odr / sensor->odr; 149 - data = st_lsm6dsx_get_decimator_val(sensor->decimator); 134 + sensor->sip = st_lsm6dsx_get_sip(sensor, min_odr); 135 + data = st_lsm6dsx_get_decimator_val(sensor, max_odr); 150 136 } else { 151 137 sensor->sip = 0; 152 - sensor->decimator = 0; 153 138 data = 0; 154 139 } 155 140 ts_sip = max_t(u16, ts_sip, sensor->sip); ··· 187 176 enum st_lsm6dsx_fifo_mode fifo_mode) 188 177 { 189 178 unsigned int data; 190 - int err; 191 179 192 180 data = FIELD_PREP(ST_LSM6DSX_FIFO_MODE_MASK, fifo_mode); 193 - err = st_lsm6dsx_update_bits_locked(hw, ST_LSM6DSX_REG_FIFO_MODE_ADDR, 194 - ST_LSM6DSX_FIFO_MODE_MASK, data); 195 - if (err < 0) 196 - return err; 197 - 198 - hw->fifo_mode = fifo_mode; 199 - 200 - return 0; 181 + return st_lsm6dsx_update_bits_locked(hw, ST_LSM6DSX_REG_FIFO_MODE_ADDR, 182 + ST_LSM6DSX_FIFO_MODE_MASK, data); 201 183 } 202 184 203 185 static int st_lsm6dsx_set_fifo_odr(struct st_lsm6dsx_sensor *sensor, ··· 612 608 int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable) 613 609 { 614 610 struct st_lsm6dsx_hw *hw = sensor->hw; 611 + u8 fifo_mask; 615 612 int err; 616 613 617 614 mutex_lock(&hw->conf_lock); 618 615 619 - if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) { 616 + if (enable) 617 + fifo_mask = hw->fifo_mask | BIT(sensor->id); 618 + else 619 + fifo_mask = hw->fifo_mask & ~BIT(sensor->id); 620 + 621 + if (hw->fifo_mask) { 620 622 err = st_lsm6dsx_flush_fifo(hw); 621 623 if (err < 0) 622 624 goto out; ··· 652 642 if (err < 0) 653 643 goto out; 654 644 655 - if (hw->enable_mask) { 645 + if (fifo_mask) { 656 646 /* reset hw ts counter */ 657 647 err = st_lsm6dsx_reset_hw_ts(hw); 658 648 if (err < 0) 659 649 goto out; 660 650 661 651 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT); 652 + if (err < 0) 653 + goto out; 662 654 } 655 + 656 + hw->fifo_mask = fifo_mask; 663 657 664 658 out: 665 659 mutex_unlock(&hw->conf_lock);
+28 -6
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
··· 1447 1447 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); 1448 1448 } 1449 1449 1450 - int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1451 - bool enable) 1450 + static int 1451 + __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1452 + bool enable) 1452 1453 { 1453 1454 struct st_lsm6dsx_hw *hw = sensor->hw; 1454 1455 u32 odr = enable ? sensor->odr : 0; ··· 1465 1464 hw->enable_mask &= ~BIT(sensor->id); 1466 1465 1467 1466 return 0; 1467 + } 1468 + 1469 + static int 1470 + st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable) 1471 + { 1472 + struct st_lsm6dsx_hw *hw = sensor->hw; 1473 + 1474 + if (sensor->id == ST_LSM6DSX_ID_GYRO || enable) 1475 + return 0; 1476 + 1477 + return hw->enable_event; 1478 + } 1479 + 1480 + int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1481 + bool enable) 1482 + { 1483 + if (st_lsm6dsx_check_events(sensor, enable)) 1484 + return 0; 1485 + 1486 + return __st_lsm6dsx_sensor_set_enable(sensor, enable); 1468 1487 } 1469 1488 1470 1489 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, ··· 1682 1661 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1683 1662 struct st_lsm6dsx_hw *hw = sensor->hw; 1684 1663 u8 enable_event; 1685 - int err = 0; 1664 + int err; 1686 1665 1687 1666 if (type != IIO_EV_TYPE_THRESH) 1688 1667 return -EINVAL; ··· 1710 1689 return err; 1711 1690 1712 1691 mutex_lock(&hw->conf_lock); 1713 - err = st_lsm6dsx_sensor_set_enable(sensor, state); 1692 + if (enable_event || !(hw->fifo_mask & BIT(sensor->id))) 1693 + err = __st_lsm6dsx_sensor_set_enable(sensor, state); 1714 1694 mutex_unlock(&hw->conf_lock); 1715 1695 if (err < 0) 1716 1696 return err; ··· 2322 2300 hw->suspend_mask |= BIT(sensor->id); 2323 2301 } 2324 2302 2325 - if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) 2303 + if (hw->fifo_mask) 2326 2304 err = st_lsm6dsx_flush_fifo(hw); 2327 2305 2328 2306 return err; ··· 2358 2336 hw->suspend_mask &= ~BIT(sensor->id); 2359 2337 } 2360 2338 2361 - if (hw->enable_mask) 2339 + if (hw->fifo_mask) 2362 2340 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT); 2363 2341 2364 2342 return err;
+4 -2
drivers/iio/temperature/ltc2983.c
··· 444 444 else 445 445 temp = __convert_to_raw(temp, resolution); 446 446 } else { 447 - of_property_read_u32_index(np, propname, index, 448 - (u32 *)&temp); 447 + u32 t32; 448 + 449 + of_property_read_u32_index(np, propname, index, &t32); 450 + temp = t32; 449 451 } 450 452 451 453 for (j = 0; j < n_size; j++)
+2 -2
drivers/staging/exfat/exfat.h
··· 805 805 s32 create_file(struct inode *inode, struct chain_t *p_dir, 806 806 struct uni_name_t *p_uniname, u8 mode, struct file_id_t *fid); 807 807 void remove_file(struct inode *inode, struct chain_t *p_dir, s32 entry); 808 - s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 old_entry, 809 - struct uni_name_t *p_uniname, struct file_id_t *fid); 808 + s32 exfat_rename_file(struct inode *inode, struct chain_t *p_dir, s32 old_entry, 809 + struct uni_name_t *p_uniname, struct file_id_t *fid); 810 810 s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry, 811 811 struct chain_t *p_newdir, struct uni_name_t *p_uniname, 812 812 struct file_id_t *fid);
+6 -4
drivers/staging/exfat/exfat_core.c
··· 192 192 193 193 exfat_bitmap_clear((u8 *)p_fs->vol_amap[i]->b_data, b); 194 194 195 - return sector_write(sb, sector, p_fs->vol_amap[i], 0); 196 - 197 195 #ifdef CONFIG_EXFAT_DISCARD 198 196 if (opts->discard) { 199 197 ret = sb_issue_discard(sb, START_SECTOR(clu), ··· 200 202 if (ret == -EOPNOTSUPP) { 201 203 pr_warn("discard not supported by device, disabling"); 202 204 opts->discard = 0; 205 + } else { 206 + return ret; 203 207 } 204 208 } 205 209 #endif /* CONFIG_EXFAT_DISCARD */ 210 + 211 + return sector_write(sb, sector, p_fs->vol_amap[i], 0); 206 212 } 207 213 208 214 static u32 test_alloc_bitmap(struct super_block *sb, u32 clu) ··· 2324 2322 fs_func->delete_dir_entry(sb, p_dir, entry, 0, num_entries); 2325 2323 } 2326 2324 2327 - s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry, 2328 - struct uni_name_t *p_uniname, struct file_id_t *fid) 2325 + s32 exfat_rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry, 2326 + struct uni_name_t *p_uniname, struct file_id_t *fid) 2329 2327 { 2330 2328 s32 ret, newentry = -1, num_old_entries, num_new_entries; 2331 2329 sector_t sector_old, sector_new;
+2 -2
drivers/staging/exfat/exfat_super.c
··· 1262 1262 fs_set_vol_flags(sb, VOL_DIRTY); 1263 1263 1264 1264 if (olddir.dir == newdir.dir) 1265 - ret = rename_file(new_parent_inode, &olddir, dentry, &uni_name, 1266 - fid); 1265 + ret = exfat_rename_file(new_parent_inode, &olddir, dentry, 1266 + &uni_name, fid); 1267 1267 else 1268 1268 ret = move_file(new_parent_inode, &olddir, dentry, &newdir, 1269 1269 &uni_name, fid);
+9 -3
drivers/staging/fbtft/fb_uc1611.c
··· 63 63 { 64 64 int ret; 65 65 66 - /* Set CS active high */ 67 - par->spi->mode |= SPI_CS_HIGH; 66 + /* 67 + * Set CS active inverse polarity: just setting SPI_CS_HIGH does not 68 + * work with GPIO based chip selects that are logically active high 69 + * but inverted inside the GPIO library, so enforce inverted 70 + * semantics. 71 + */ 72 + par->spi->mode ^= SPI_CS_HIGH; 68 73 ret = spi_setup(par->spi); 69 74 if (ret) { 70 - dev_err(par->info->device, "Could not set SPI_CS_HIGH\n"); 75 + dev_err(par->info->device, 76 + "Could not set inverse CS polarity\n"); 71 77 return ret; 72 78 } 73 79
+10 -3
drivers/staging/fbtft/fb_watterott.c
··· 150 150 151 151 /* enable SPI interface by having CS and MOSI low during reset */ 152 152 save_mode = par->spi->mode; 153 - par->spi->mode |= SPI_CS_HIGH; 154 - ret = spi_setup(par->spi); /* set CS inactive low */ 153 + /* 154 + * Set CS active inverse polarity: just setting SPI_CS_HIGH does not 155 + * work with GPIO based chip selects that are logically active high 156 + * but inverted inside the GPIO library, so enforce inverted 157 + * semantics. 158 + */ 159 + par->spi->mode ^= SPI_CS_HIGH; 160 + ret = spi_setup(par->spi); 155 161 if (ret) { 156 - dev_err(par->info->device, "Could not set SPI_CS_HIGH\n"); 162 + dev_err(par->info->device, 163 + "Could not set inverse CS polarity\n"); 157 164 return ret; 158 165 } 159 166 write_reg(par, 0x00); /* make sure mode is set */
+3 -3
drivers/staging/fbtft/fbtft-core.c
··· 913 913 if (count == 0) 914 914 return -EINVAL; 915 915 916 - values = kmalloc_array(count, sizeof(*values), GFP_KERNEL); 916 + values = kmalloc_array(count + 1, sizeof(*values), GFP_KERNEL); 917 917 if (!values) 918 918 return -ENOMEM; 919 919 ··· 926 926 gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ 927 927 928 928 index = -1; 929 - while (index < count) { 930 - val = values[++index]; 929 + val = values[++index]; 931 930 931 + while (index < count) { 932 932 if (val & FBTFT_OF_INIT_CMD) { 933 933 val &= 0xFFFF; 934 934 i = 0;
+1
drivers/staging/hp/Kconfig
··· 6 6 config NET_VENDOR_HP 7 7 bool "HP devices" 8 8 default y 9 + depends on ETHERNET 9 10 depends on ISA || EISA || PCI 10 11 ---help--- 11 12 If you have a network (Ethernet) card belonging to this class, say Y.
+18 -5
drivers/staging/isdn/gigaset/usb-gigaset.c
··· 571 571 { 572 572 struct usb_cardstate *ucs; 573 573 574 - cs->hw.usb = ucs = 575 - kmalloc(sizeof(struct usb_cardstate), GFP_KERNEL); 574 + cs->hw.usb = ucs = kzalloc(sizeof(struct usb_cardstate), GFP_KERNEL); 576 575 if (!ucs) { 577 576 pr_err("out of memory\n"); 578 577 return -ENOMEM; ··· 583 584 ucs->bchars[3] = 0; 584 585 ucs->bchars[4] = 0x11; 585 586 ucs->bchars[5] = 0x13; 586 - ucs->bulk_out_buffer = NULL; 587 - ucs->bulk_out_urb = NULL; 588 - ucs->read_urb = NULL; 589 587 tasklet_init(&cs->write_tasklet, 590 588 gigaset_modem_fill, (unsigned long) cs); 591 589 ··· 681 685 return -ENODEV; 682 686 } 683 687 688 + if (hostif->desc.bNumEndpoints < 2) { 689 + dev_err(&interface->dev, "missing endpoints\n"); 690 + return -ENODEV; 691 + } 692 + 684 693 dev_info(&udev->dev, "%s: Device matched ... !\n", __func__); 685 694 686 695 /* allocate memory for our device state and initialize it */ ··· 705 704 706 705 endpoint = &hostif->endpoint[0].desc; 707 706 707 + if (!usb_endpoint_is_bulk_out(endpoint)) { 708 + dev_err(&interface->dev, "missing bulk-out endpoint\n"); 709 + retval = -ENODEV; 710 + goto error; 711 + } 712 + 708 713 buffer_size = le16_to_cpu(endpoint->wMaxPacketSize); 709 714 ucs->bulk_out_size = buffer_size; 710 715 ucs->bulk_out_epnum = usb_endpoint_num(endpoint); ··· 729 722 } 730 723 731 724 endpoint = &hostif->endpoint[1].desc; 725 + 726 + if (!usb_endpoint_is_int_in(endpoint)) { 727 + dev_err(&interface->dev, "missing int-in endpoint\n"); 728 + retval = -ENODEV; 729 + goto error; 730 + } 732 731 733 732 ucs->busy = 0; 734 733
+1
drivers/staging/octeon/Kconfig
··· 3 3 tristate "Cavium Networks Octeon Ethernet support" 4 4 depends on CAVIUM_OCTEON_SOC || COMPILE_TEST 5 5 depends on NETDEVICES 6 + depends on BROKEN 6 7 select PHYLIB 7 8 select MDIO_OCTEON 8 9 help
+1 -1
drivers/staging/rtl8188eu/os_dep/usb_intf.c
··· 70 70 phost_conf = pusbd->actconfig; 71 71 pconf_desc = &phost_conf->desc; 72 72 73 - phost_iface = &usb_intf->altsetting[0]; 73 + phost_iface = usb_intf->cur_altsetting; 74 74 piface_desc = &phost_iface->desc; 75 75 76 76 pdvobjpriv->NumInterfaces = pconf_desc->bNumInterfaces;
+1 -1
drivers/staging/rtl8712/usb_intf.c
··· 247 247 248 248 pdvobjpriv->padapter = padapter; 249 249 padapter->eeprom_address_size = 6; 250 - phost_iface = &pintf->altsetting[0]; 250 + phost_iface = pintf->cur_altsetting; 251 251 piface_desc = &phost_iface->desc; 252 252 pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints; 253 253 if (pusbd->speed == USB_SPEED_HIGH) {
+1 -1
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
··· 3309 3309 return 0; 3310 3310 3311 3311 region_unregister: 3312 - platform_driver_unregister(&vchiq_driver); 3312 + unregister_chrdev_region(vchiq_devid, 1); 3313 3313 3314 3314 class_destroy: 3315 3315 class_destroy(vchiq_class);
+1
drivers/staging/wlan-ng/Kconfig
··· 4 4 depends on WLAN && USB && CFG80211 5 5 select WIRELESS_EXT 6 6 select WEXT_PRIV 7 + select CRC32 7 8 help 8 9 This is the wlan-ng prism 2.5/3 USB driver for a wide range of 9 10 old USB wireless devices.