tjh.dev / kernel
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clk: qcom: dispcc-sc7180: Add missing MDSS resets

The MDSS resets have so far been left undescribed. Fix that.

Fixes: dd3d06622138 ("clk: qcom: Add display clock controller driver for SC7180")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Tested-by: Val Packett <val@packett.cool> # sc7180-ecs-liva-qc710
Link: https://lore.kernel.org/r/20260120-topic-7180_dispcc_bcr-v1-2-0b1b442156c3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Konrad Dybcio and committed by
Bjorn Andersson b0bc6011 2064d217

+8
+8
drivers/clk/qcom/dispcc-sc7180.c
··· 17 17 #include "clk-regmap-divider.h" 18 18 #include "common.h" 19 19 #include "gdsc.h" 20 + #include "reset.h" 20 21 21 22 enum { 22 23 P_BI_TCXO, ··· 637 636 .flags = HW_CTRL, 638 637 }; 639 638 639 + static const struct qcom_reset_map disp_cc_sc7180_resets[] = { 640 + [DISP_CC_MDSS_CORE_BCR] = { 0x2000 }, 641 + [DISP_CC_MDSS_RSCC_BCR] = { 0x4000 }, 642 + }; 643 + 640 644 static struct gdsc *disp_cc_sc7180_gdscs[] = { 641 645 [MDSS_GDSC] = &mdss_gdsc, 642 646 }; ··· 693 687 .config = &disp_cc_sc7180_regmap_config, 694 688 .clks = disp_cc_sc7180_clocks, 695 689 .num_clks = ARRAY_SIZE(disp_cc_sc7180_clocks), 690 + .resets = disp_cc_sc7180_resets, 691 + .num_resets = ARRAY_SIZE(disp_cc_sc7180_resets), 696 692 .gdscs = disp_cc_sc7180_gdscs, 697 693 .num_gdscs = ARRAY_SIZE(disp_cc_sc7180_gdscs), 698 694 };