Merge tag 'pci-v3.9-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

+37 -39

drivers/acpi/pci_root.c

··· 415 415 struct acpi_pci_root *root; 416 416 struct acpi_pci_driver *driver; 417 417 u32 flags, base_flags; 418 - bool is_osc_granted = false; 419 418 420 419 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL); 421 420 if (!root) ··· 475 476 flags = base_flags = OSC_PCI_SEGMENT_GROUPS_SUPPORT; 476 477 acpi_pci_osc_support(root, flags); 477 478 479 + /* 480 + * TBD: Need PCI interface for enumeration/configuration of roots. 481 + */ 482 + 483 + mutex_lock(&acpi_pci_root_lock); 484 + list_add_tail(&root->node, &acpi_pci_roots); 485 + mutex_unlock(&acpi_pci_root_lock); 486 + 487 + /* 488 + * Scan the Root Bridge 489 + * -------------------- 490 + * Must do this prior to any attempt to bind the root device, as the 491 + * PCI namespace does not get created until this call is made (and 492 + * thus the root bridge's pci_dev does not exist). 493 + */ 494 + root->bus = pci_acpi_scan_root(root); 495 + if (!root->bus) { 496 + printk(KERN_ERR PREFIX 497 + "Bus %04x:%02x not present in PCI namespace\n", 498 + root->segment, (unsigned int)root->secondary.start); 499 + result = -ENODEV; 500 + goto out_del_root; 501 + } 502 + 478 503 /* Indicate support for various _OSC capabilities. */ 479 504 if (pci_ext_cfg_avail()) 480 505 flags |= OSC_EXT_PCI_CONFIG_SUPPORT; ··· 517 494 flags = base_flags; 518 495 } 519 496 } 497 + 520 498 if (!pcie_ports_disabled 521 499 && (flags & ACPI_PCIE_REQ_SUPPORT) == ACPI_PCIE_REQ_SUPPORT) { 522 500 flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL ··· 538 514 status = acpi_pci_osc_control_set(device->handle, &flags, 539 515 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL); 540 516 if (ACPI_SUCCESS(status)) { 541 - is_osc_granted = true; 542 517 dev_info(&device->dev, 543 518 "ACPI _OSC control (0x%02x) granted\n", flags); 519 + if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { 520 + /* 521 + * We have ASPM control, but the FADT indicates 522 + * that it's unsupported. Clear it. 523 + */ 524 + pcie_clear_aspm(root->bus); 525 + } 544 526 } else { 545 - is_osc_granted = false; 546 527 dev_info(&device->dev, 547 528 "ACPI _OSC request failed (%s), " 548 529 "returned control mask: 0x%02x\n", 549 530 acpi_format_exception(status), flags); 531 + pr_info("ACPI _OSC control for PCIe not granted, " 532 + "disabling ASPM\n"); 533 + pcie_no_aspm(); 550 534 } 551 535 } else { 552 536 dev_info(&device->dev, 553 - "Unable to request _OSC control " 554 - "(_OSC support mask: 0x%02x)\n", flags); 555 - } 556 - 557 - /* 558 - * TBD: Need PCI interface for enumeration/configuration of roots. 559 - */ 560 - 561 - mutex_lock(&acpi_pci_root_lock); 562 - list_add_tail(&root->node, &acpi_pci_roots); 563 - mutex_unlock(&acpi_pci_root_lock); 564 - 565 - /* 566 - * Scan the Root Bridge 567 - * -------------------- 568 - * Must do this prior to any attempt to bind the root device, as the 569 - * PCI namespace does not get created until this call is made (and 570 - * thus the root bridge's pci_dev does not exist). 571 - */ 572 - root->bus = pci_acpi_scan_root(root); 573 - if (!root->bus) { 574 - printk(KERN_ERR PREFIX 575 - "Bus %04x:%02x not present in PCI namespace\n", 576 - root->segment, (unsigned int)root->secondary.start); 577 - result = -ENODEV; 578 - goto out_del_root; 579 - } 580 - 581 - /* ASPM setting */ 582 - if (is_osc_granted) { 583 - if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) 584 - pcie_clear_aspm(root->bus); 585 - } else { 586 - pr_info("ACPI _OSC control for PCIe not granted, " 587 - "disabling ASPM\n"); 588 - pcie_no_aspm(); 537 + "Unable to request _OSC control " 538 + "(_OSC support mask: 0x%02x)\n", flags); 589 539 } 590 540 591 541 pci_acpi_add_bus_pm_notifier(device, root->bus);

+47 -22

drivers/eisa/pci_eisa.c

··· 19 19 /* There is only *one* pci_eisa device per machine, right ? */ 20 20 static struct eisa_root_device pci_eisa_root; 21 21 22 - static int __init pci_eisa_init(struct pci_dev *pdev, 23 - const struct pci_device_id *ent) 22 + static int __init pci_eisa_init(struct pci_dev *pdev) 24 23 { 25 - int rc; 24 + int rc, i; 25 + struct resource *res, *bus_res = NULL; 26 26 27 27 if ((rc = pci_enable_device (pdev))) { 28 28 printk (KERN_ERR "pci_eisa : Could not enable device %s\n", ··· 30 30 return rc; 31 31 } 32 32 33 + /* 34 + * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI 35 + * device, so the resources available on EISA are the same as those 36 + * available on the 82375 bus. This works the same as a PCI-PCI 37 + * bridge in subtractive-decode mode (see pci_read_bridge_bases()). 38 + * We assume other PCI-EISA bridges are similar. 39 + * 40 + * eisa_root_register() can only deal with a single io port resource, 41 + * so we use the first valid io port resource. 42 + */ 43 + pci_bus_for_each_resource(pdev->bus, res, i) 44 + if (res && (res->flags & IORESOURCE_IO)) { 45 + bus_res = res; 46 + break; 47 + } 48 + 49 + if (!bus_res) { 50 + dev_err(&pdev->dev, "No resources available\n"); 51 + return -1; 52 + } 53 + 33 54 pci_eisa_root.dev = &pdev->dev; 34 - pci_eisa_root.res = pdev->bus->resource[0]; 35 - pci_eisa_root.bus_base_addr = pdev->bus->resource[0]->start; 55 + pci_eisa_root.res = bus_res; 56 + pci_eisa_root.bus_base_addr = bus_res->start; 36 57 pci_eisa_root.slots = EISA_MAX_SLOTS; 37 58 pci_eisa_root.dma_mask = pdev->dma_mask; 38 59 dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root); ··· 66 45 return 0; 67 46 } 68 47 69 - static struct pci_device_id pci_eisa_pci_tbl[] = { 70 - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 71 - PCI_CLASS_BRIDGE_EISA << 8, 0xffff00, 0 }, 72 - { 0, } 73 - }; 74 - 75 - static struct pci_driver __refdata pci_eisa_driver = { 76 - .name = "pci_eisa", 77 - .id_table = pci_eisa_pci_tbl, 78 - .probe = pci_eisa_init, 79 - }; 80 - 81 - static int __init pci_eisa_init_module (void) 48 + /* 49 + * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init(). 50 + * Otherwise pnp resource will get enabled early and could prevent eisa 51 + * to be initialized. 52 + * Also need to make sure pci_eisa_init_early() is called after 53 + * x86/pci_subsys_init(). 54 + * So need to use subsys_initcall_sync with it. 55 + */ 56 + static int __init pci_eisa_init_early(void) 82 57 { 83 - return pci_register_driver (&pci_eisa_driver); 84 - } 58 + struct pci_dev *dev = NULL; 59 + int ret; 85 60 86 - device_initcall(pci_eisa_init_module); 87 - MODULE_DEVICE_TABLE(pci, pci_eisa_pci_tbl); 61 + for_each_pci_dev(dev) 62 + if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) { 63 + ret = pci_eisa_init(dev); 64 + if (ret) 65 + return ret; 66 + } 67 + 68 + return 0; 69 + } 70 + subsys_initcall_sync(pci_eisa_init_early);

+17

drivers/gpu/drm/nouveau/core/subdev/bios/base.c

··· 248 248 } 249 249 } 250 250 251 + static void 252 + nouveau_bios_shadow_platform(struct nouveau_bios *bios) 253 + { 254 + struct pci_dev *pdev = nv_device(bios)->pdev; 255 + size_t size; 256 + 257 + void __iomem *rom = pci_platform_rom(pdev, &size); 258 + if (rom && size) { 259 + bios->data = kmalloc(size, GFP_KERNEL); 260 + if (bios->data) { 261 + memcpy_fromio(bios->data, rom, size); 262 + bios->size = size; 263 + } 264 + } 265 + } 266 + 251 267 static int 252 268 nouveau_bios_score(struct nouveau_bios *bios, const bool writeable) 253 269 { ··· 304 288 { "PROM", nouveau_bios_shadow_prom, false, 0, 0, NULL }, 305 289 { "ACPI", nouveau_bios_shadow_acpi, true, 0, 0, NULL }, 306 290 { "PCIROM", nouveau_bios_shadow_pci, true, 0, 0, NULL }, 291 + { "PLATFORM", nouveau_bios_shadow_platform, true, 0, 0, NULL }, 307 292 {} 308 293 }; 309 294 struct methods *mthd, *best;

+26

drivers/gpu/drm/radeon/radeon_bios.c

··· 99 99 return true; 100 100 } 101 101 102 + static bool radeon_read_platform_bios(struct radeon_device *rdev) 103 + { 104 + uint8_t __iomem *bios; 105 + size_t size; 106 + 107 + rdev->bios = NULL; 108 + 109 + bios = pci_platform_rom(rdev->pdev, &size); 110 + if (!bios) { 111 + return false; 112 + } 113 + 114 + if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { 115 + return false; 116 + } 117 + rdev->bios = kmemdup(bios, size, GFP_KERNEL); 118 + if (rdev->bios == NULL) { 119 + return false; 120 + } 121 + 122 + return true; 123 + } 124 + 102 125 #ifdef CONFIG_ACPI 103 126 /* ATRM is used to get the BIOS on the discrete cards in 104 127 * dual-gpu systems. ··· 642 619 r = radeon_read_bios(rdev); 643 620 if (r == false) { 644 621 r = radeon_read_disabled_bios(rdev); 622 + } 623 + if (r == false) { 624 + r = radeon_read_platform_bios(rdev); 645 625 } 646 626 if (r == false || rdev->bios == NULL) { 647 627 DRM_ERROR("Unable to locate a BIOS ROM\n");

+8 -7

drivers/pci/pci-acpi.c

··· 53 53 return; 54 54 } 55 55 56 - if (!pci_dev->pm_cap || !pci_dev->pme_support 57 - || pci_check_pme_status(pci_dev)) { 58 - if (pci_dev->pme_poll) 59 - pci_dev->pme_poll = false; 56 + /* Clear PME Status if set. */ 57 + if (pci_dev->pme_support) 58 + pci_check_pme_status(pci_dev); 60 59 61 - pci_wakeup_event(pci_dev); 62 - pm_runtime_resume(&pci_dev->dev); 63 - } 60 + if (pci_dev->pme_poll) 61 + pci_dev->pme_poll = false; 62 + 63 + pci_wakeup_event(pci_dev); 64 + pm_runtime_resume(&pci_dev->dev); 64 65 65 66 if (pci_dev->subordinate) 66 67 pci_pme_wakeup_bus(pci_dev->subordinate);

+3 -2

drivers/pci/pci-driver.c

··· 390 390 391 391 /* 392 392 * Turn off Bus Master bit on the device to tell it to not 393 - * continue to do DMA 393 + * continue to do DMA. Don't touch devices in D3cold or unknown states. 394 394 */ 395 - pci_clear_master(pci_dev); 395 + if (pci_dev->current_state <= PCI_D3hot) 396 + pci_clear_master(pci_dev); 396 397 } 397 398 398 399 #ifdef CONFIG_PM

-13

drivers/pci/pcie/portdrv_pci.c

··· 185 185 #endif /* !PM */ 186 186 187 187 /* 188 - * PCIe port runtime suspend is broken for some chipsets, so use a 189 - * black list to disable runtime PM for these chipsets. 190 - */ 191 - static const struct pci_device_id port_runtime_pm_black_list[] = { 192 - { /* end: all zeroes */ } 193 - }; 194 - 195 - /* 196 188 * pcie_portdrv_probe - Probe PCI-Express port devices 197 189 * @dev: PCI-Express port device being probed 198 190 * ··· 217 225 * it by default. 218 226 */ 219 227 dev->d3cold_allowed = false; 220 - if (!pci_match_id(port_runtime_pm_black_list, dev)) 221 - pm_runtime_put_noidle(&dev->dev); 222 - 223 228 return 0; 224 229 } 225 230 226 231 static void pcie_portdrv_remove(struct pci_dev *dev) 227 232 { 228 - if (!pci_match_id(port_runtime_pm_black_list, dev)) 229 - pm_runtime_get_noresume(&dev->dev); 230 233 pcie_port_device_remove(dev); 231 234 pci_disable_device(dev); 232 235 }

+31 -36

drivers/pci/rom.c

··· 100 100 return min((size_t)(image - rom), size); 101 101 } 102 102 103 - static loff_t pci_find_rom(struct pci_dev *pdev, size_t *size) 104 - { 105 - struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; 106 - loff_t start; 107 - 108 - /* assign the ROM an address if it doesn't have one */ 109 - if (res->parent == NULL && pci_assign_resource(pdev, PCI_ROM_RESOURCE)) 110 - return 0; 111 - start = pci_resource_start(pdev, PCI_ROM_RESOURCE); 112 - *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 113 - 114 - if (*size == 0) 115 - return 0; 116 - 117 - /* Enable ROM space decodes */ 118 - if (pci_enable_rom(pdev)) 119 - return 0; 120 - 121 - return start; 122 - } 123 - 124 103 /** 125 104 * pci_map_rom - map a PCI ROM to kernel space 126 105 * @pdev: pointer to pci device struct ··· 114 135 void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) 115 136 { 116 137 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; 117 - loff_t start = 0; 138 + loff_t start; 118 139 void __iomem *rom; 119 140 120 141 /* ··· 133 154 return (void __iomem *)(unsigned long) 134 155 pci_resource_start(pdev, PCI_ROM_RESOURCE); 135 156 } else { 136 - start = pci_find_rom(pdev, size); 157 + /* assign the ROM an address if it doesn't have one */ 158 + if (res->parent == NULL && 159 + pci_assign_resource(pdev,PCI_ROM_RESOURCE)) 160 + return NULL; 161 + start = pci_resource_start(pdev, PCI_ROM_RESOURCE); 162 + *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 163 + if (*size == 0) 164 + return NULL; 165 + 166 + /* Enable ROM space decodes */ 167 + if (pci_enable_rom(pdev)) 168 + return NULL; 137 169 } 138 170 } 139 - 140 - /* 141 - * Some devices may provide ROMs via a source other than the BAR 142 - */ 143 - if (!start && pdev->rom && pdev->romlen) { 144 - *size = pdev->romlen; 145 - return phys_to_virt(pdev->rom); 146 - } 147 - 148 - if (!start) 149 - return NULL; 150 171 151 172 rom = ioremap(start, *size); 152 173 if (!rom) { ··· 181 202 if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) 182 203 return; 183 204 184 - if (!pdev->rom || !pdev->romlen) 185 - iounmap(rom); 205 + iounmap(rom); 186 206 187 207 /* Disable again before continuing, leave enabled if pci=rom */ 188 208 if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW))) ··· 205 227 } 206 228 } 207 229 230 + /** 231 + * pci_platform_rom - provides a pointer to any ROM image provided by the 232 + * platform 233 + * @pdev: pointer to pci device struct 234 + * @size: pointer to receive size of pci window over ROM 235 + */ 236 + void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size) 237 + { 238 + if (pdev->rom && pdev->romlen) { 239 + *size = pdev->romlen; 240 + return phys_to_virt((phys_addr_t)pdev->rom); 241 + } 242 + 243 + return NULL; 244 + } 245 + 208 246 EXPORT_SYMBOL(pci_map_rom); 209 247 EXPORT_SYMBOL(pci_unmap_rom); 210 248 EXPORT_SYMBOL_GPL(pci_enable_rom); 211 249 EXPORT_SYMBOL_GPL(pci_disable_rom); 250 + EXPORT_SYMBOL(pci_platform_rom);

+1

include/linux/pci.h

··· 916 916 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); 917 917 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); 918 918 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size); 919 + void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size); 919 920 920 921 /* Power management related routines */ 921 922 int pci_save_state(struct pci_dev *dev);

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