Merge branch 'parisc-for-3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux

+8

Documentation/parisc/registers

··· 78 78 TOC enable bit 1 79 79 80 80 ========================================================================= 81 + 82 + The PA-RISC architecture defines 7 registers as "shadow registers". 83 + Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce 84 + the state save and restore time by eliminating the need for general register 85 + (GR) saves and restores in interruption handlers. 86 + Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25. 87 + 88 + ========================================================================= 81 89 Register usage notes, originally from John Marvin, with some additional 82 90 notes from Randolph Chung. 83 91

+11 -4

arch/parisc/Makefile

··· 17 17 # Mike Shaver, Helge Deller and Martin K. Petersen 18 18 # 19 19 20 + KBUILD_IMAGE := vmlinuz 21 + 20 22 KBUILD_DEFCONFIG := default_defconfig 21 23 22 24 NM = sh $(srctree)/arch/parisc/nm ··· 94 92 else echo $(obj)/palo.conf; \ 95 93 fi) 96 94 97 - palo: vmlinux 95 + palo: vmlinuz 98 96 @if test ! -x "$(PALO)"; then \ 99 97 echo 'ERROR: Please install palo first (apt-get install palo)';\ 100 98 echo 'or build it from source and install it somewhere in your $$PATH';\ ··· 109 107 fi 110 108 $(PALO) -f $(PALOCONF) 111 109 112 - # Shorthands for known targets not supported by parisc, use vmlinux as default 113 - Image zImage bzImage: vmlinux 110 + # Shorthands for known targets not supported by parisc, use vmlinux/vmlinuz as default 111 + Image: vmlinux 112 + zImage bzImage: vmlinuz 114 113 115 - install: vmlinux 114 + vmlinuz: vmlinux 115 + @gzip -cf -9 $< > $@ 116 + 117 + install: vmlinuz 116 118 sh $(src)/arch/parisc/install.sh \ 117 119 $(KERNELRELEASE) $< System.map "$(INSTALL_PATH)" 118 120 ··· 125 119 126 120 define archhelp 127 121 @echo '* vmlinux - Uncompressed kernel image (./vmlinux)' 122 + @echo ' vmlinuz - Compressed kernel image (./vmlinuz)' 128 123 @echo ' palo - Bootable image (./lifimage)' 129 124 @echo ' install - Install kernel using' 130 125 @echo ' (your) ~/bin/$(INSTALLKERNEL) or'

+4 -4

arch/parisc/defpalo.conf

··· 4 4 # Most people using 'make palo' want a bootable file, usable for 5 5 # network or tape booting for example. 6 6 --init-tape=lifimage 7 - --recoverykernel=vmlinux 7 + --recoverykernel=vmlinuz 8 8 9 9 ########## Pick your ROOT here! ########## 10 10 # You need at least one 'root='! ··· 12 12 # If you want a root ramdisk, use the next 2 lines 13 13 # (Edit the ramdisk image name!!!!) 14 14 --ramdisk=ram-disk-image-file 15 - --commandline=0/vmlinux HOME=/ root=/dev/ram initrd=0/ramdisk 15 + --commandline=0/vmlinuz HOME=/ root=/dev/ram initrd=0/ramdisk panic_timeout=60 panic=-1 16 16 17 17 # If you want NFS root, use the following command line (Edit the HOSTNAME!!!) 18 - #--commandline=0/vmlinux HOME=/ root=/dev/nfs nfsroot=HOSTNAME ip=bootp 18 + #--commandline=0/vmlinuz HOME=/ root=/dev/nfs nfsroot=HOSTNAME ip=bootp 19 19 20 20 # If you have root on a disk partition, use this (Edit the partition name!!!) 21 - #--commandline=0/vmlinux HOME=/ root=/dev/sda1 21 + #--commandline=0/vmlinuz HOME=/ root=/dev/sda1

+6 -3

arch/parisc/include/asm/special_insns.h

··· 32 32 cr; \ 33 33 }) 34 34 35 - #define mtsp(gr, cr) \ 36 - __asm__ __volatile__("mtsp %0,%1" \ 35 + #define mtsp(val, cr) \ 36 + { if (__builtin_constant_p(val) && ((val) == 0)) \ 37 + __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \ 38 + else \ 39 + __asm__ __volatile__("mtsp %0,%1" \ 37 40 : /* no outputs */ \ 38 - : "r" (gr), "i" (cr) : "memory") 41 + : "r" (val), "i" (cr) : "memory"); } 39 42 40 43 #endif /* __PARISC_SPECIAL_INSNS_H */

+3 -2

arch/parisc/include/asm/tlbflush.h

··· 63 63 static inline void flush_tlb_page(struct vm_area_struct *vma, 64 64 unsigned long addr) 65 65 { 66 - unsigned long flags; 66 + unsigned long flags, sid; 67 67 68 68 /* For one page, it's not worth testing the split_tlb variable */ 69 69 70 70 mb(); 71 - mtsp(vma->vm_mm->context,1); 71 + sid = vma->vm_mm->context; 72 72 purge_tlb_start(flags); 73 + mtsp(sid, 1); 73 74 pdtlb(addr); 74 75 pitlb(addr); 75 76 purge_tlb_end(flags);

+3 -3

arch/parisc/install.sh

··· 26 26 27 27 # Default install 28 28 29 - if [ -f $4/vmlinux ]; then 30 - mv $4/vmlinux $4/vmlinux.old 29 + if [ -f $4/vmlinuz ]; then 30 + mv $4/vmlinuz $4/vmlinuz.old 31 31 fi 32 32 33 33 if [ -f $4/System.map ]; then 34 34 mv $4/System.map $4/System.old 35 35 fi 36 36 37 - cat $2 > $4/vmlinux 37 + cat $2 > $4/vmlinuz 38 38 cp $3 $4/System.map

+1 -1

arch/parisc/kernel/cache.c

··· 440 440 else { 441 441 unsigned long flags; 442 442 443 - mtsp(sid, 1); 444 443 purge_tlb_start(flags); 444 + mtsp(sid, 1); 445 445 if (split_tlb) { 446 446 while (npages--) { 447 447 pdtlb(start);

+16 -3

arch/parisc/kernel/processor.c

··· 371 371 372 372 seq_printf(m, "capabilities\t:"); 373 373 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32) 374 - seq_printf(m, " os32"); 374 + seq_puts(m, " os32"); 375 375 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64) 376 - seq_printf(m, " os64"); 377 - seq_printf(m, "\n"); 376 + seq_puts(m, " os64"); 377 + if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC) 378 + seq_puts(m, " iopdir_fdc"); 379 + switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) { 380 + case PDC_MODEL_NVA_SUPPORTED: 381 + seq_puts(m, " nva_supported"); 382 + break; 383 + case PDC_MODEL_NVA_SLOW: 384 + seq_puts(m, " nva_slow"); 385 + break; 386 + case PDC_MODEL_NVA_UNSUPPORTED: 387 + seq_puts(m, " needs_equivalent_aliasing"); 388 + break; 389 + } 390 + seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities); 378 391 379 392 seq_printf(m, "model\t\t: %s\n" 380 393 "model name\t: %s\n",

+50 -29

arch/parisc/lib/memcpy.c

··· 2 2 * Optimized memory copy routines. 3 3 * 4 4 * Copyright (C) 2004 Randolph Chung <tausq@debian.org> 5 + * Copyright (C) 2013 Helge Deller <deller@gmx.de> 5 6 * 6 7 * This program is free software; you can redistribute it and/or modify 7 8 * it under the terms of the GNU General Public License as published by ··· 154 153 #define prefetch_dst(addr) do { } while(0) 155 154 #endif 156 155 156 + #define PA_MEMCPY_OK 0 157 + #define PA_MEMCPY_LOAD_ERROR 1 158 + #define PA_MEMCPY_STORE_ERROR 2 159 + 157 160 /* Copy from a not-aligned src to an aligned dst, using shifts. Handles 4 words 158 161 * per loop. This code is derived from glibc. 159 162 */ 160 - static inline unsigned long copy_dstaligned(unsigned long dst, unsigned long src, unsigned long len, unsigned long o_dst, unsigned long o_src, unsigned long o_len) 163 + static inline unsigned long copy_dstaligned(unsigned long dst, 164 + unsigned long src, unsigned long len) 161 165 { 162 166 /* gcc complains that a2 and a3 may be uninitialized, but actually 163 167 * they cannot be. Initialize a2/a3 to shut gcc up. 164 168 */ 165 169 register unsigned int a0, a1, a2 = 0, a3 = 0; 166 170 int sh_1, sh_2; 167 - struct exception_data *d; 168 171 169 172 /* prefetch_src((const void *)src); */ 170 173 ··· 202 197 goto do2; 203 198 case 0: 204 199 if (len == 0) 205 - return 0; 200 + return PA_MEMCPY_OK; 206 201 /* a3 = ((unsigned int *) src)[0]; 207 202 a0 = ((unsigned int *) src)[1]; */ 208 203 ldw(s_space, 0, src, a3, cda_ldw_exc); ··· 261 256 preserve_branch(handle_load_error); 262 257 preserve_branch(handle_store_error); 263 258 264 - return 0; 259 + return PA_MEMCPY_OK; 265 260 266 261 handle_load_error: 267 262 __asm__ __volatile__ ("cda_ldw_exc:\n"); 268 - d = &__get_cpu_var(exception_data); 269 - DPRINTF("cda_ldw_exc: o_len=%lu fault_addr=%lu o_src=%lu ret=%lu\n", 270 - o_len, d->fault_addr, o_src, o_len - d->fault_addr + o_src); 271 - return o_len * 4 - d->fault_addr + o_src; 263 + return PA_MEMCPY_LOAD_ERROR; 272 264 273 265 handle_store_error: 274 266 __asm__ __volatile__ ("cda_stw_exc:\n"); 275 - d = &__get_cpu_var(exception_data); 276 - DPRINTF("cda_stw_exc: o_len=%lu fault_addr=%lu o_dst=%lu ret=%lu\n", 277 - o_len, d->fault_addr, o_dst, o_len - d->fault_addr + o_dst); 278 - return o_len * 4 - d->fault_addr + o_dst; 267 + return PA_MEMCPY_STORE_ERROR; 279 268 } 280 269 281 270 282 - /* Returns 0 for success, otherwise, returns number of bytes not transferred. */ 283 - static unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len) 271 + /* Returns PA_MEMCPY_OK, PA_MEMCPY_LOAD_ERROR or PA_MEMCPY_STORE_ERROR. 272 + * In case of an access fault the faulty address can be read from the per_cpu 273 + * exception data struct. */ 274 + static unsigned long pa_memcpy_internal(void *dstp, const void *srcp, 275 + unsigned long len) 284 276 { 285 277 register unsigned long src, dst, t1, t2, t3; 286 278 register unsigned char *pcs, *pcd; 287 279 register unsigned int *pws, *pwd; 288 280 register double *pds, *pdd; 289 - unsigned long ret = 0; 290 - unsigned long o_dst, o_src, o_len; 291 - struct exception_data *d; 281 + unsigned long ret; 292 282 293 283 src = (unsigned long)srcp; 294 284 dst = (unsigned long)dstp; 295 285 pcs = (unsigned char *)srcp; 296 286 pcd = (unsigned char *)dstp; 297 - 298 - o_dst = dst; o_src = src; o_len = len; 299 287 300 288 /* prefetch_src((const void *)srcp); */ 301 289 ··· 399 401 len--; 400 402 } 401 403 402 - return 0; 404 + return PA_MEMCPY_OK; 403 405 404 406 unaligned_copy: 405 407 /* possibly we are aligned on a word, but not on a double... */ ··· 436 438 src = (unsigned long)pcs; 437 439 } 438 440 439 - ret = copy_dstaligned(dst, src, len / sizeof(unsigned int), 440 - o_dst, o_src, o_len); 441 + ret = copy_dstaligned(dst, src, len / sizeof(unsigned int)); 441 442 if (ret) 442 443 return ret; 443 444 ··· 451 454 452 455 handle_load_error: 453 456 __asm__ __volatile__ ("pmc_load_exc:\n"); 454 - d = &__get_cpu_var(exception_data); 455 - DPRINTF("pmc_load_exc: o_len=%lu fault_addr=%lu o_src=%lu ret=%lu\n", 456 - o_len, d->fault_addr, o_src, o_len - d->fault_addr + o_src); 457 - return o_len - d->fault_addr + o_src; 457 + return PA_MEMCPY_LOAD_ERROR; 458 458 459 459 handle_store_error: 460 460 __asm__ __volatile__ ("pmc_store_exc:\n"); 461 + return PA_MEMCPY_STORE_ERROR; 462 + } 463 + 464 + 465 + /* Returns 0 for success, otherwise, returns number of bytes not transferred. */ 466 + static unsigned long pa_memcpy(void *dstp, const void *srcp, unsigned long len) 467 + { 468 + unsigned long ret, fault_addr, reference; 469 + struct exception_data *d; 470 + 471 + ret = pa_memcpy_internal(dstp, srcp, len); 472 + if (likely(ret == PA_MEMCPY_OK)) 473 + return 0; 474 + 475 + /* if a load or store fault occured we can get the faulty addr */ 461 476 d = &__get_cpu_var(exception_data); 462 - DPRINTF("pmc_store_exc: o_len=%lu fault_addr=%lu o_dst=%lu ret=%lu\n", 463 - o_len, d->fault_addr, o_dst, o_len - d->fault_addr + o_dst); 464 - return o_len - d->fault_addr + o_dst; 477 + fault_addr = d->fault_addr; 478 + 479 + /* error in load or store? */ 480 + if (ret == PA_MEMCPY_LOAD_ERROR) 481 + reference = (unsigned long) srcp; 482 + else 483 + reference = (unsigned long) dstp; 484 + 485 + DPRINTF("pa_memcpy: fault type = %lu, len=%lu fault_addr=%lu ref=%lu\n", 486 + ret, len, fault_addr, reference); 487 + 488 + if (fault_addr >= reference) 489 + return len - (fault_addr - reference); 490 + else 491 + return len; 465 492 } 466 493 467 494 #ifdef __KERNEL__

+56

drivers/parisc/lba_pci.c

··· 613 613 return 0; /* truncation successful */ 614 614 } 615 615 616 + /* 617 + * extend_lmmio_len: extend lmmio range to maximum length 618 + * 619 + * This is needed at least on C8000 systems to get the ATI FireGL card 620 + * working. On other systems we will currently not extend the lmmio space. 621 + */ 622 + static unsigned long 623 + extend_lmmio_len(unsigned long start, unsigned long end, unsigned long lba_len) 624 + { 625 + struct resource *tmp; 626 + 627 + pr_debug("LMMIO mismatch: PAT length = 0x%lx, MASK register = 0x%lx\n", 628 + end - start, lba_len); 629 + 630 + lba_len = min(lba_len+1, 256UL*1024*1024); /* limit to 256 MB */ 631 + 632 + pr_debug("LBA: lmmio_space [0x%lx-0x%lx] - original\n", start, end); 633 + 634 + if (boot_cpu_data.cpu_type < mako) { 635 + pr_info("LBA: Not a C8000 system - not extending LMMIO range.\n"); 636 + return end; 637 + } 638 + 639 + end += lba_len; 640 + if (end < start) /* fix overflow */ 641 + end = -1ULL; 642 + 643 + pr_debug("LBA: lmmio_space [0x%lx-0x%lx] - current\n", start, end); 644 + 645 + /* first overlap */ 646 + for (tmp = iomem_resource.child; tmp; tmp = tmp->sibling) { 647 + pr_debug("LBA: testing %pR\n", tmp); 648 + if (tmp->start == start) 649 + continue; /* ignore ourself */ 650 + if (tmp->end < start) 651 + continue; 652 + if (tmp->start > end) 653 + continue; 654 + if (end >= tmp->start) 655 + end = tmp->start - 1; 656 + } 657 + 658 + pr_info("LBA: lmmio_space [0x%lx-0x%lx] - new\n", start, end); 659 + 660 + /* return new end */ 661 + return end; 662 + } 663 + 616 664 #else 617 665 #define truncate_pat_collision(r,n) (0) 618 666 #endif ··· 1042 994 case PAT_LMMIO: 1043 995 /* used to fix up pre-initialized MEM BARs */ 1044 996 if (!lba_dev->hba.lmmio_space.flags) { 997 + unsigned long lba_len; 998 + 999 + lba_len = ~READ_REG32(lba_dev->hba.base_addr 1000 + + LBA_LMMIO_MASK); 1001 + if ((p->end - p->start) != lba_len) 1002 + p->end = extend_lmmio_len(p->start, 1003 + p->end, lba_len); 1004 + 1045 1005 sprintf(lba_dev->hba.lmmio_name, 1046 1006 "PCI%02x LMMIO", 1047 1007 (int)lba_dev->hba.bus_num.start);

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