tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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KVM: x86: Introduce EM_ASM_2

Replace the FASTOP2 instructions.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Sean Christopherson <seanjc@google.com>
Link: https://lkml.kernel.org/r/20250714103439.903697475@infradead.org

Peter Zijlstra b26deb0c 6204aea3

+47 -38
+47 -38
arch/x86/kvm/emulate.c
··· 317 317 ON64(case 8: __EM_ASM_1(op##q, rax); break;) \ 318 318 EM_ASM_END 319 319 320 + /* 2-operand, using "a" (dst), "d" (src) */ 321 + #define EM_ASM_2(op) \ 322 + EM_ASM_START(op) \ 323 + case 1: __EM_ASM_2(op##b, al, dl); break; \ 324 + case 2: __EM_ASM_2(op##w, ax, dx); break; \ 325 + case 4: __EM_ASM_2(op##l, eax, edx); break; \ 326 + ON64(case 8: __EM_ASM_2(op##q, rax, rdx); break;) \ 327 + EM_ASM_END 328 + 320 329 /* 321 330 * fastop functions have a special calling convention: 322 331 * ··· 1036 1027 return rc; 1037 1028 } 1038 1029 1039 - FASTOP2(add); 1040 - FASTOP2(or); 1041 - FASTOP2(adc); 1042 - FASTOP2(sbb); 1043 - FASTOP2(and); 1044 - FASTOP2(sub); 1045 - FASTOP2(xor); 1046 - FASTOP2(cmp); 1047 - FASTOP2(test); 1030 + EM_ASM_2(add); 1031 + EM_ASM_2(or); 1032 + EM_ASM_2(adc); 1033 + EM_ASM_2(sbb); 1034 + EM_ASM_2(and); 1035 + EM_ASM_2(sub); 1036 + EM_ASM_2(xor); 1037 + EM_ASM_2(cmp); 1038 + EM_ASM_2(test); 1039 + EM_ASM_2(xadd); 1048 1040 1049 1041 FASTOP1SRC2(mul, mul_ex); 1050 1042 FASTOP1SRC2(imul, imul_ex); ··· 1077 1067 FASTOP2W(btr); 1078 1068 FASTOP2W(btc); 1079 1069 1080 - FASTOP2(xadd); 1081 1070 1082 1071 FASTOP2R(cmp, cmp_r); 1083 1072 ··· 2313 2304 ctxt->dst.val = reg_read(ctxt, VCPU_REGS_RAX); 2314 2305 ctxt->src.orig_val = ctxt->src.val; 2315 2306 ctxt->src.val = ctxt->dst.orig_val; 2316 - fastop(ctxt, em_cmp); 2307 + em_cmp(ctxt); 2317 2308 2318 2309 if (ctxt->eflags & X86_EFLAGS_ZF) { 2319 2310 /* Success: write back to memory; no update of EAX */ ··· 3078 3069 ctxt->src.type = OP_IMM; 3079 3070 ctxt->src.val = 0; 3080 3071 ctxt->src.bytes = 1; 3081 - fastop(ctxt, em_or); 3072 + em_or(ctxt); 3082 3073 ctxt->eflags &= ~(X86_EFLAGS_AF | X86_EFLAGS_CF); 3083 3074 if (cf) 3084 3075 ctxt->eflags |= X86_EFLAGS_CF; ··· 3104 3095 ctxt->src.type = OP_IMM; 3105 3096 ctxt->src.val = 0; 3106 3097 ctxt->src.bytes = 1; 3107 - fastop(ctxt, em_or); 3098 + em_or(ctxt); 3108 3099 3109 3100 return X86EMUL_CONTINUE; 3110 3101 } ··· 3122 3113 ctxt->src.type = OP_IMM; 3123 3114 ctxt->src.val = 0; 3124 3115 ctxt->src.bytes = 1; 3125 - fastop(ctxt, em_or); 3116 + em_or(ctxt); 3126 3117 3127 3118 return X86EMUL_CONTINUE; 3128 3119 } ··· 4007 3998 #define I2bvIP(_f, _e, _i, _p) \ 4008 3999 IIP((_f) | ByteOp, _e, _i, _p), IIP(_f, _e, _i, _p) 4009 4000 4010 - #define F6ALU(_f, _e) F2bv((_f) | DstMem | SrcReg | ModRM, _e), \ 4011 - F2bv(((_f) | DstReg | SrcMem | ModRM) & ~Lock, _e), \ 4012 - F2bv(((_f) & ~Lock) | DstAcc | SrcImm, _e) 4001 + #define I6ALU(_f, _e) I2bv((_f) | DstMem | SrcReg | ModRM, _e), \ 4002 + I2bv(((_f) | DstReg | SrcMem | ModRM) & ~Lock, _e), \ 4003 + I2bv(((_f) & ~Lock) | DstAcc | SrcImm, _e) 4013 4004 4014 4005 static const struct opcode group7_rm0[] = { 4015 4006 N, ··· 4047 4038 }; 4048 4039 4049 4040 static const struct opcode group1[] = { 4050 - F(Lock, em_add), 4051 - F(Lock | PageTable, em_or), 4052 - F(Lock, em_adc), 4053 - F(Lock, em_sbb), 4054 - F(Lock | PageTable, em_and), 4055 - F(Lock, em_sub), 4056 - F(Lock, em_xor), 4057 - F(NoWrite, em_cmp), 4041 + I(Lock, em_add), 4042 + I(Lock | PageTable, em_or), 4043 + I(Lock, em_adc), 4044 + I(Lock, em_sbb), 4045 + I(Lock | PageTable, em_and), 4046 + I(Lock, em_sub), 4047 + I(Lock, em_xor), 4048 + I(NoWrite, em_cmp), 4058 4049 }; 4059 4050 4060 4051 static const struct opcode group1A[] = { ··· 4073 4064 }; 4074 4065 4075 4066 static const struct opcode group3[] = { 4076 - F(DstMem | SrcImm | NoWrite, em_test), 4077 - F(DstMem | SrcImm | NoWrite, em_test), 4067 + I(DstMem | SrcImm | NoWrite, em_test), 4068 + I(DstMem | SrcImm | NoWrite, em_test), 4078 4069 I(DstMem | SrcNone | Lock, em_not), 4079 4070 I(DstMem | SrcNone | Lock, em_neg), 4080 4071 F(DstXacc | Src2Mem, em_mul_ex), ··· 4267 4258 4268 4259 static const struct opcode opcode_table[256] = { 4269 4260 /* 0x00 - 0x07 */ 4270 - F6ALU(Lock, em_add), 4261 + I6ALU(Lock, em_add), 4271 4262 I(ImplicitOps | Stack | No64 | Src2ES, em_push_sreg), 4272 4263 I(ImplicitOps | Stack | No64 | Src2ES, em_pop_sreg), 4273 4264 /* 0x08 - 0x0F */ 4274 - F6ALU(Lock | PageTable, em_or), 4265 + I6ALU(Lock | PageTable, em_or), 4275 4266 I(ImplicitOps | Stack | No64 | Src2CS, em_push_sreg), 4276 4267 N, 4277 4268 /* 0x10 - 0x17 */ 4278 - F6ALU(Lock, em_adc), 4269 + I6ALU(Lock, em_adc), 4279 4270 I(ImplicitOps | Stack | No64 | Src2SS, em_push_sreg), 4280 4271 I(ImplicitOps | Stack | No64 | Src2SS, em_pop_sreg), 4281 4272 /* 0x18 - 0x1F */ 4282 - F6ALU(Lock, em_sbb), 4273 + I6ALU(Lock, em_sbb), 4283 4274 I(ImplicitOps | Stack | No64 | Src2DS, em_push_sreg), 4284 4275 I(ImplicitOps | Stack | No64 | Src2DS, em_pop_sreg), 4285 4276 /* 0x20 - 0x27 */ 4286 - F6ALU(Lock | PageTable, em_and), N, N, 4277 + I6ALU(Lock | PageTable, em_and), N, N, 4287 4278 /* 0x28 - 0x2F */ 4288 - F6ALU(Lock, em_sub), N, I(ByteOp | DstAcc | No64, em_das), 4279 + I6ALU(Lock, em_sub), N, I(ByteOp | DstAcc | No64, em_das), 4289 4280 /* 0x30 - 0x37 */ 4290 - F6ALU(Lock, em_xor), N, N, 4281 + I6ALU(Lock, em_xor), N, N, 4291 4282 /* 0x38 - 0x3F */ 4292 - F6ALU(NoWrite, em_cmp), N, N, 4283 + I6ALU(NoWrite, em_cmp), N, N, 4293 4284 /* 0x40 - 0x4F */ 4294 4285 X8(I(DstReg, em_inc)), X8(I(DstReg, em_dec)), 4295 4286 /* 0x50 - 0x57 */ ··· 4315 4306 G(DstMem | SrcImm, group1), 4316 4307 G(ByteOp | DstMem | SrcImm | No64, group1), 4317 4308 G(DstMem | SrcImmByte, group1), 4318 - F2bv(DstMem | SrcReg | ModRM | NoWrite, em_test), 4309 + I2bv(DstMem | SrcReg | ModRM | NoWrite, em_test), 4319 4310 I2bv(DstMem | SrcReg | ModRM | Lock | PageTable, em_xchg), 4320 4311 /* 0x88 - 0x8F */ 4321 4312 I2bv(DstMem | SrcReg | ModRM | Mov | PageTable, em_mov), ··· 4338 4329 I2bv(SrcSI | DstDI | Mov | String | TwoMemOp, em_mov), 4339 4330 F2bv(SrcSI | DstDI | String | NoWrite | TwoMemOp, em_cmp_r), 4340 4331 /* 0xA8 - 0xAF */ 4341 - F2bv(DstAcc | SrcImm | NoWrite, em_test), 4332 + I2bv(DstAcc | SrcImm | NoWrite, em_test), 4342 4333 I2bv(SrcAcc | DstDI | Mov | String, em_mov), 4343 4334 I2bv(SrcSI | DstAcc | Mov | String, em_mov), 4344 4335 F2bv(SrcAcc | DstDI | String | NoWrite, em_cmp_r), ··· 4476 4467 I(DstReg | SrcMem | ModRM, em_bsr_c), 4477 4468 D(DstReg | SrcMem8 | ModRM | Mov), D(DstReg | SrcMem16 | ModRM | Mov), 4478 4469 /* 0xC0 - 0xC7 */ 4479 - F2bv(DstMem | SrcReg | ModRM | SrcWrite | Lock, em_xadd), 4470 + I2bv(DstMem | SrcReg | ModRM | SrcWrite | Lock, em_xadd), 4480 4471 N, ID(0, &instr_dual_0f_c3), 4481 4472 N, N, N, GD(0, &group9), 4482 4473 /* 0xC8 - 0xCF */