Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'iommu-fixes-v5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu fixes from Joerg Roedel:
- Fix kmemleak warning in IOVA code
- Fix compile warnings on ARM32/64 in dma-iommu code due to dma_mask
type mismatches
- Make ISA reserved regions relaxable, so that VFIO can assign devices
which have such regions defined
- Fix mapping errors resulting in IO page-faults in the VT-d driver
- Make sure direct mappings for a domain are created after the default
domain is updated
- Map ISA reserved regions in the VT-d driver with correct permissions
- Remove unneeded check for PSI capability in the IOTLB flush code of
the VT-d driver
- Lockdep fix iommu_dma_prepare_msi()
* tag 'iommu-fixes-v5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
iommu/dma: Relax locking in iommu_dma_prepare_msi()
iommu/vt-d: Remove incorrect PSI capability check
iommu/vt-d: Allocate reserved region for ISA with correct permission
iommu: set group default domain before creating direct mappings
iommu/vt-d: Fix dmar pte read access not set error
iommu/vt-d: Set ISA bridge reserved region as relaxable
iommu/dma: Rationalise types for DMA masks
iommu/iova: Init the struct iova to fix the possible memleak
+17
-30
+11
-12
drivers/iommu/dma-iommu.c
+11
-12
drivers/iommu/dma-iommu.c
···
19
19
#include <linux/iova.h>
20
20
#include <linux/irq.h>
21
21
#include <linux/mm.h>
22
+
#include <linux/mutex.h>
22
23
#include <linux/pci.h>
23
24
#include <linux/scatterlist.h>
24
25
#include <linux/vmalloc.h>
···
45
44
dma_addr_t msi_iova;
46
45
};
47
46
struct list_head msi_page_list;
48
-
spinlock_t msi_lock;
49
47
50
48
/* Domain for flush queue callback; NULL if flush queue not in use */
51
49
struct iommu_domain *fq_domain;
···
63
63
64
64
cookie = kzalloc(sizeof(*cookie), GFP_KERNEL);
65
65
if (cookie) {
66
-
spin_lock_init(&cookie->msi_lock);
67
66
INIT_LIST_HEAD(&cookie->msi_page_list);
68
67
cookie->type = type;
69
68
}
···
398
399
}
399
400
400
401
static dma_addr_t iommu_dma_alloc_iova(struct iommu_domain *domain,
401
-
size_t size, dma_addr_t dma_limit, struct device *dev)
402
+
size_t size, u64 dma_limit, struct device *dev)
402
403
{
403
404
struct iommu_dma_cookie *cookie = domain->iova_cookie;
404
405
struct iova_domain *iovad = &cookie->iovad;
···
423
424
dma_limit = min_not_zero(dma_limit, dev->bus_dma_limit);
424
425
425
426
if (domain->geometry.force_aperture)
426
-
dma_limit = min(dma_limit, domain->geometry.aperture_end);
427
+
dma_limit = min(dma_limit, (u64)domain->geometry.aperture_end);
427
428
428
429
/* Try to get PCI devices a SAC address */
429
430
if (dma_limit > DMA_BIT_MASK(32) && dev_is_pci(dev))
···
476
477
}
477
478
478
479
static dma_addr_t __iommu_dma_map(struct device *dev, phys_addr_t phys,
479
-
size_t size, int prot, dma_addr_t dma_mask)
480
+
size_t size, int prot, u64 dma_mask)
480
481
{
481
482
struct iommu_domain *domain = iommu_get_dma_domain(dev);
482
483
struct iommu_dma_cookie *cookie = domain->iova_cookie;
···
1175
1176
if (msi_page->phys == msi_addr)
1176
1177
return msi_page;
1177
1178
1178
-
msi_page = kzalloc(sizeof(*msi_page), GFP_ATOMIC);
1179
+
msi_page = kzalloc(sizeof(*msi_page), GFP_KERNEL);
1179
1180
if (!msi_page)
1180
1181
return NULL;
1181
1182
···
1205
1206
struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
1206
1207
struct iommu_dma_cookie *cookie;
1207
1208
struct iommu_dma_msi_page *msi_page;
1208
-
unsigned long flags;
1209
+
static DEFINE_MUTEX(msi_prepare_lock); /* see below */
1209
1210
1210
1211
if (!domain || !domain->iova_cookie) {
1211
1212
desc->iommu_cookie = NULL;
···
1215
1216
cookie = domain->iova_cookie;
1216
1217
1217
1218
/*
1218
-
* We disable IRQs to rule out a possible inversion against
1219
-
* irq_desc_lock if, say, someone tries to retarget the affinity
1220
-
* of an MSI from within an IPI handler.
1219
+
* In fact the whole prepare operation should already be serialised by
1220
+
* irq_domain_mutex further up the callchain, but that's pretty subtle
1221
+
* on its own, so consider this locking as failsafe documentation...
1221
1222
*/
1222
-
spin_lock_irqsave(&cookie->msi_lock, flags);
1223
+
mutex_lock(&msi_prepare_lock);
1223
1224
msi_page = iommu_dma_get_msi_page(dev, msi_addr, domain);
1224
-
spin_unlock_irqrestore(&cookie->msi_lock, flags);
1225
+
mutex_unlock(&msi_prepare_lock);
1225
1226
1226
1227
msi_desc_set_iommu_cookie(desc, msi_page);
1227
1228
+2
-10
drivers/iommu/intel-iommu.c
+2
-10
drivers/iommu/intel-iommu.c
···
5478
5478
int prot = 0;
5479
5479
int ret;
5480
5480
5481
-
if (dmar_domain->flags & DOMAIN_FLAG_LOSE_CHILDREN)
5482
-
return -EINVAL;
5483
-
5484
5481
if (iommu_prot & IOMMU_READ)
5485
5482
prot |= DMA_PTE_READ;
5486
5483
if (iommu_prot & IOMMU_WRITE)
···
5520
5523
/* Cope with horrid API which requires us to unmap more than the
5521
5524
size argument if it happens to be a large-page mapping. */
5522
5525
BUG_ON(!pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, &level));
5523
-
if (dmar_domain->flags & DOMAIN_FLAG_LOSE_CHILDREN)
5524
-
return 0;
5525
5526
5526
5527
if (size < VTD_PAGE_SIZE << level_to_offset_bits(level))
5527
5528
size = VTD_PAGE_SIZE << level_to_offset_bits(level);
···
5550
5555
struct dma_pte *pte;
5551
5556
int level = 0;
5552
5557
u64 phys = 0;
5553
-
5554
-
if (dmar_domain->flags & DOMAIN_FLAG_LOSE_CHILDREN)
5555
-
return 0;
5556
5558
5557
5559
pte = pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, &level);
5558
5560
if (pte)
···
5728
5736
struct pci_dev *pdev = to_pci_dev(device);
5729
5737
5730
5738
if ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) {
5731
-
reg = iommu_alloc_resv_region(0, 1UL << 24, 0,
5732
-
IOMMU_RESV_DIRECT);
5739
+
reg = iommu_alloc_resv_region(0, 1UL << 24, prot,
5740
+
IOMMU_RESV_DIRECT_RELAXABLE);
5733
5741
if (reg)
5734
5742
list_add_tail(®->list, head);
5735
5743
}
+1
-5
drivers/iommu/intel-svm.c
+1
-5
drivers/iommu/intel-svm.c
···
104
104
{
105
105
struct qi_desc desc;
106
106
107
-
/*
108
-
* Do PASID granu IOTLB invalidation if page selective capability is
109
-
* not available.
110
-
*/
111
-
if (pages == -1 || !cap_pgsel_inv(svm->iommu->cap)) {
107
+
if (pages == -1) {
112
108
desc.qw0 = QI_EIOTLB_PASID(svm->pasid) |
113
109
QI_EIOTLB_DID(sdev->did) |
114
110
QI_EIOTLB_GRAN(QI_GRAN_NONG_PASID) |
+2
-2
drivers/iommu/iommu.c
+2
-2
drivers/iommu/iommu.c
···
2282
2282
goto out;
2283
2283
}
2284
2284
2285
-
iommu_group_create_direct_mappings(group, dev);
2286
-
2287
2285
/* Make the domain the default for this group */
2288
2286
if (group->default_domain)
2289
2287
iommu_domain_free(group->default_domain);
2290
2288
group->default_domain = domain;
2289
+
2290
+
iommu_group_create_direct_mappings(group, dev);
2291
2291
2292
2292
dev_info(dev, "Using iommu %s mapping\n",
2293
2293
type == IOMMU_DOMAIN_DMA ? "dma" : "direct");