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Merge branch 'fix-broken-link-with-th1520-gmac-when-linkspeed-changes'

Yao Zi says:

====================
Fix broken link with TH1520 GMAC when linkspeed changes

It's noted that on TH1520 SoC, the GMAC's link becomes broken after
the link speed is changed (for example, running ethtool -s eth0 speed
100 on the peer when negotiated to 1Gbps), but the GMAC could function
normally if the speed is brought back to the initial.

Just like many other SoCs utilizing STMMAC IP, we need to adjust the TX
clock supplying TH1520's GMAC through some SoC-specific glue registers
when linkspeed changes. But it's found that after the full kernel
startup, reading from them results in garbage and writing to them makes
no effect, which is the cause of broken link.

Further testing shows perisys-apb4-hclk must be ungated for normal
access to Th1520 GMAC APB glue registers, which is neither described in
dt-binding nor acquired by the driver.

This series expands the dt-binding of TH1520's GMAC to allow an extra
"APB glue registers interface clock", instructs the driver to acquire
and enable the clock, and finally supplies CLK_PERISYS_APB4_HCLK for
TH1520's GMACs in SoC devicetree.

v2: https://lore.kernel.org/netdev/20250801091240.46114-1-ziyao@disroot.org/
v1: https://lore.kernel.org/all/20250729093734.40132-1-ziyao@disroot.org/
====================

Link: https://patch.msgid.link/20250808093655.48074-2-ziyao@disroot.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

Paolo Abeni b3e8c3df 8ea25274

+24 -6
+4 -2
Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml
··· 62 62 items: 63 63 - description: GMAC main clock 64 64 - description: Peripheral registers interface clock 65 + - description: APB glue registers interface clock 65 66 66 67 clock-names: 67 68 items: 68 69 - const: stmmaceth 69 70 - const: pclk 71 + - const: apb 70 72 71 73 interrupts: 72 74 items: ··· 90 88 compatible = "thead,th1520-gmac", "snps,dwmac-3.70a"; 91 89 reg = <0xe7070000 0x2000>, <0xec003000 0x1000>; 92 90 reg-names = "dwmac", "apb"; 93 - clocks = <&clk 1>, <&clk 2>; 94 - clock-names = "stmmaceth", "pclk"; 91 + clocks = <&clk 1>, <&clk 2>, <&clk 3>; 92 + clock-names = "stmmaceth", "pclk", "apb"; 95 93 interrupts = <66>; 96 94 interrupt-names = "macirq"; 97 95 phy-mode = "rgmii-id";
+6 -4
arch/riscv/boot/dts/thead/th1520.dtsi
··· 297 297 reg-names = "dwmac", "apb"; 298 298 interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; 299 299 interrupt-names = "macirq"; 300 - clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC1>; 301 - clock-names = "stmmaceth", "pclk"; 300 + clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC1>, 301 + <&clk CLK_PERISYS_APB4_HCLK>; 302 + clock-names = "stmmaceth", "pclk", "apb"; 302 303 snps,pbl = <32>; 303 304 snps,fixed-burst; 304 305 snps,multicast-filter-bins = <64>; ··· 320 319 reg-names = "dwmac", "apb"; 321 320 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; 322 321 interrupt-names = "macirq"; 323 - clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC0>; 324 - clock-names = "stmmaceth", "pclk"; 322 + clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC0>, 323 + <&clk CLK_PERISYS_APB4_HCLK>; 324 + clock-names = "stmmaceth", "pclk", "apb"; 325 325 snps,pbl = <32>; 326 326 snps,fixed-burst; 327 327 snps,multicast-filter-bins = <64>;
+14
drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c
··· 211 211 struct stmmac_resources stmmac_res; 212 212 struct plat_stmmacenet_data *plat; 213 213 struct thead_dwmac *dwmac; 214 + struct clk *apb_clk; 214 215 void __iomem *apb; 215 216 int ret; 216 217 ··· 224 223 if (IS_ERR(plat)) 225 224 return dev_err_probe(&pdev->dev, PTR_ERR(plat), 226 225 "dt configuration failed\n"); 226 + 227 + /* 228 + * The APB clock is essential for accessing glue registers. However, 229 + * old devicetrees don't describe it correctly. We continue to probe 230 + * and emit a warning if it isn't present. 231 + */ 232 + apb_clk = devm_clk_get_enabled(&pdev->dev, "apb"); 233 + if (PTR_ERR(apb_clk) == -ENOENT) 234 + dev_warn(&pdev->dev, 235 + "cannot get apb clock, link may break after speed changes\n"); 236 + else if (IS_ERR(apb_clk)) 237 + return dev_err_probe(&pdev->dev, PTR_ERR(apb_clk), 238 + "failed to get apb clock\n"); 227 239 228 240 dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL); 229 241 if (!dwmac)