Merge tag 'drm-fixes-2025-03-21' of https://gitlab.freedesktop.org/drm/kernel

+7 -2

drivers/accel/qaic/qaic_data.c

··· 172 172 static int clone_range_of_sgt_for_slice(struct qaic_device *qdev, struct sg_table **sgt_out, 173 173 struct sg_table *sgt_in, u64 size, u64 offset) 174 174 { 175 - int total_len, len, nents, offf = 0, offl = 0; 176 175 struct scatterlist *sg, *sgn, *sgf, *sgl; 176 + unsigned int len, nents, offf, offl; 177 177 struct sg_table *sgt; 178 + size_t total_len; 178 179 int ret, j; 179 180 180 181 /* find out number of relevant nents needed for this mem */ ··· 183 182 sgf = NULL; 184 183 sgl = NULL; 185 184 nents = 0; 185 + offf = 0; 186 + offl = 0; 186 187 187 188 size = size ? size : PAGE_SIZE; 188 189 for_each_sgtable_dma_sg(sgt_in, sg, j) { ··· 557 554 static int qaic_validate_req(struct qaic_device *qdev, struct qaic_attach_slice_entry *slice_ent, 558 555 u32 count, u64 total_size) 559 556 { 557 + u64 total; 560 558 int i; 561 559 562 560 for (i = 0; i < count; i++) { ··· 567 563 invalid_sem(&slice_ent[i].sem2) || invalid_sem(&slice_ent[i].sem3)) 568 564 return -EINVAL; 569 565 570 - if (slice_ent[i].offset + slice_ent[i].size > total_size) 566 + if (check_add_overflow(slice_ent[i].offset, slice_ent[i].size, &total) || 567 + total > total_size) 571 568 return -EINVAL; 572 569 } 573 570

+1 -1

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

··· 2437 2437 (void **)&adev->gfx.me.me_fw_data_ptr); 2438 2438 if (r) { 2439 2439 dev_err(adev->dev, "(%d) failed to create me data bo\n", r); 2440 - gfx_v12_0_pfp_fini(adev); 2440 + gfx_v12_0_me_fini(adev); 2441 2441 return r; 2442 2442 } 2443 2443

+2 -20

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c

··· 501 501 uint64_t *flags) 502 502 { 503 503 struct amdgpu_bo *bo = mapping->bo_va->base.bo; 504 - struct amdgpu_device *bo_adev; 505 - bool coherent, is_system; 506 - 507 504 508 505 *flags &= ~AMDGPU_PTE_EXECUTABLE; 509 506 *flags |= mapping->flags & AMDGPU_PTE_EXECUTABLE; ··· 516 519 *flags &= ~AMDGPU_PTE_VALID; 517 520 } 518 521 519 - if (!bo) 520 - return; 521 - 522 - if (bo->flags & (AMDGPU_GEM_CREATE_COHERENT | 523 - AMDGPU_GEM_CREATE_UNCACHED)) 524 - *flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_UC); 525 - 526 - bo_adev = amdgpu_ttm_adev(bo->tbo.bdev); 527 - coherent = bo->flags & AMDGPU_GEM_CREATE_COHERENT; 528 - is_system = bo->tbo.resource && 529 - (bo->tbo.resource->mem_type == TTM_PL_TT || 530 - bo->tbo.resource->mem_type == AMDGPU_PL_PREEMPT); 531 - 532 522 if (bo && bo->flags & AMDGPU_GEM_CREATE_GFX12_DCC) 533 523 *flags |= AMDGPU_PTE_DCC; 534 524 535 - /* WA for HW bug */ 536 - if (is_system || ((bo_adev != adev) && coherent)) 537 - *flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_NC); 538 - 525 + if (bo && bo->flags & AMDGPU_GEM_CREATE_UNCACHED) 526 + *flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_UC); 539 527 } 540 528 541 529 static unsigned gmc_v12_0_get_vbios_fb_size(struct amdgpu_device *adev)

+10 -10

drivers/gpu/drm/amd/amdgpu/nv.c

··· 78 78 79 79 /* Navi1x */ 80 80 static const struct amdgpu_video_codec_info nv_video_codecs_decode_array[] = { 81 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)}, 82 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)}, 81 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 1920, 1088, 3)}, 82 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 1920, 1088, 5)}, 83 83 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)}, 84 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)}, 84 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 1920, 1088, 4)}, 85 85 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)}, 86 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)}, 86 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 8192, 8192, 0)}, 87 87 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)}, 88 88 }; 89 89 ··· 104 104 }; 105 105 106 106 static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn0[] = { 107 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)}, 108 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)}, 107 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 1920, 1088, 3)}, 108 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 1920, 1088, 5)}, 109 109 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)}, 110 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)}, 110 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 1920, 1088, 4)}, 111 111 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)}, 112 112 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)}, 113 113 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)}, ··· 115 115 }; 116 116 117 117 static const struct amdgpu_video_codec_info sc_video_codecs_decode_array_vcn1[] = { 118 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)}, 119 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)}, 118 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 1920, 1088, 3)}, 119 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 1920, 1088, 5)}, 120 120 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)}, 121 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)}, 121 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 1920, 1088, 4)}, 122 122 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)}, 123 123 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)}, 124 124 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},

+10 -11

drivers/gpu/drm/amd/amdgpu/soc15.c

··· 103 103 /* Vega */ 104 104 static const struct amdgpu_video_codec_info vega_video_codecs_decode_array[] = 105 105 { 106 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)}, 107 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)}, 106 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 1920, 1088, 3)}, 107 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 1920, 1088, 5)}, 108 108 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)}, 109 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)}, 109 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 1920, 1088, 4)}, 110 110 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 4096, 186)}, 111 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)}, 112 111 }; 113 112 114 113 static const struct amdgpu_video_codecs vega_video_codecs_decode = ··· 119 120 /* Raven */ 120 121 static const struct amdgpu_video_codec_info rv_video_codecs_decode_array[] = 121 122 { 122 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)}, 123 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)}, 123 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 1920, 1088, 3)}, 124 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 1920, 1088, 5)}, 124 125 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)}, 125 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)}, 126 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 1920, 1088, 4)}, 126 127 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 4096, 186)}, 127 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)}, 128 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 8192, 8192, 0)}, 128 129 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 4096, 4096, 0)}, 129 130 }; 130 131 ··· 137 138 /* Renoir, Arcturus */ 138 139 static const struct amdgpu_video_codec_info rn_video_codecs_decode_array[] = 139 140 { 140 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 4096, 4096, 3)}, 141 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 4096, 4096, 5)}, 141 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 1920, 1088, 3)}, 142 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 1920, 1088, 5)}, 142 143 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)}, 143 - {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 4096, 4096, 4)}, 144 + {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 1920, 1088, 4)}, 144 145 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)}, 145 146 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 16384, 16384, 0)}, 146 147 {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},

+18 -25

drivers/gpu/drm/amd/amdgpu/vi.c

··· 167 167 { 168 168 { 169 169 .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 170 - .max_width = 4096, 171 - .max_height = 4096, 172 - .max_pixels_per_frame = 4096 * 4096, 170 + .max_width = 1920, 171 + .max_height = 1088, 172 + .max_pixels_per_frame = 1920 * 1088, 173 173 .max_level = 3, 174 174 }, 175 175 { 176 176 .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 177 - .max_width = 4096, 178 - .max_height = 4096, 179 - .max_pixels_per_frame = 4096 * 4096, 177 + .max_width = 1920, 178 + .max_height = 1088, 179 + .max_pixels_per_frame = 1920 * 1088, 180 180 .max_level = 5, 181 181 }, 182 182 { ··· 188 188 }, 189 189 { 190 190 .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 191 - .max_width = 4096, 192 - .max_height = 4096, 193 - .max_pixels_per_frame = 4096 * 4096, 191 + .max_width = 1920, 192 + .max_height = 1088, 193 + .max_pixels_per_frame = 1920 * 1088, 194 194 .max_level = 4, 195 195 }, 196 196 }; ··· 206 206 { 207 207 { 208 208 .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG2, 209 - .max_width = 4096, 210 - .max_height = 4096, 211 - .max_pixels_per_frame = 4096 * 4096, 209 + .max_width = 1920, 210 + .max_height = 1088, 211 + .max_pixels_per_frame = 1920 * 1088, 212 212 .max_level = 3, 213 213 }, 214 214 { 215 215 .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4, 216 - .max_width = 4096, 217 - .max_height = 4096, 218 - .max_pixels_per_frame = 4096 * 4096, 216 + .max_width = 1920, 217 + .max_height = 1088, 218 + .max_pixels_per_frame = 1920 * 1088, 219 219 .max_level = 5, 220 220 }, 221 221 { ··· 227 227 }, 228 228 { 229 229 .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VC1, 230 - .max_width = 4096, 231 - .max_height = 4096, 232 - .max_pixels_per_frame = 4096 * 4096, 230 + .max_width = 1920, 231 + .max_height = 1088, 232 + .max_pixels_per_frame = 1920 * 1088, 233 233 .max_level = 4, 234 234 }, 235 235 { ··· 238 238 .max_height = 4096, 239 239 .max_pixels_per_frame = 4096 * 4096, 240 240 .max_level = 186, 241 - }, 242 - { 243 - .codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 244 - .max_width = 4096, 245 - .max_height = 4096, 246 - .max_pixels_per_frame = 4096 * 4096, 247 - .max_level = 0, 248 241 }, 249 242 }; 250 243

+373 -330

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h

··· 3644 3644 }; 3645 3645 3646 3646 static const uint32_t cwsr_trap_gfx12_hex[] = { 3647 - 0xbfa00001, 0xbfa0024b, 3647 + 0xbfa00001, 0xbfa002a2, 3648 3648 0xb0804009, 0xb8f8f804, 3649 3649 0x9178ff78, 0x00008c00, 3650 3650 0xb8fbf811, 0x8b6eff78, ··· 3718 3718 0x00011677, 0xd7610000, 3719 3719 0x00011a79, 0xd7610000, 3720 3720 0x00011c7e, 0xd7610000, 3721 - 0x00011e7f, 0xbefe00ff, 3721 + 0x00011e7f, 0xd8500000, 3722 + 0x00000000, 0xd8500000, 3723 + 0x00000000, 0xd8500000, 3724 + 0x00000000, 0xd8500000, 3725 + 0x00000000, 0xd8500000, 3726 + 0x00000000, 0xd8500000, 3727 + 0x00000000, 0xd8500000, 3728 + 0x00000000, 0xd8500000, 3729 + 0x00000000, 0xbefe00ff, 3722 3730 0x00003fff, 0xbeff0080, 3723 3731 0xee0a407a, 0x000c0000, 3724 3732 0x00004000, 0xd760007a, ··· 3763 3755 0x00000200, 0xbef600ff, 3764 3756 0x01000000, 0x7e000280, 3765 3757 0x7e020280, 0x7e040280, 3766 - 0xbefd0080, 0xbe804ec2, 3767 - 0xbf94fffe, 0xb8faf804, 3768 - 0x8b7a847a, 0x91788478, 3769 - 0x8c787a78, 0xd7610002, 3770 - 0x0000fa71, 0x807d817d, 3771 - 0xd7610002, 0x0000fa6c, 3772 - 0x807d817d, 0x917aff6d, 3773 - 0x80000000, 0xd7610002, 3774 - 0x0000fa7a, 0x807d817d, 3775 - 0xd7610002, 0x0000fa6e, 3776 - 0x807d817d, 0xd7610002, 3777 - 0x0000fa6f, 0x807d817d, 3778 - 0xd7610002, 0x0000fa78, 3779 - 0x807d817d, 0xb8faf811, 3780 - 0xd7610002, 0x0000fa7a, 3781 - 0x807d817d, 0xd7610002, 3782 - 0x0000fa7b, 0x807d817d, 3783 - 0xb8f1f801, 0xd7610002, 3784 - 0x0000fa71, 0x807d817d, 3785 - 0xb8f1f814, 0xd7610002, 3786 - 0x0000fa71, 0x807d817d, 3787 - 0xb8f1f815, 0xd7610002, 3788 - 0x0000fa71, 0x807d817d, 3789 - 0xb8f1f812, 0xd7610002, 3790 - 0x0000fa71, 0x807d817d, 3791 - 0xb8f1f813, 0xd7610002, 3792 - 0x0000fa71, 0x807d817d, 3758 + 0xbe804ec2, 0xbf94fffe, 3759 + 0xb8faf804, 0x8b7a847a, 3760 + 0x91788478, 0x8c787a78, 3761 + 0x917aff6d, 0x80000000, 3762 + 0xd7610002, 0x00010071, 3763 + 0xd7610002, 0x0001026c, 3764 + 0xd7610002, 0x0001047a, 3765 + 0xd7610002, 0x0001066e, 3766 + 0xd7610002, 0x0001086f, 3767 + 0xd7610002, 0x00010a78, 3768 + 0xd7610002, 0x00010e7b, 3769 + 0xd8500000, 0x00000000, 3770 + 0xd8500000, 0x00000000, 3771 + 0xd8500000, 0x00000000, 3772 + 0xd8500000, 0x00000000, 3773 + 0xd8500000, 0x00000000, 3774 + 0xd8500000, 0x00000000, 3775 + 0xd8500000, 0x00000000, 3776 + 0xd8500000, 0x00000000, 3777 + 0xb8faf811, 0xd7610002, 3778 + 0x00010c7a, 0xb8faf801, 3779 + 0xd7610002, 0x0001107a, 3780 + 0xb8faf814, 0xd7610002, 3781 + 0x0001127a, 0xb8faf815, 3782 + 0xd7610002, 0x0001147a, 3783 + 0xb8faf812, 0xd7610002, 3784 + 0x0001167a, 0xb8faf813, 3785 + 0xd7610002, 0x0001187a, 3793 3786 0xb8faf802, 0xd7610002, 3794 - 0x0000fa7a, 0x807d817d, 3795 - 0xbefa50c1, 0xbfc70000, 3796 - 0xd7610002, 0x0000fa7a, 3797 - 0x807d817d, 0xbefe00ff, 3787 + 0x00011a7a, 0xbefa50c1, 3788 + 0xbfc70000, 0xd7610002, 3789 + 0x00011c7a, 0xd8500000, 3790 + 0x00000000, 0xd8500000, 3791 + 0x00000000, 0xd8500000, 3792 + 0x00000000, 0xd8500000, 3793 + 0x00000000, 0xd8500000, 3794 + 0x00000000, 0xd8500000, 3795 + 0x00000000, 0xd8500000, 3796 + 0x00000000, 0xd8500000, 3797 + 0x00000000, 0xbefe00ff, 3798 3798 0x0000ffff, 0xbeff0080, 3799 3799 0xc4068070, 0x008ce802, 3800 3800 0x00000000, 0xbefe00c1, ··· 3817 3801 0xbe824102, 0xbe844104, 3818 3802 0xbe864106, 0xbe884108, 3819 3803 0xbe8a410a, 0xbe8c410c, 3820 - 0xbe8e410e, 0xd7610002, 3821 - 0x0000f200, 0x80798179, 3822 - 0xd7610002, 0x0000f201, 3823 - 0x80798179, 0xd7610002, 3824 - 0x0000f202, 0x80798179, 3825 - 0xd7610002, 0x0000f203, 3826 - 0x80798179, 0xd7610002, 3827 - 0x0000f204, 0x80798179, 3828 - 0xd7610002, 0x0000f205, 3829 - 0x80798179, 0xd7610002, 3830 - 0x0000f206, 0x80798179, 3831 - 0xd7610002, 0x0000f207, 3832 - 0x80798179, 0xd7610002, 3833 - 0x0000f208, 0x80798179, 3834 - 0xd7610002, 0x0000f209, 3835 - 0x80798179, 0xd7610002, 3836 - 0x0000f20a, 0x80798179, 3837 - 0xd7610002, 0x0000f20b, 3838 - 0x80798179, 0xd7610002, 3839 - 0x0000f20c, 0x80798179, 3840 - 0xd7610002, 0x0000f20d, 3841 - 0x80798179, 0xd7610002, 3842 - 0x0000f20e, 0x80798179, 3843 - 0xd7610002, 0x0000f20f, 3844 - 0x80798179, 0xbf06a079, 3845 - 0xbfa10007, 0xc4068070, 3846 - 0x008ce802, 0x00000000, 3847 - 0x8070ff70, 0x00000080, 3848 - 0xbef90080, 0x7e040280, 3849 - 0x807d907d, 0xbf0aff7d, 3850 - 0x00000060, 0xbfa2ffbb, 3851 - 0xbe804100, 0xbe824102, 3852 - 0xbe844104, 0xbe864106, 3853 - 0xbe884108, 0xbe8a410a, 3854 - 0xd7610002, 0x0000f200, 3855 - 0x80798179, 0xd7610002, 3856 - 0x0000f201, 0x80798179, 3857 - 0xd7610002, 0x0000f202, 3858 - 0x80798179, 0xd7610002, 3859 - 0x0000f203, 0x80798179, 3860 - 0xd7610002, 0x0000f204, 3861 - 0x80798179, 0xd7610002, 3862 - 0x0000f205, 0x80798179, 3863 - 0xd7610002, 0x0000f206, 3864 - 0x80798179, 0xd7610002, 3865 - 0x0000f207, 0x80798179, 3866 - 0xd7610002, 0x0000f208, 3867 - 0x80798179, 0xd7610002, 3868 - 0x0000f209, 0x80798179, 3869 - 0xd7610002, 0x0000f20a, 3870 - 0x80798179, 0xd7610002, 3871 - 0x0000f20b, 0x80798179, 3804 + 0xbe8e410e, 0xbf068079, 3805 + 0xbfa10032, 0xd7610002, 3806 + 0x00010000, 0xd7610002, 3807 + 0x00010201, 0xd7610002, 3808 + 0x00010402, 0xd7610002, 3809 + 0x00010603, 0xd7610002, 3810 + 0x00010804, 0xd7610002, 3811 + 0x00010a05, 0xd7610002, 3812 + 0x00010c06, 0xd7610002, 3813 + 0x00010e07, 0xd7610002, 3814 + 0x00011008, 0xd7610002, 3815 + 0x00011209, 0xd7610002, 3816 + 0x0001140a, 0xd7610002, 3817 + 0x0001160b, 0xd7610002, 3818 + 0x0001180c, 0xd7610002, 3819 + 0x00011a0d, 0xd7610002, 3820 + 0x00011c0e, 0xd7610002, 3821 + 0x00011e0f, 0xd8500000, 3822 + 0x00000000, 0xd8500000, 3823 + 0x00000000, 0xd8500000, 3824 + 0x00000000, 0xd8500000, 3825 + 0x00000000, 0xd8500000, 3826 + 0x00000000, 0xd8500000, 3827 + 0x00000000, 0xd8500000, 3828 + 0x00000000, 0xd8500000, 3829 + 0x00000000, 0x80799079, 3830 + 0xbfa00038, 0xd7610002, 3831 + 0x00012000, 0xd7610002, 3832 + 0x00012201, 0xd7610002, 3833 + 0x00012402, 0xd7610002, 3834 + 0x00012603, 0xd7610002, 3835 + 0x00012804, 0xd7610002, 3836 + 0x00012a05, 0xd7610002, 3837 + 0x00012c06, 0xd7610002, 3838 + 0x00012e07, 0xd7610002, 3839 + 0x00013008, 0xd7610002, 3840 + 0x00013209, 0xd7610002, 3841 + 0x0001340a, 0xd7610002, 3842 + 0x0001360b, 0xd7610002, 3843 + 0x0001380c, 0xd7610002, 3844 + 0x00013a0d, 0xd7610002, 3845 + 0x00013c0e, 0xd7610002, 3846 + 0x00013e0f, 0xd8500000, 3847 + 0x00000000, 0xd8500000, 3848 + 0x00000000, 0xd8500000, 3849 + 0x00000000, 0xd8500000, 3850 + 0x00000000, 0xd8500000, 3851 + 0x00000000, 0xd8500000, 3852 + 0x00000000, 0xd8500000, 3853 + 0x00000000, 0xd8500000, 3854 + 0x00000000, 0x80799079, 3872 3855 0xc4068070, 0x008ce802, 3873 - 0x00000000, 0xbefe00c1, 3874 - 0x857d9973, 0x8b7d817d, 3875 - 0xbf06817d, 0xbfa20002, 3876 - 0xbeff0080, 0xbfa00001, 3877 - 0xbeff00c1, 0xb8fb4306, 3878 - 0x8b7bc17b, 0xbfa10044, 3879 - 0x8b7aff6d, 0x80000000, 3880 - 0xbfa10041, 0x847b897b, 3881 - 0xbef6007b, 0xb8f03b05, 3882 - 0x80708170, 0xbf0d9973, 3883 - 0xbfa20002, 0x84708970, 3884 - 0xbfa00001, 0x84708a70, 3885 - 0xb8fa1e06, 0x847a8a7a, 3886 - 0x80707a70, 0x8070ff70, 3887 - 0x00000200, 0x8070ff70, 3888 - 0x00000080, 0xbef600ff, 3889 - 0x01000000, 0xd71f0000, 3890 - 0x000100c1, 0xd7200000, 3891 - 0x000200c1, 0x16000084, 3892 - 0x857d9973, 0x8b7d817d, 3893 - 0xbf06817d, 0xbefd0080, 3894 - 0xbfa20013, 0xbe8300ff, 3895 - 0x00000080, 0xbf800000, 3896 - 0xbf800000, 0xbf800000, 3897 - 0xd8d80000, 0x01000000, 3898 - 0xbf8a0000, 0xc4068070, 3899 - 0x008ce801, 0x00000000, 3900 - 0x807d037d, 0x80700370, 3901 - 0xd5250000, 0x0001ff00, 3902 - 0x00000080, 0xbf0a7b7d, 3903 - 0xbfa2fff3, 0xbfa00012, 3904 - 0xbe8300ff, 0x00000100, 3856 + 0x00000000, 0x8070ff70, 3857 + 0x00000080, 0xbef90080, 3858 + 0x7e040280, 0x807d907d, 3859 + 0xbf0aff7d, 0x00000060, 3860 + 0xbfa2ff88, 0xbe804100, 3861 + 0xbe824102, 0xbe844104, 3862 + 0xbe864106, 0xbe884108, 3863 + 0xbe8a410a, 0xd7610002, 3864 + 0x00010000, 0xd7610002, 3865 + 0x00010201, 0xd7610002, 3866 + 0x00010402, 0xd7610002, 3867 + 0x00010603, 0xd7610002, 3868 + 0x00010804, 0xd7610002, 3869 + 0x00010a05, 0xd7610002, 3870 + 0x00010c06, 0xd7610002, 3871 + 0x00010e07, 0xd7610002, 3872 + 0x00011008, 0xd7610002, 3873 + 0x00011209, 0xd7610002, 3874 + 0x0001140a, 0xd7610002, 3875 + 0x0001160b, 0xd8500000, 3876 + 0x00000000, 0xd8500000, 3877 + 0x00000000, 0xd8500000, 3878 + 0x00000000, 0xd8500000, 3879 + 0x00000000, 0xd8500000, 3880 + 0x00000000, 0xd8500000, 3881 + 0x00000000, 0xd8500000, 3882 + 0x00000000, 0xd8500000, 3883 + 0x00000000, 0xc4068070, 3884 + 0x008ce802, 0x00000000, 3885 + 0xbefe00c1, 0x857d9973, 3886 + 0x8b7d817d, 0xbf06817d, 3887 + 0xbfa20002, 0xbeff0080, 3888 + 0xbfa00001, 0xbeff00c1, 3889 + 0xb8fb4306, 0x8b7bc17b, 3890 + 0xbfa10044, 0x8b7aff6d, 3891 + 0x80000000, 0xbfa10041, 3892 + 0x847b897b, 0xbef6007b, 3893 + 0xb8f03b05, 0x80708170, 3894 + 0xbf0d9973, 0xbfa20002, 3895 + 0x84708970, 0xbfa00001, 3896 + 0x84708a70, 0xb8fa1e06, 3897 + 0x847a8a7a, 0x80707a70, 3898 + 0x8070ff70, 0x00000200, 3899 + 0x8070ff70, 0x00000080, 3900 + 0xbef600ff, 0x01000000, 3901 + 0xd71f0000, 0x000100c1, 3902 + 0xd7200000, 0x000200c1, 3903 + 0x16000084, 0x857d9973, 3904 + 0x8b7d817d, 0xbf06817d, 3905 + 0xbefd0080, 0xbfa20013, 3906 + 0xbe8300ff, 0x00000080, 3905 3907 0xbf800000, 0xbf800000, 3906 3908 0xbf800000, 0xd8d80000, 3907 3909 0x01000000, 0xbf8a0000, 3908 3910 0xc4068070, 0x008ce801, 3909 3911 0x00000000, 0x807d037d, 3910 3912 0x80700370, 0xd5250000, 3911 - 0x0001ff00, 0x00000100, 3913 + 0x0001ff00, 0x00000080, 3912 3914 0xbf0a7b7d, 0xbfa2fff3, 3913 - 0xbefe00c1, 0x857d9973, 3914 - 0x8b7d817d, 0xbf06817d, 3915 - 0xbfa20004, 0xbef000ff, 3916 - 0x00000200, 0xbeff0080, 3917 - 0xbfa00003, 0xbef000ff, 3918 - 0x00000400, 0xbeff00c1, 3919 - 0xb8fb3b05, 0x807b817b, 3920 - 0x847b827b, 0x857d9973, 3921 - 0x8b7d817d, 0xbf06817d, 3922 - 0xbfa2001b, 0xbef600ff, 3923 - 0x01000000, 0xbefd0084, 3924 - 0xbf0a7b7d, 0xbfa10040, 3925 - 0x7e008700, 0x7e028701, 3926 - 0x7e048702, 0x7e068703, 3927 - 0xc4068070, 0x008ce800, 3928 - 0x00000000, 0xc4068070, 3929 - 0x008ce801, 0x00008000, 3930 - 0xc4068070, 0x008ce802, 3931 - 0x00010000, 0xc4068070, 3932 - 0x008ce803, 0x00018000, 3933 - 0x807d847d, 0x8070ff70, 3934 - 0x00000200, 0xbf0a7b7d, 3935 - 0xbfa2ffeb, 0xbfa0002a, 3915 + 0xbfa00012, 0xbe8300ff, 3916 + 0x00000100, 0xbf800000, 3917 + 0xbf800000, 0xbf800000, 3918 + 0xd8d80000, 0x01000000, 3919 + 0xbf8a0000, 0xc4068070, 3920 + 0x008ce801, 0x00000000, 3921 + 0x807d037d, 0x80700370, 3922 + 0xd5250000, 0x0001ff00, 3923 + 0x00000100, 0xbf0a7b7d, 3924 + 0xbfa2fff3, 0xbefe00c1, 3925 + 0x857d9973, 0x8b7d817d, 3926 + 0xbf06817d, 0xbfa20004, 3927 + 0xbef000ff, 0x00000200, 3928 + 0xbeff0080, 0xbfa00003, 3929 + 0xbef000ff, 0x00000400, 3930 + 0xbeff00c1, 0xb8fb3b05, 3931 + 0x807b817b, 0x847b827b, 3932 + 0x857d9973, 0x8b7d817d, 3933 + 0xbf06817d, 0xbfa2001b, 3936 3934 0xbef600ff, 0x01000000, 3937 3935 0xbefd0084, 0xbf0a7b7d, 3938 - 0xbfa10015, 0x7e008700, 3936 + 0xbfa10040, 0x7e008700, 3939 3937 0x7e028701, 0x7e048702, 3940 3938 0x7e068703, 0xc4068070, 3941 3939 0x008ce800, 0x00000000, 3942 3940 0xc4068070, 0x008ce801, 3943 - 0x00010000, 0xc4068070, 3944 - 0x008ce802, 0x00020000, 3941 + 0x00008000, 0xc4068070, 3942 + 0x008ce802, 0x00010000, 3945 3943 0xc4068070, 0x008ce803, 3946 - 0x00030000, 0x807d847d, 3947 - 0x8070ff70, 0x00000400, 3944 + 0x00018000, 0x807d847d, 3945 + 0x8070ff70, 0x00000200, 3948 3946 0xbf0a7b7d, 0xbfa2ffeb, 3949 - 0xb8fb1e06, 0x8b7bc17b, 3950 - 0xbfa1000d, 0x847b837b, 3951 - 0x807b7d7b, 0xbefe00c1, 3952 - 0xbeff0080, 0x7e008700, 3947 + 0xbfa0002a, 0xbef600ff, 3948 + 0x01000000, 0xbefd0084, 3949 + 0xbf0a7b7d, 0xbfa10015, 3950 + 0x7e008700, 0x7e028701, 3951 + 0x7e048702, 0x7e068703, 3953 3952 0xc4068070, 0x008ce800, 3954 - 0x00000000, 0x807d817d, 3955 - 0x8070ff70, 0x00000080, 3956 - 0xbf0a7b7d, 0xbfa2fff7, 3957 - 0xbfa0016e, 0xbef4007e, 3958 - 0x8b75ff7f, 0x0000ffff, 3959 - 0x8c75ff75, 0x00040000, 3960 - 0xbef60080, 0xbef700ff, 3961 - 0x10807fac, 0xbef1007f, 3962 - 0xb8f20742, 0x84729972, 3963 - 0x8b6eff7f, 0x04000000, 3964 - 0xbfa1003b, 0xbefe00c1, 3965 - 0x857d9972, 0x8b7d817d, 3966 - 0xbf06817d, 0xbfa20002, 3967 - 0xbeff0080, 0xbfa00001, 3968 - 0xbeff00c1, 0xb8ef4306, 3969 - 0x8b6fc16f, 0xbfa10030, 3970 - 0x846f896f, 0xbef6006f, 3953 + 0x00000000, 0xc4068070, 3954 + 0x008ce801, 0x00010000, 3955 + 0xc4068070, 0x008ce802, 3956 + 0x00020000, 0xc4068070, 3957 + 0x008ce803, 0x00030000, 3958 + 0x807d847d, 0x8070ff70, 3959 + 0x00000400, 0xbf0a7b7d, 3960 + 0xbfa2ffeb, 0xb8fb1e06, 3961 + 0x8b7bc17b, 0xbfa1000d, 3962 + 0x847b837b, 0x807b7d7b, 3963 + 0xbefe00c1, 0xbeff0080, 3964 + 0x7e008700, 0xc4068070, 3965 + 0x008ce800, 0x00000000, 3966 + 0x807d817d, 0x8070ff70, 3967 + 0x00000080, 0xbf0a7b7d, 3968 + 0xbfa2fff7, 0xbfa0016e, 3969 + 0xbef4007e, 0x8b75ff7f, 3970 + 0x0000ffff, 0x8c75ff75, 3971 + 0x00040000, 0xbef60080, 3972 + 0xbef700ff, 0x10807fac, 3973 + 0xbef1007f, 0xb8f20742, 3974 + 0x84729972, 0x8b6eff7f, 3975 + 0x04000000, 0xbfa1003b, 3976 + 0xbefe00c1, 0x857d9972, 3977 + 0x8b7d817d, 0xbf06817d, 3978 + 0xbfa20002, 0xbeff0080, 3979 + 0xbfa00001, 0xbeff00c1, 3980 + 0xb8ef4306, 0x8b6fc16f, 3981 + 0xbfa10030, 0x846f896f, 3982 + 0xbef6006f, 0xb8f83b05, 3983 + 0x80788178, 0xbf0d9972, 3984 + 0xbfa20002, 0x84788978, 3985 + 0xbfa00001, 0x84788a78, 3986 + 0xb8ee1e06, 0x846e8a6e, 3987 + 0x80786e78, 0x8078ff78, 3988 + 0x00000200, 0x8078ff78, 3989 + 0x00000080, 0xbef600ff, 3990 + 0x01000000, 0x857d9972, 3991 + 0x8b7d817d, 0xbf06817d, 3992 + 0xbefd0080, 0xbfa2000d, 3993 + 0xc4050078, 0x0080e800, 3994 + 0x00000000, 0xbf8a0000, 3995 + 0xdac00000, 0x00000000, 3996 + 0x807dff7d, 0x00000080, 3997 + 0x8078ff78, 0x00000080, 3998 + 0xbf0a6f7d, 0xbfa2fff4, 3999 + 0xbfa0000c, 0xc4050078, 4000 + 0x0080e800, 0x00000000, 4001 + 0xbf8a0000, 0xdac00000, 4002 + 0x00000000, 0x807dff7d, 4003 + 0x00000100, 0x8078ff78, 4004 + 0x00000100, 0xbf0a6f7d, 4005 + 0xbfa2fff4, 0xbef80080, 4006 + 0xbefe00c1, 0x857d9972, 4007 + 0x8b7d817d, 0xbf06817d, 4008 + 0xbfa20002, 0xbeff0080, 4009 + 0xbfa00001, 0xbeff00c1, 4010 + 0xb8ef3b05, 0x806f816f, 4011 + 0x846f826f, 0x857d9972, 4012 + 0x8b7d817d, 0xbf06817d, 4013 + 0xbfa2002c, 0xbef600ff, 4014 + 0x01000000, 0xbeee0078, 4015 + 0x8078ff78, 0x00000200, 4016 + 0xbefd0084, 0xbf0a6f7d, 4017 + 0xbfa10061, 0xc4050078, 4018 + 0x008ce800, 0x00000000, 4019 + 0xc4050078, 0x008ce801, 4020 + 0x00008000, 0xc4050078, 4021 + 0x008ce802, 0x00010000, 4022 + 0xc4050078, 0x008ce803, 4023 + 0x00018000, 0xbf8a0000, 4024 + 0x7e008500, 0x7e028501, 4025 + 0x7e048502, 0x7e068503, 4026 + 0x807d847d, 0x8078ff78, 4027 + 0x00000200, 0xbf0a6f7d, 4028 + 0xbfa2ffea, 0xc405006e, 4029 + 0x008ce800, 0x00000000, 4030 + 0xc405006e, 0x008ce801, 4031 + 0x00008000, 0xc405006e, 4032 + 0x008ce802, 0x00010000, 4033 + 0xc405006e, 0x008ce803, 4034 + 0x00018000, 0xbf8a0000, 4035 + 0xbfa0003d, 0xbef600ff, 4036 + 0x01000000, 0xbeee0078, 4037 + 0x8078ff78, 0x00000400, 4038 + 0xbefd0084, 0xbf0a6f7d, 4039 + 0xbfa10016, 0xc4050078, 4040 + 0x008ce800, 0x00000000, 4041 + 0xc4050078, 0x008ce801, 4042 + 0x00010000, 0xc4050078, 4043 + 0x008ce802, 0x00020000, 4044 + 0xc4050078, 0x008ce803, 4045 + 0x00030000, 0xbf8a0000, 4046 + 0x7e008500, 0x7e028501, 4047 + 0x7e048502, 0x7e068503, 4048 + 0x807d847d, 0x8078ff78, 4049 + 0x00000400, 0xbf0a6f7d, 4050 + 0xbfa2ffea, 0xb8ef1e06, 4051 + 0x8b6fc16f, 0xbfa1000f, 4052 + 0x846f836f, 0x806f7d6f, 4053 + 0xbefe00c1, 0xbeff0080, 4054 + 0xc4050078, 0x008ce800, 4055 + 0x00000000, 0xbf8a0000, 4056 + 0x7e008500, 0x807d817d, 4057 + 0x8078ff78, 0x00000080, 4058 + 0xbf0a6f7d, 0xbfa2fff6, 4059 + 0xbeff00c1, 0xc405006e, 4060 + 0x008ce800, 0x00000000, 4061 + 0xc405006e, 0x008ce801, 4062 + 0x00010000, 0xc405006e, 4063 + 0x008ce802, 0x00020000, 4064 + 0xc405006e, 0x008ce803, 4065 + 0x00030000, 0xbf8a0000, 3971 4066 0xb8f83b05, 0x80788178, 3972 4067 0xbf0d9972, 0xbfa20002, 3973 4068 0x84788978, 0xbfa00001, 3974 4069 0x84788a78, 0xb8ee1e06, 3975 4070 0x846e8a6e, 0x80786e78, 3976 4071 0x8078ff78, 0x00000200, 3977 - 0x8078ff78, 0x00000080, 4072 + 0x80f8ff78, 0x00000050, 3978 4073 0xbef600ff, 0x01000000, 3979 - 0x857d9972, 0x8b7d817d, 3980 - 0xbf06817d, 0xbefd0080, 3981 - 0xbfa2000d, 0xc4050078, 3982 - 0x0080e800, 0x00000000, 3983 - 0xbf8a0000, 0xdac00000, 3984 - 0x00000000, 0x807dff7d, 3985 - 0x00000080, 0x8078ff78, 3986 - 0x00000080, 0xbf0a6f7d, 3987 - 0xbfa2fff4, 0xbfa0000c, 3988 - 0xc4050078, 0x0080e800, 3989 - 0x00000000, 0xbf8a0000, 3990 - 0xdac00000, 0x00000000, 3991 - 0x807dff7d, 0x00000100, 3992 - 0x8078ff78, 0x00000100, 3993 - 0xbf0a6f7d, 0xbfa2fff4, 3994 - 0xbef80080, 0xbefe00c1, 3995 - 0x857d9972, 0x8b7d817d, 3996 - 0xbf06817d, 0xbfa20002, 3997 - 0xbeff0080, 0xbfa00001, 3998 - 0xbeff00c1, 0xb8ef3b05, 3999 - 0x806f816f, 0x846f826f, 4000 - 0x857d9972, 0x8b7d817d, 4001 - 0xbf06817d, 0xbfa2002c, 4002 - 0xbef600ff, 0x01000000, 4003 - 0xbeee0078, 0x8078ff78, 4004 - 0x00000200, 0xbefd0084, 4005 - 0xbf0a6f7d, 0xbfa10061, 4006 - 0xc4050078, 0x008ce800, 4007 - 0x00000000, 0xc4050078, 4008 - 0x008ce801, 0x00008000, 4009 - 0xc4050078, 0x008ce802, 4010 - 0x00010000, 0xc4050078, 4011 - 0x008ce803, 0x00018000, 4012 - 0xbf8a0000, 0x7e008500, 4013 - 0x7e028501, 0x7e048502, 4014 - 0x7e068503, 0x807d847d, 4015 - 0x8078ff78, 0x00000200, 4016 - 0xbf0a6f7d, 0xbfa2ffea, 4017 - 0xc405006e, 0x008ce800, 4018 - 0x00000000, 0xc405006e, 4019 - 0x008ce801, 0x00008000, 4020 - 0xc405006e, 0x008ce802, 4021 - 0x00010000, 0xc405006e, 4022 - 0x008ce803, 0x00018000, 4023 - 0xbf8a0000, 0xbfa0003d, 4024 - 0xbef600ff, 0x01000000, 4025 - 0xbeee0078, 0x8078ff78, 4026 - 0x00000400, 0xbefd0084, 4027 - 0xbf0a6f7d, 0xbfa10016, 4028 - 0xc4050078, 0x008ce800, 4029 - 0x00000000, 0xc4050078, 4030 - 0x008ce801, 0x00010000, 4031 - 0xc4050078, 0x008ce802, 4032 - 0x00020000, 0xc4050078, 4033 - 0x008ce803, 0x00030000, 4034 - 0xbf8a0000, 0x7e008500, 4035 - 0x7e028501, 0x7e048502, 4036 - 0x7e068503, 0x807d847d, 4037 - 0x8078ff78, 0x00000400, 4038 - 0xbf0a6f7d, 0xbfa2ffea, 4039 - 0xb8ef1e06, 0x8b6fc16f, 4040 - 0xbfa1000f, 0x846f836f, 4041 - 0x806f7d6f, 0xbefe00c1, 4042 - 0xbeff0080, 0xc4050078, 4043 - 0x008ce800, 0x00000000, 4044 - 0xbf8a0000, 0x7e008500, 4045 - 0x807d817d, 0x8078ff78, 4046 - 0x00000080, 0xbf0a6f7d, 4047 - 0xbfa2fff6, 0xbeff00c1, 4048 - 0xc405006e, 0x008ce800, 4049 - 0x00000000, 0xc405006e, 4050 - 0x008ce801, 0x00010000, 4051 - 0xc405006e, 0x008ce802, 4052 - 0x00020000, 0xc405006e, 4053 - 0x008ce803, 0x00030000, 4054 - 0xbf8a0000, 0xb8f83b05, 4055 - 0x80788178, 0xbf0d9972, 4056 - 0xbfa20002, 0x84788978, 4057 - 0xbfa00001, 0x84788a78, 4058 - 0xb8ee1e06, 0x846e8a6e, 4059 - 0x80786e78, 0x8078ff78, 4060 - 0x00000200, 0x80f8ff78, 4061 - 0x00000050, 0xbef600ff, 4062 - 0x01000000, 0xbefd00ff, 4063 - 0x0000006c, 0x80f89078, 4064 - 0xf462403a, 0xf0000000, 4065 - 0xbf8a0000, 0x80fd847d, 4066 - 0xbf800000, 0xbe804300, 4067 - 0xbe824302, 0x80f8a078, 4068 - 0xf462603a, 0xf0000000, 4069 - 0xbf8a0000, 0x80fd887d, 4070 - 0xbf800000, 0xbe804300, 4071 - 0xbe824302, 0xbe844304, 4072 - 0xbe864306, 0x80f8c078, 4073 - 0xf462803a, 0xf0000000, 4074 - 0xbf8a0000, 0x80fd907d, 4075 - 0xbf800000, 0xbe804300, 4076 - 0xbe824302, 0xbe844304, 4077 - 0xbe864306, 0xbe884308, 4078 - 0xbe8a430a, 0xbe8c430c, 4079 - 0xbe8e430e, 0xbf06807d, 4080 - 0xbfa1fff0, 0xb980f801, 4081 - 0x00000000, 0xb8f83b05, 4082 - 0x80788178, 0xbf0d9972, 4083 - 0xbfa20002, 0x84788978, 4084 - 0xbfa00001, 0x84788a78, 4085 - 0xb8ee1e06, 0x846e8a6e, 4086 - 0x80786e78, 0x8078ff78, 4087 - 0x00000200, 0xbef600ff, 4088 - 0x01000000, 0xbeff0071, 4089 - 0xf4621bfa, 0xf0000000, 4090 - 0x80788478, 0xf4621b3a, 4091 - 0xf0000000, 0x80788478, 4092 - 0xf4621b7a, 0xf0000000, 4093 - 0x80788478, 0xf4621c3a, 4094 - 0xf0000000, 0x80788478, 4095 - 0xf4621c7a, 0xf0000000, 4096 - 0x80788478, 0xf4621eba, 4097 - 0xf0000000, 0x80788478, 4098 - 0xf4621efa, 0xf0000000, 4099 - 0x80788478, 0xf4621e7a, 4100 - 0xf0000000, 0x80788478, 4101 - 0xf4621cfa, 0xf0000000, 4102 - 0x80788478, 0xf4621bba, 4103 - 0xf0000000, 0x80788478, 4104 - 0xbf8a0000, 0xb96ef814, 4105 - 0xf4621bba, 0xf0000000, 4106 - 0x80788478, 0xbf8a0000, 4107 - 0xb96ef815, 0xf4621bba, 4108 - 0xf0000000, 0x80788478, 4109 - 0xbf8a0000, 0xb96ef812, 4110 - 0xf4621bba, 0xf0000000, 4111 - 0x80788478, 0xbf8a0000, 4112 - 0xb96ef813, 0x8b6eff7f, 4113 - 0x04000000, 0xbfa1000d, 4114 - 0x80788478, 0xf4621bba, 4115 - 0xf0000000, 0x80788478, 4116 - 0xbf8a0000, 0xbf0d806e, 4117 - 0xbfa10006, 0x856e906e, 4118 - 0x8b6e6e6e, 0xbfa10003, 4119 - 0xbe804ec1, 0x816ec16e, 4120 - 0xbfa0fffb, 0xbefd006f, 4121 - 0xbefe0070, 0xbeff0071, 4122 - 0xb97b2011, 0x857b867b, 4123 - 0xb97b0191, 0x857b827b, 4124 - 0xb97bba11, 0xb973f801, 4125 - 0xb8ee3b05, 0x806e816e, 4074 + 0xbefd00ff, 0x0000006c, 4075 + 0x80f89078, 0xf462403a, 4076 + 0xf0000000, 0xbf8a0000, 4077 + 0x80fd847d, 0xbf800000, 4078 + 0xbe804300, 0xbe824302, 4079 + 0x80f8a078, 0xf462603a, 4080 + 0xf0000000, 0xbf8a0000, 4081 + 0x80fd887d, 0xbf800000, 4082 + 0xbe804300, 0xbe824302, 4083 + 0xbe844304, 0xbe864306, 4084 + 0x80f8c078, 0xf462803a, 4085 + 0xf0000000, 0xbf8a0000, 4086 + 0x80fd907d, 0xbf800000, 4087 + 0xbe804300, 0xbe824302, 4088 + 0xbe844304, 0xbe864306, 4089 + 0xbe884308, 0xbe8a430a, 4090 + 0xbe8c430c, 0xbe8e430e, 4091 + 0xbf06807d, 0xbfa1fff0, 4092 + 0xb980f801, 0x00000000, 4093 + 0xb8f83b05, 0x80788178, 4126 4094 0xbf0d9972, 0xbfa20002, 4127 - 0x846e896e, 0xbfa00001, 4128 - 0x846e8a6e, 0xb8ef1e06, 4129 - 0x846f8a6f, 0x806e6f6e, 4130 - 0x806eff6e, 0x00000200, 4131 - 0x806e746e, 0x826f8075, 4132 - 0x8b6fff6f, 0x0000ffff, 4133 - 0xf4605c37, 0xf8000050, 4134 - 0xf4605d37, 0xf8000060, 4135 - 0xf4601e77, 0xf8000074, 4136 - 0xbf8a0000, 0x8b6dff6d, 4137 - 0x0000ffff, 0x8bfe7e7e, 4138 - 0x8bea6a6a, 0xb97af804, 4095 + 0x84788978, 0xbfa00001, 4096 + 0x84788a78, 0xb8ee1e06, 4097 + 0x846e8a6e, 0x80786e78, 4098 + 0x8078ff78, 0x00000200, 4099 + 0xbef600ff, 0x01000000, 4100 + 0xbeff0071, 0xf4621bfa, 4101 + 0xf0000000, 0x80788478, 4102 + 0xf4621b3a, 0xf0000000, 4103 + 0x80788478, 0xf4621b7a, 4104 + 0xf0000000, 0x80788478, 4105 + 0xf4621c3a, 0xf0000000, 4106 + 0x80788478, 0xf4621c7a, 4107 + 0xf0000000, 0x80788478, 4108 + 0xf4621eba, 0xf0000000, 4109 + 0x80788478, 0xf4621efa, 4110 + 0xf0000000, 0x80788478, 4111 + 0xf4621e7a, 0xf0000000, 4112 + 0x80788478, 0xf4621cfa, 4113 + 0xf0000000, 0x80788478, 4114 + 0xf4621bba, 0xf0000000, 4115 + 0x80788478, 0xbf8a0000, 4116 + 0xb96ef814, 0xf4621bba, 4117 + 0xf0000000, 0x80788478, 4118 + 0xbf8a0000, 0xb96ef815, 4119 + 0xf4621bba, 0xf0000000, 4120 + 0x80788478, 0xbf8a0000, 4121 + 0xb96ef812, 0xf4621bba, 4122 + 0xf0000000, 0x80788478, 4123 + 0xbf8a0000, 0xb96ef813, 4124 + 0x8b6eff7f, 0x04000000, 4125 + 0xbfa1000d, 0x80788478, 4126 + 0xf4621bba, 0xf0000000, 4127 + 0x80788478, 0xbf8a0000, 4128 + 0xbf0d806e, 0xbfa10006, 4129 + 0x856e906e, 0x8b6e6e6e, 4130 + 0xbfa10003, 0xbe804ec1, 4131 + 0x816ec16e, 0xbfa0fffb, 4132 + 0xbefd006f, 0xbefe0070, 4133 + 0xbeff0071, 0xb97b2011, 4134 + 0x857b867b, 0xb97b0191, 4135 + 0x857b827b, 0xb97bba11, 4136 + 0xb973f801, 0xb8ee3b05, 4137 + 0x806e816e, 0xbf0d9972, 4138 + 0xbfa20002, 0x846e896e, 4139 + 0xbfa00001, 0x846e8a6e, 4140 + 0xb8ef1e06, 0x846f8a6f, 4141 + 0x806e6f6e, 0x806eff6e, 4142 + 0x00000200, 0x806e746e, 4143 + 0x826f8075, 0x8b6fff6f, 4144 + 0x0000ffff, 0xf4605c37, 4145 + 0xf8000050, 0xf4605d37, 4146 + 0xf8000060, 0xf4601e77, 4147 + 0xf8000074, 0xbf8a0000, 4148 + 0x8b6dff6d, 0x0000ffff, 4149 + 0x8bfe7e7e, 0x8bea6a6a, 4150 + 0xb97af804, 0xbe804ec2, 4151 + 0xbf94fffe, 0xbe804a6c, 4139 4152 0xbe804ec2, 0xbf94fffe, 4140 - 0xbe804a6c, 0xbe804ec2, 4141 - 0xbf94fffe, 0xbfb10000, 4153 + 0xbfb10000, 0xbf9f0000, 4142 4154 0xbf9f0000, 0xbf9f0000, 4143 4155 0xbf9f0000, 0xbf9f0000, 4144 - 0xbf9f0000, 0x00000000, 4145 4156 }; 4146 4157 4147 4158 static const uint32_t cwsr_trap_gfx9_5_0_hex[] = {

+44 -38

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx12.asm

··· 30 30 #define CHIP_GFX12 37 31 31 32 32 #define SINGLE_STEP_MISSED_WORKAROUND 1 //workaround for lost TRAP_AFTER_INST exception when SAVECTX raised 33 + #define HAVE_VALU_SGPR_HAZARD (ASIC_FAMILY == CHIP_GFX12) 33 34 34 35 var SQ_WAVE_STATE_PRIV_BARRIER_COMPLETE_MASK = 0x4 35 36 var SQ_WAVE_STATE_PRIV_SCC_SHIFT = 9 ··· 352 351 v_writelane_b32 v0, ttmp13, 0xD 353 352 v_writelane_b32 v0, exec_lo, 0xE 354 353 v_writelane_b32 v0, exec_hi, 0xF 354 + valu_sgpr_hazard() 355 355 356 356 s_mov_b32 exec_lo, 0x3FFF 357 357 s_mov_b32 exec_hi, 0x0 ··· 419 417 v_mov_b32 v0, 0x0 //Offset[31:0] from buffer resource 420 418 v_mov_b32 v1, 0x0 //Offset[63:32] from buffer resource 421 419 v_mov_b32 v2, 0x0 //Set of SGPRs for TCP store 422 - s_mov_b32 m0, 0x0 //Next lane of v2 to write to 423 420 424 421 // Ensure no further changes to barrier or LDS state. 425 422 // STATE_PRIV.BARRIER_COMPLETE may change up to this point. ··· 431 430 s_andn2_b32 s_save_state_priv, s_save_state_priv, SQ_WAVE_STATE_PRIV_BARRIER_COMPLETE_MASK 432 431 s_or_b32 s_save_state_priv, s_save_state_priv, s_save_tmp 433 432 434 - write_hwreg_to_v2(s_save_m0) 435 - write_hwreg_to_v2(s_save_pc_lo) 436 433 s_andn2_b32 s_save_tmp, s_save_pc_hi, S_SAVE_PC_HI_FIRST_WAVE_MASK 437 - write_hwreg_to_v2(s_save_tmp) 438 - write_hwreg_to_v2(s_save_exec_lo) 439 - write_hwreg_to_v2(s_save_exec_hi) 440 - write_hwreg_to_v2(s_save_state_priv) 434 + v_writelane_b32 v2, s_save_m0, 0x0 435 + v_writelane_b32 v2, s_save_pc_lo, 0x1 436 + v_writelane_b32 v2, s_save_tmp, 0x2 437 + v_writelane_b32 v2, s_save_exec_lo, 0x3 438 + v_writelane_b32 v2, s_save_exec_hi, 0x4 439 + v_writelane_b32 v2, s_save_state_priv, 0x5 440 + v_writelane_b32 v2, s_save_xnack_mask, 0x7 441 + valu_sgpr_hazard() 441 442 442 443 s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_EXCP_FLAG_PRIV) 443 - write_hwreg_to_v2(s_save_tmp) 444 + v_writelane_b32 v2, s_save_tmp, 0x6 444 445 445 - write_hwreg_to_v2(s_save_xnack_mask) 446 + s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_MODE) 447 + v_writelane_b32 v2, s_save_tmp, 0x8 446 448 447 - s_getreg_b32 s_save_m0, hwreg(HW_REG_WAVE_MODE) 448 - write_hwreg_to_v2(s_save_m0) 449 + s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_SCRATCH_BASE_LO) 450 + v_writelane_b32 v2, s_save_tmp, 0x9 449 451 450 - s_getreg_b32 s_save_m0, hwreg(HW_REG_WAVE_SCRATCH_BASE_LO) 451 - write_hwreg_to_v2(s_save_m0) 452 + s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_SCRATCH_BASE_HI) 453 + v_writelane_b32 v2, s_save_tmp, 0xA 452 454 453 - s_getreg_b32 s_save_m0, hwreg(HW_REG_WAVE_SCRATCH_BASE_HI) 454 - write_hwreg_to_v2(s_save_m0) 455 + s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_EXCP_FLAG_USER) 456 + v_writelane_b32 v2, s_save_tmp, 0xB 455 457 456 - s_getreg_b32 s_save_m0, hwreg(HW_REG_WAVE_EXCP_FLAG_USER) 457 - write_hwreg_to_v2(s_save_m0) 458 - 459 - s_getreg_b32 s_save_m0, hwreg(HW_REG_WAVE_TRAP_CTRL) 460 - write_hwreg_to_v2(s_save_m0) 458 + s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_TRAP_CTRL) 459 + v_writelane_b32 v2, s_save_tmp, 0xC 461 460 462 461 s_getreg_b32 s_save_tmp, hwreg(HW_REG_WAVE_STATUS) 463 - write_hwreg_to_v2(s_save_tmp) 462 + v_writelane_b32 v2, s_save_tmp, 0xD 464 463 465 464 s_get_barrier_state s_save_tmp, -1 466 465 s_wait_kmcnt (0) 467 - write_hwreg_to_v2(s_save_tmp) 466 + v_writelane_b32 v2, s_save_tmp, 0xE 467 + valu_sgpr_hazard() 468 468 469 469 // Write HWREGs with 16 VGPR lanes. TTMPs occupy space after this. 470 470 s_mov_b32 exec_lo, 0xFFFF ··· 499 497 s_movrels_b64 s12, s12 //s12 = s[12+m0], s13 = s[13+m0] 500 498 s_movrels_b64 s14, s14 //s14 = s[14+m0], s15 = s[15+m0] 501 499 502 - write_16sgpr_to_v2(s0) 503 - 504 - s_cmp_eq_u32 ttmp13, 0x20 //have 32 VGPR lanes filled? 505 - s_cbranch_scc0 L_SAVE_SGPR_SKIP_TCP_STORE 500 + s_cmp_eq_u32 ttmp13, 0x0 501 + s_cbranch_scc0 L_WRITE_V2_SECOND_HALF 502 + write_16sgpr_to_v2(s0, 0x0) 503 + s_branch L_SAVE_SGPR_SKIP_TCP_STORE 504 + L_WRITE_V2_SECOND_HALF: 505 + write_16sgpr_to_v2(s0, 0x10) 506 506 507 507 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset scope:SCOPE_SYS 508 508 s_add_u32 s_save_mem_offset, s_save_mem_offset, 0x80 ··· 1060 1056 s_endpgm_saved 1061 1057 end 1062 1058 1063 - function write_hwreg_to_v2(s) 1064 - // Copy into VGPR for later TCP store. 1065 - v_writelane_b32 v2, s, m0 1066 - s_add_u32 m0, m0, 0x1 1067 - end 1068 - 1069 - 1070 - function write_16sgpr_to_v2(s) 1059 + function write_16sgpr_to_v2(s, lane_offset) 1071 1060 // Copy into VGPR for later TCP store. 1072 1061 for var sgpr_idx = 0; sgpr_idx < 16; sgpr_idx ++ 1073 - v_writelane_b32 v2, s[sgpr_idx], ttmp13 1074 - s_add_u32 ttmp13, ttmp13, 0x1 1062 + v_writelane_b32 v2, s[sgpr_idx], sgpr_idx + lane_offset 1075 1063 end 1064 + valu_sgpr_hazard() 1065 + s_add_u32 ttmp13, ttmp13, 0x10 1076 1066 end 1077 1067 1078 1068 function write_12sgpr_to_v2(s) 1079 1069 // Copy into VGPR for later TCP store. 1080 1070 for var sgpr_idx = 0; sgpr_idx < 12; sgpr_idx ++ 1081 - v_writelane_b32 v2, s[sgpr_idx], ttmp13 1082 - s_add_u32 ttmp13, ttmp13, 0x1 1071 + v_writelane_b32 v2, s[sgpr_idx], sgpr_idx 1083 1072 end 1073 + valu_sgpr_hazard() 1084 1074 end 1085 1075 1086 1076 function read_hwreg_from_mem(s, s_rsrc, s_mem_offset) ··· 1125 1127 function get_wave_size2(s_reg) 1126 1128 s_getreg_b32 s_reg, hwreg(HW_REG_WAVE_STATUS,SQ_WAVE_STATUS_WAVE64_SHIFT,SQ_WAVE_STATUS_WAVE64_SIZE) 1127 1129 s_lshl_b32 s_reg, s_reg, S_WAVE_SIZE 1130 + end 1131 + 1132 + function valu_sgpr_hazard 1133 + #if HAVE_VALU_SGPR_HAZARD 1134 + for var rep = 0; rep < 8; rep ++ 1135 + ds_nop 1136 + end 1137 + #endif 1128 1138 end

+11 -1

drivers/gpu/drm/amd/amdkfd/kfd_queue.c

··· 233 233 int kfd_queue_acquire_buffers(struct kfd_process_device *pdd, struct queue_properties *properties) 234 234 { 235 235 struct kfd_topology_device *topo_dev; 236 + u64 expected_queue_size; 236 237 struct amdgpu_vm *vm; 237 238 u32 total_cwsr_size; 238 239 int err; ··· 241 240 topo_dev = kfd_topology_device_by_id(pdd->dev->id); 242 241 if (!topo_dev) 243 242 return -EINVAL; 243 + 244 + /* AQL queues on GFX7 and GFX8 appear twice their actual size */ 245 + if (properties->type == KFD_QUEUE_TYPE_COMPUTE && 246 + properties->format == KFD_QUEUE_FORMAT_AQL && 247 + topo_dev->node_props.gfx_target_version >= 70000 && 248 + topo_dev->node_props.gfx_target_version < 90000) 249 + expected_queue_size = properties->queue_size / 2; 250 + else 251 + expected_queue_size = properties->queue_size; 244 252 245 253 vm = drm_priv_to_vm(pdd->drm_priv); 246 254 err = amdgpu_bo_reserve(vm->root.bo, false); ··· 265 255 goto out_err_unreserve; 266 256 267 257 err = kfd_queue_buffer_get(vm, (void *)properties->queue_address, 268 - &properties->ring_bo, properties->queue_size); 258 + &properties->ring_bo, expected_queue_size); 269 259 if (err) 270 260 goto out_err_unreserve; 271 261

+1 -7

drivers/gpu/drm/amd/amdkfd/kfd_svm.c

··· 1286 1286 break; 1287 1287 case IP_VERSION(12, 0, 0): 1288 1288 case IP_VERSION(12, 0, 1): 1289 - if (domain == SVM_RANGE_VRAM_DOMAIN) { 1290 - if (bo_node != node) 1291 - mapping_flags |= AMDGPU_VM_MTYPE_NC; 1292 - } else { 1293 - mapping_flags |= coherent ? 1294 - AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1295 - } 1289 + mapping_flags |= AMDGPU_VM_MTYPE_NC; 1296 1290 break; 1297 1291 default: 1298 1292 mapping_flags |= coherent ?

+1 -1

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

··· 1745 1745 } 1746 1746 if (quirk_entries.support_edp0_on_dp1) { 1747 1747 init_data->flags.support_edp0_on_dp1 = true; 1748 - drm_info(dev, "aux_hpd_discon_quirk attached\n"); 1748 + drm_info(dev, "support_edp0_on_dp1 attached\n"); 1749 1749 } 1750 1750 } 1751 1751

+11

drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c

··· 69 69 if (link->replay_settings.replay_feature_enabled) 70 70 return true; 71 71 72 + /* only use HW lock for PSR1 on single eDP */ 73 + if (link->psr_settings.psr_version == DC_PSR_VERSION_1) { 74 + struct dc_link *edp_links[MAX_NUM_EDP]; 75 + int edp_num; 76 + 77 + dc_get_edp_links(link->dc, edp_links, &edp_num); 78 + 79 + if (edp_num == 1) 80 + return true; 81 + } 82 + 72 83 return false; 73 84 }

+1 -1

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

··· 704 704 cw6.region.base = DMUB_CW6_BASE; 705 705 cw6.region.top = cw6.region.base + fw_state_fb->size; 706 706 707 - dmub->fw_state = fw_state_fb->cpu_addr; 707 + dmub->fw_state = (void *)((uintptr_t)(fw_state_fb->cpu_addr) + DMUB_DEBUG_FW_STATE_OFFSET); 708 708 709 709 region6.offset.quad_part = shared_state_fb->gpu_addr; 710 710 region6.region.base = DMUB_CW6_BASE;

+2

drivers/gpu/drm/amd/pm/amdgpu_pm.c

··· 2421 2421 case IP_VERSION(11, 0, 1): 2422 2422 case IP_VERSION(11, 0, 2): 2423 2423 case IP_VERSION(11, 0, 3): 2424 + case IP_VERSION(12, 0, 0): 2425 + case IP_VERSION(12, 0, 1): 2424 2426 *states = ATTR_STATE_SUPPORTED; 2425 2427 break; 2426 2428 default:

+54 -42

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

··· 1193 1193 PP_OD_FEATURE_GFXCLK_BIT)) 1194 1194 break; 1195 1195 1196 - PPTable_t *pptable = smu->smu_table.driver_pptable; 1197 - const OverDriveLimits_t * const overdrive_upperlimits = 1198 - &pptable->SkuTable.OverDriveLimitsBasicMax; 1199 - const OverDriveLimits_t * const overdrive_lowerlimits = 1200 - &pptable->SkuTable.OverDriveLimitsBasicMin; 1201 - 1202 1196 size += sysfs_emit_at(buf, size, "OD_SCLK_OFFSET:\n"); 1203 - size += sysfs_emit_at(buf, size, "0: %dMhz\n1: %uMhz\n", 1204 - overdrive_lowerlimits->GfxclkFoffset, 1205 - overdrive_upperlimits->GfxclkFoffset); 1197 + size += sysfs_emit_at(buf, size, "%dMhz\n", 1198 + od_table->OverDriveTable.GfxclkFoffset); 1206 1199 break; 1207 1200 1208 1201 case SMU_OD_MCLK: ··· 1330 1337 1331 1338 if (smu_v14_0_2_is_od_feature_supported(smu, PP_OD_FEATURE_GFXCLK_BIT)) { 1332 1339 smu_v14_0_2_get_od_setting_limits(smu, 1333 - PP_OD_FEATURE_GFXCLK_FMIN, 1334 - &min_value, 1335 - NULL); 1336 - smu_v14_0_2_get_od_setting_limits(smu, 1337 1340 PP_OD_FEATURE_GFXCLK_FMAX, 1338 - NULL, 1341 + &min_value, 1339 1342 &max_value); 1340 1343 size += sysfs_emit_at(buf, size, "SCLK_OFFSET: %7dMhz %10uMhz\n", 1341 1344 min_value, max_value); ··· 1614 1625 1615 1626 out: 1616 1627 adev->unique_id = ((uint64_t)upper32 << 32) | lower32; 1628 + } 1629 + 1630 + static int smu_v14_0_2_get_fan_speed_pwm(struct smu_context *smu, 1631 + uint32_t *speed) 1632 + { 1633 + int ret; 1634 + 1635 + if (!speed) 1636 + return -EINVAL; 1637 + 1638 + ret = smu_v14_0_2_get_smu_metrics_data(smu, 1639 + METRICS_CURR_FANPWM, 1640 + speed); 1641 + if (ret) { 1642 + dev_err(smu->adev->dev, "Failed to get fan speed(PWM)!"); 1643 + return ret; 1644 + } 1645 + 1646 + /* Convert the PMFW output which is in percent to pwm(255) based */ 1647 + *speed = min(*speed * 255 / 100, (uint32_t)255); 1648 + 1649 + return 0; 1650 + } 1651 + 1652 + static int smu_v14_0_2_get_fan_speed_rpm(struct smu_context *smu, 1653 + uint32_t *speed) 1654 + { 1655 + if (!speed) 1656 + return -EINVAL; 1657 + 1658 + return smu_v14_0_2_get_smu_metrics_data(smu, 1659 + METRICS_CURR_FANSPEED, 1660 + speed); 1617 1661 } 1618 1662 1619 1663 static int smu_v14_0_2_get_power_limit(struct smu_context *smu, ··· 2439 2417 return -ENOTSUPP; 2440 2418 } 2441 2419 2442 - for (i = 0; i < size; i += 2) { 2443 - if (i + 2 > size) { 2444 - dev_info(adev->dev, "invalid number of input parameters %d\n", size); 2445 - return -EINVAL; 2446 - } 2447 - 2448 - switch (input[i]) { 2449 - case 1: 2450 - smu_v14_0_2_get_od_setting_limits(smu, 2451 - PP_OD_FEATURE_GFXCLK_FMAX, 2452 - &minimum, 2453 - &maximum); 2454 - if (input[i + 1] < minimum || 2455 - input[i + 1] > maximum) { 2456 - dev_info(adev->dev, "GfxclkFmax (%ld) must be within [%u, %u]!\n", 2457 - input[i + 1], minimum, maximum); 2458 - return -EINVAL; 2459 - } 2460 - 2461 - od_table->OverDriveTable.GfxclkFoffset = input[i + 1]; 2462 - od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_GFXCLK_BIT; 2463 - break; 2464 - 2465 - default: 2466 - dev_info(adev->dev, "Invalid SCLK_VDDC_TABLE index: %ld\n", input[i]); 2467 - dev_info(adev->dev, "Supported indices: [0:min,1:max]\n"); 2468 - return -EINVAL; 2469 - } 2420 + if (size != 1) { 2421 + dev_info(adev->dev, "invalid number of input parameters %d\n", size); 2422 + return -EINVAL; 2470 2423 } 2471 2424 2425 + smu_v14_0_2_get_od_setting_limits(smu, 2426 + PP_OD_FEATURE_GFXCLK_FMAX, 2427 + &minimum, 2428 + &maximum); 2429 + if (input[0] < minimum || 2430 + input[0] > maximum) { 2431 + dev_info(adev->dev, "GfxclkFoffset must be within [%d, %u]!\n", 2432 + minimum, maximum); 2433 + return -EINVAL; 2434 + } 2435 + 2436 + od_table->OverDriveTable.GfxclkFoffset = input[0]; 2437 + od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_GFXCLK_BIT; 2472 2438 break; 2473 2439 2474 2440 case PP_OD_EDIT_MCLK_VDDC_TABLE: ··· 2814 2804 .set_performance_level = smu_v14_0_set_performance_level, 2815 2805 .gfx_off_control = smu_v14_0_gfx_off_control, 2816 2806 .get_unique_id = smu_v14_0_2_get_unique_id, 2807 + .get_fan_speed_pwm = smu_v14_0_2_get_fan_speed_pwm, 2808 + .get_fan_speed_rpm = smu_v14_0_2_get_fan_speed_rpm, 2817 2809 .get_power_limit = smu_v14_0_2_get_power_limit, 2818 2810 .set_power_limit = smu_v14_0_2_set_power_limit, 2819 2811 .get_power_profile_mode = smu_v14_0_2_get_power_profile_mode,

+1 -1

drivers/gpu/drm/radeon/radeon_vce.c

··· 557 557 { 558 558 int session_idx = -1; 559 559 bool destroyed = false, created = false, allocated = false; 560 - uint32_t tmp, handle = 0; 560 + uint32_t tmp = 0, handle = 0; 561 561 uint32_t *size = &tmp; 562 562 int i, r = 0; 563 563

+9 -2

drivers/gpu/drm/scheduler/sched_entity.c

··· 259 259 struct drm_sched_fence *s_fence = job->s_fence; 260 260 261 261 dma_fence_get(&s_fence->finished); 262 - if (!prev || dma_fence_add_callback(prev, &job->finish_cb, 263 - drm_sched_entity_kill_jobs_cb)) 262 + if (!prev || 263 + dma_fence_add_callback(prev, &job->finish_cb, 264 + drm_sched_entity_kill_jobs_cb)) { 265 + /* 266 + * Adding callback above failed. 267 + * dma_fence_put() checks for NULL. 268 + */ 269 + dma_fence_put(prev); 264 270 drm_sched_entity_kill_jobs_cb(NULL, &job->finish_cb); 271 + } 265 272 266 273 prev = &s_fence->finished; 267 274 }

+20 -3

drivers/gpu/drm/v3d/v3d_sched.c

··· 226 226 struct dma_fence *fence; 227 227 unsigned long irqflags; 228 228 229 - if (unlikely(job->base.base.s_fence->finished.error)) 229 + if (unlikely(job->base.base.s_fence->finished.error)) { 230 + spin_lock_irqsave(&v3d->job_lock, irqflags); 231 + v3d->bin_job = NULL; 232 + spin_unlock_irqrestore(&v3d->job_lock, irqflags); 230 233 return NULL; 234 + } 231 235 232 236 /* Lock required around bin_job update vs 233 237 * v3d_overflow_mem_work(). ··· 285 281 struct drm_device *dev = &v3d->drm; 286 282 struct dma_fence *fence; 287 283 288 - if (unlikely(job->base.base.s_fence->finished.error)) 284 + if (unlikely(job->base.base.s_fence->finished.error)) { 285 + v3d->render_job = NULL; 289 286 return NULL; 287 + } 290 288 291 289 v3d->render_job = job; 292 290 ··· 333 327 struct drm_device *dev = &v3d->drm; 334 328 struct dma_fence *fence; 335 329 330 + if (unlikely(job->base.base.s_fence->finished.error)) { 331 + v3d->tfu_job = NULL; 332 + return NULL; 333 + } 334 + 335 + v3d->tfu_job = job; 336 + 336 337 fence = v3d_fence_create(v3d, V3D_TFU); 337 338 if (IS_ERR(fence)) 338 339 return NULL; 339 340 340 - v3d->tfu_job = job; 341 341 if (job->base.irq_fence) 342 342 dma_fence_put(job->base.irq_fence); 343 343 job->base.irq_fence = dma_fence_get(fence); ··· 380 368 struct drm_device *dev = &v3d->drm; 381 369 struct dma_fence *fence; 382 370 int i, csd_cfg0_reg; 371 + 372 + if (unlikely(job->base.base.s_fence->finished.error)) { 373 + v3d->csd_job = NULL; 374 + return NULL; 375 + } 383 376 384 377 v3d->csd_job = job; 385 378

-2

drivers/gpu/drm/xe/xe_bo.h

··· 341 341 return round_down(max / 2, PAGE_SIZE); 342 342 } 343 343 344 - #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST) 345 344 /** 346 345 * xe_bo_is_mem_type - Whether the bo currently resides in the given 347 346 * TTM memory type ··· 354 355 xe_bo_assert_held(bo); 355 356 return bo->ttm.resource->mem_type == mem_type; 356 357 } 357 - #endif 358 358 #endif

+1 -1

drivers/gpu/drm/xe/xe_dma_buf.c

··· 58 58 * 1) Avoid pinning in a placement not accessible to some importers. 59 59 * 2) Pinning in VRAM requires PIN accounting which is a to-do. 60 60 */ 61 - if (xe_bo_is_pinned(bo) && bo->ttm.resource->placement != XE_PL_TT) { 61 + if (xe_bo_is_pinned(bo) && !xe_bo_is_mem_type(bo, XE_PL_TT)) { 62 62 drm_dbg(&xe->drm, "Can't migrate pinned bo for dma-buf pin.\n"); 63 63 return -EINVAL; 64 64 }

+6

drivers/gpu/host1x/dev.c

··· 361 361 return true; 362 362 } 363 363 364 + /* 365 + * Returns ERR_PTR on failure, NULL if the translation is IDENTITY, otherwise a 366 + * valid paging domain. 367 + */ 364 368 static struct iommu_domain *host1x_iommu_attach(struct host1x *host) 365 369 { 366 370 struct iommu_domain *domain = iommu_get_domain_for_dev(host->dev); ··· 389 385 * Similarly, if host1x is already attached to an IOMMU (via the DMA 390 386 * API), don't try to attach again. 391 387 */ 388 + if (domain && domain->type == IOMMU_DOMAIN_IDENTITY) 389 + domain = NULL; 392 390 if (!host1x_wants_iommu(host) || domain) 393 391 return domain; 394 392

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