tjh.dev / kernel
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drm/amdgpu: add mutex to protect ras shared memory

Add mutex to protect ras shared memory.

v2:
Add TA_RAS_COMMAND__TRIGGER_ERROR command call
status check.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

YiPeng Chai and committed by
Alex Deucher b3fb79cd 0e2c796b

+86 -40
+83 -40
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
··· 1591 1591 } 1592 1592 } 1593 1593 1594 + static int psp_ras_send_cmd(struct psp_context *psp, 1595 + enum ras_command cmd_id, void *in, void *out) 1596 + { 1597 + struct ta_ras_shared_memory *ras_cmd; 1598 + uint32_t cmd = cmd_id; 1599 + int ret = 0; 1600 + 1601 + if (!in) 1602 + return -EINVAL; 1603 + 1604 + mutex_lock(&psp->ras_context.mutex); 1605 + ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; 1606 + memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory)); 1607 + 1608 + switch (cmd) { 1609 + case TA_RAS_COMMAND__ENABLE_FEATURES: 1610 + case TA_RAS_COMMAND__DISABLE_FEATURES: 1611 + memcpy(&ras_cmd->ras_in_message, 1612 + in, sizeof(ras_cmd->ras_in_message)); 1613 + break; 1614 + case TA_RAS_COMMAND__TRIGGER_ERROR: 1615 + memcpy(&ras_cmd->ras_in_message.trigger_error, 1616 + in, sizeof(ras_cmd->ras_in_message.trigger_error)); 1617 + break; 1618 + case TA_RAS_COMMAND__QUERY_ADDRESS: 1619 + memcpy(&ras_cmd->ras_in_message.address, 1620 + in, sizeof(ras_cmd->ras_in_message.address)); 1621 + break; 1622 + default: 1623 + dev_err(psp->adev->dev, "Invalid ras cmd id: %u\n", cmd); 1624 + ret = -EINVAL; 1625 + goto err_out; 1626 + } 1627 + 1628 + ras_cmd->cmd_id = cmd; 1629 + ret = psp_ras_invoke(psp, ras_cmd->cmd_id); 1630 + 1631 + switch (cmd) { 1632 + case TA_RAS_COMMAND__TRIGGER_ERROR: 1633 + if (ret || psp->cmd_buf_mem->resp.status) 1634 + ret = -EINVAL; 1635 + else if (out) 1636 + memcpy(out, &ras_cmd->ras_status, sizeof(ras_cmd->ras_status)); 1637 + break; 1638 + case TA_RAS_COMMAND__QUERY_ADDRESS: 1639 + if (ret || ras_cmd->ras_status || psp->cmd_buf_mem->resp.status) 1640 + ret = -EINVAL; 1641 + else if (out) 1642 + memcpy(out, 1643 + &ras_cmd->ras_out_message.address, 1644 + sizeof(ras_cmd->ras_out_message.address)); 1645 + break; 1646 + default: 1647 + break; 1648 + } 1649 + 1650 + err_out: 1651 + mutex_unlock(&psp->ras_context.mutex); 1652 + 1653 + return ret; 1654 + } 1655 + 1594 1656 int psp_ras_invoke(struct psp_context *psp, uint32_t ta_cmd_id) 1595 1657 { 1596 1658 struct ta_ras_shared_memory *ras_cmd; ··· 1694 1632 int psp_ras_enable_features(struct psp_context *psp, 1695 1633 union ta_ras_cmd_input *info, bool enable) 1696 1634 { 1697 - struct ta_ras_shared_memory *ras_cmd; 1635 + enum ras_command cmd_id; 1698 1636 int ret; 1699 1637 1700 - if (!psp->ras_context.context.initialized) 1638 + if (!psp->ras_context.context.initialized || !info) 1701 1639 return -EINVAL; 1702 1640 1703 - ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; 1704 - memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory)); 1705 - 1706 - if (enable) 1707 - ras_cmd->cmd_id = TA_RAS_COMMAND__ENABLE_FEATURES; 1708 - else 1709 - ras_cmd->cmd_id = TA_RAS_COMMAND__DISABLE_FEATURES; 1710 - 1711 - ras_cmd->ras_in_message = *info; 1712 - 1713 - ret = psp_ras_invoke(psp, ras_cmd->cmd_id); 1641 + cmd_id = enable ? 1642 + TA_RAS_COMMAND__ENABLE_FEATURES : TA_RAS_COMMAND__DISABLE_FEATURES; 1643 + ret = psp_ras_send_cmd(psp, cmd_id, info, NULL); 1714 1644 if (ret) 1715 1645 return -EINVAL; 1716 1646 ··· 1725 1671 ret = psp_ta_unload(psp, &psp->ras_context.context); 1726 1672 1727 1673 psp->ras_context.context.initialized = false; 1674 + 1675 + mutex_destroy(&psp->ras_context.mutex); 1728 1676 1729 1677 return ret; 1730 1678 } ··· 1812 1756 1813 1757 ret = psp_ta_load(psp, &psp->ras_context.context); 1814 1758 1815 - if (!ret && !ras_cmd->ras_status) 1759 + if (!ret && !ras_cmd->ras_status) { 1816 1760 psp->ras_context.context.initialized = true; 1817 - else { 1761 + mutex_init(&psp->ras_context.mutex); 1762 + } else { 1818 1763 if (ras_cmd->ras_status) 1819 1764 dev_warn(adev->dev, "RAS Init Status: 0x%X\n", ras_cmd->ras_status); 1820 1765 ··· 1829 1772 int psp_ras_trigger_error(struct psp_context *psp, 1830 1773 struct ta_ras_trigger_error_input *info, uint32_t instance_mask) 1831 1774 { 1832 - struct ta_ras_shared_memory *ras_cmd; 1833 1775 struct amdgpu_device *adev = psp->adev; 1834 1776 int ret; 1835 1777 uint32_t dev_mask; 1778 + uint32_t ras_status = 0; 1836 1779 1837 - if (!psp->ras_context.context.initialized) 1780 + if (!psp->ras_context.context.initialized || !info) 1838 1781 return -EINVAL; 1839 1782 1840 1783 switch (info->block_id) { ··· 1858 1801 dev_mask &= AMDGPU_RAS_INST_MASK; 1859 1802 info->sub_block_index |= dev_mask; 1860 1803 1861 - ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; 1862 - memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory)); 1863 - 1864 - ras_cmd->cmd_id = TA_RAS_COMMAND__TRIGGER_ERROR; 1865 - ras_cmd->ras_in_message.trigger_error = *info; 1866 - 1867 - ret = psp_ras_invoke(psp, ras_cmd->cmd_id); 1804 + ret = psp_ras_send_cmd(psp, 1805 + TA_RAS_COMMAND__TRIGGER_ERROR, info, &ras_status); 1868 1806 if (ret) 1869 1807 return -EINVAL; 1870 1808 ··· 1869 1817 if (amdgpu_ras_intr_triggered()) 1870 1818 return 0; 1871 1819 1872 - if (ras_cmd->ras_status == TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED) 1820 + if (ras_status == TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED) 1873 1821 return -EACCES; 1874 - else if (ras_cmd->ras_status) 1822 + else if (ras_status) 1875 1823 return -EINVAL; 1876 1824 1877 1825 return 0; ··· 1881 1829 struct ta_ras_query_address_input *addr_in, 1882 1830 struct ta_ras_query_address_output *addr_out) 1883 1831 { 1884 - struct ta_ras_shared_memory *ras_cmd; 1885 1832 int ret; 1886 1833 1887 - if (!psp->ras_context.context.initialized) 1834 + if (!psp->ras_context.context.initialized || 1835 + !addr_in || !addr_out) 1888 1836 return -EINVAL; 1889 1837 1890 - ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; 1891 - memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory)); 1838 + ret = psp_ras_send_cmd(psp, 1839 + TA_RAS_COMMAND__QUERY_ADDRESS, addr_in, addr_out); 1892 1840 1893 - ras_cmd->cmd_id = TA_RAS_COMMAND__QUERY_ADDRESS; 1894 - ras_cmd->ras_in_message.address = *addr_in; 1895 - 1896 - ret = psp_ras_invoke(psp, ras_cmd->cmd_id); 1897 - if (ret || ras_cmd->ras_status || psp->cmd_buf_mem->resp.status) 1898 - return -EINVAL; 1899 - 1900 - *addr_out = ras_cmd->ras_out_message.address; 1901 - 1902 - return 0; 1841 + return ret; 1903 1842 } 1904 1843 // ras end 1905 1844
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
··· 200 200 struct psp_ras_context { 201 201 struct ta_context context; 202 202 struct amdgpu_ras *ras; 203 + struct mutex mutex; 203 204 }; 204 205 205 206 #define MEM_TRAIN_SYSTEM_SIGNATURE 0x54534942
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c
··· 348 348 349 349 context->session_id = ta_id; 350 350 351 + mutex_lock(&psp->ras_context.mutex); 351 352 ret = prep_ta_mem_context(&context->mem_context, shared_buf, shared_buf_len); 352 353 if (ret) 353 354 goto err_free_shared_buf; ··· 367 366 ret = -EFAULT; 368 367 369 368 err_free_shared_buf: 369 + mutex_unlock(&psp->ras_context.mutex); 370 370 kfree(shared_buf); 371 371 372 372 return ret;