Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mmc-v6.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC fixes from Ulf Hansson:
"MMC core:
- Fix broken cache-flush support for Micron eMMCs
- Revert 'mmc: core: Capture correct oemid-bits for eMMC cards'
MMC host:
- sdhci_am654: Fix TAP value parsing for legacy speed mode
- sdhci-pci-gli: Fix support for ASPM mode for GL9755/GL9750
- vub300: Fix an error path in probe"
* tag 'mmc-v6.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: sdhci-pci-gli: GL9750: Mask the replay timer timeout of AER
mmc: sdhci-pci-gli: GL9755: Mask the replay timer timeout of AER
Revert "mmc: core: Capture correct oemid-bits for eMMC cards"
mmc: vub300: fix an error code
mmc: Add quirk MMC_QUIRK_BROKEN_CACHE_FLUSH for Micron eMMC Q2J54A
mmc: sdhci_am654: fix start loop index for TAP value parsing
+38
-8
+3
-1
drivers/mmc/core/block.c
+3
-1
drivers/mmc/core/block.c
···
2381
2381
}
2382
2382
ret = mmc_blk_cqe_issue_flush(mq, req);
2383
2383
break;
2384
-
case REQ_OP_READ:
2385
2384
case REQ_OP_WRITE:
2385
+
card->written_flag = true;
2386
+
fallthrough;
2387
+
case REQ_OP_READ:
2386
2388
if (host->cqe_enabled)
2387
2389
ret = mmc_blk_cqe_issue_rw_rq(mq, req);
2388
2390
else
+4
drivers/mmc/core/card.h
+4
drivers/mmc/core/card.h
+7
-3
drivers/mmc/core/mmc.c
+7
-3
drivers/mmc/core/mmc.c
···
104
104
case 3: /* MMC v3.1 - v3.3 */
105
105
case 4: /* MMC v4 */
106
106
card->cid.manfid = UNSTUFF_BITS(resp, 120, 8);
107
-
card->cid.oemid = UNSTUFF_BITS(resp, 104, 8);
107
+
card->cid.oemid = UNSTUFF_BITS(resp, 104, 16);
108
108
card->cid.prod_name[0] = UNSTUFF_BITS(resp, 96, 8);
109
109
card->cid.prod_name[1] = UNSTUFF_BITS(resp, 88, 8);
110
110
card->cid.prod_name[2] = UNSTUFF_BITS(resp, 80, 8);
···
2086
2086
{
2087
2087
int err = 0;
2088
2088
2089
+
if (mmc_card_broken_cache_flush(host->card) && !host->card->written_flag)
2090
+
return 0;
2091
+
2089
2092
if (_mmc_cache_enabled(host)) {
2090
2093
err = mmc_switch(host->card, EXT_CSD_CMD_SET_NORMAL,
2091
2094
EXT_CSD_FLUSH_CACHE, 1,
2092
2095
CACHE_FLUSH_TIMEOUT_MS);
2093
2096
if (err)
2094
-
pr_err("%s: cache flush error %d\n",
2095
-
mmc_hostname(host), err);
2097
+
pr_err("%s: cache flush error %d\n", mmc_hostname(host), err);
2098
+
else
2099
+
host->card->written_flag = false;
2096
2100
}
2097
2101
2098
2102
return err;
+4
-3
drivers/mmc/core/quirks.h
+4
-3
drivers/mmc/core/quirks.h
···
110
110
MMC_QUIRK_TRIM_BROKEN),
111
111
112
112
/*
113
-
* Micron MTFC4GACAJCN-1M advertises TRIM but it does not seems to
114
-
* support being used to offload WRITE_ZEROES.
113
+
* Micron MTFC4GACAJCN-1M supports TRIM but does not appear to support
114
+
* WRITE_ZEROES offloading. It also supports caching, but the cache can
115
+
* only be flushed after a write has occurred.
115
116
*/
116
117
MMC_FIXUP("Q2J54A", CID_MANFID_MICRON, 0x014e, add_quirk_mmc,
117
-
MMC_QUIRK_TRIM_BROKEN),
118
+
MMC_QUIRK_TRIM_BROKEN | MMC_QUIRK_BROKEN_CACHE_FLUSH),
118
119
119
120
/*
120
121
* Kingston EMMC04G-M627 advertises TRIM but it does not seems to
+16
drivers/mmc/host/sdhci-pci-gli.c
+16
drivers/mmc/host/sdhci-pci-gli.c
···
28
28
#define PCI_GLI_9750_PM_CTRL 0xFC
29
29
#define PCI_GLI_9750_PM_STATE GENMASK(1, 0)
30
30
31
+
#define PCI_GLI_9750_CORRERR_MASK 0x214
32
+
#define PCI_GLI_9750_CORRERR_MASK_REPLAY_TIMER_TIMEOUT BIT(12)
33
+
31
34
#define SDHCI_GLI_9750_CFG2 0x848
32
35
#define SDHCI_GLI_9750_CFG2_L1DLY GENMASK(28, 24)
33
36
#define GLI_9750_CFG2_L1DLY_VALUE 0x1F
···
154
151
155
152
#define PCI_GLI_9755_PM_CTRL 0xFC
156
153
#define PCI_GLI_9755_PM_STATE GENMASK(1, 0)
154
+
155
+
#define PCI_GLI_9755_CORRERR_MASK 0x214
156
+
#define PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT BIT(12)
157
157
158
158
#define SDHCI_GLI_9767_GM_BURST_SIZE 0x510
159
159
#define SDHCI_GLI_9767_GM_BURST_SIZE_AXI_ALWAYS_SET BIT(8)
···
567
561
value &= ~PCI_GLI_9750_PM_STATE;
568
562
pci_write_config_dword(pdev, PCI_GLI_9750_PM_CTRL, value);
569
563
564
+
/* mask the replay timer timeout of AER */
565
+
pci_read_config_dword(pdev, PCI_GLI_9750_CORRERR_MASK, &value);
566
+
value |= PCI_GLI_9750_CORRERR_MASK_REPLAY_TIMER_TIMEOUT;
567
+
pci_write_config_dword(pdev, PCI_GLI_9750_CORRERR_MASK, value);
568
+
570
569
gl9750_wt_off(host);
571
570
}
572
571
···
780
769
pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value);
781
770
value &= ~PCI_GLI_9755_PM_STATE;
782
771
pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value);
772
+
773
+
/* mask the replay timer timeout of AER */
774
+
pci_read_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, &value);
775
+
value |= PCI_GLI_9755_CORRERR_MASK_REPLAY_TIMER_TIMEOUT;
776
+
pci_write_config_dword(pdev, PCI_GLI_9755_CORRERR_MASK, value);
783
777
784
778
gl9755_wt_off(pdev);
785
779
}
+1
-1
drivers/mmc/host/sdhci_am654.c
+1
-1
drivers/mmc/host/sdhci_am654.c
+1
drivers/mmc/host/vub300.c
+1
drivers/mmc/host/vub300.c
+2
include/linux/mmc/card.h
+2
include/linux/mmc/card.h
···
295
295
#define MMC_QUIRK_BROKEN_HPI (1<<13) /* Disable broken HPI support */
296
296
#define MMC_QUIRK_BROKEN_SD_DISCARD (1<<14) /* Disable broken SD discard support */
297
297
#define MMC_QUIRK_BROKEN_SD_CACHE (1<<15) /* Disable broken SD cache support */
298
+
#define MMC_QUIRK_BROKEN_CACHE_FLUSH (1<<16) /* Don't flush cache until the write has occurred */
298
299
300
+
bool written_flag; /* Indicates eMMC has been written since power on */
299
301
bool reenable_cmdq; /* Re-enable Command Queue */
300
302
301
303
unsigned int erase_size; /* erase size in sectors */