tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'mips_fixes_5.9_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS fixes from Thomas Bogendoerfer:

- fixed FP register access on Loongsoon-3

- added missing 1074 cpu handling

- fixed Loongson2ef build error

* tag 'mips_fixes_5.9_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: BCM47XX: Remove the needless check with the 1074K
MIPS: Add the missing 'CPU_1074K' into __get_cpu_type()
MIPS: Loongson2ef: Disable Loongson MMI instructions
MIPS: Loongson-3: Fix fp register access if MSA enabled

Linus Torvalds b463b6f6 782d1222

+14 -17
+1 -1
arch/mips/bcm47xx/setup.c
··· 148 148 { 149 149 struct cpuinfo_mips *c = &current_cpu_data; 150 150 151 - if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) { 151 + if (c->cputype == CPU_74K) { 152 152 pr_info("Using bcma bus\n"); 153 153 #ifdef CONFIG_BCM47XX_BCMA 154 154 bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
+1
arch/mips/include/asm/cpu-type.h
··· 47 47 case CPU_34K: 48 48 case CPU_1004K: 49 49 case CPU_74K: 50 + case CPU_1074K: 50 51 case CPU_M14KC: 51 52 case CPU_M14KEC: 52 53 case CPU_INTERAPTIV:
+4
arch/mips/loongson2ef/Platform
··· 44 44 endif 45 45 endif 46 46 47 + # Some -march= flags enable MMI instructions, and GCC complains about that 48 + # support being enabled alongside -msoft-float. Thus explicitly disable MMI. 49 + cflags-y += $(call cc-option,-mno-loongson-mmi) 50 + 47 51 # 48 52 # Loongson Machines' Support 49 53 #
+8 -16
arch/mips/loongson64/cop2-ex.c
··· 95 95 if (res) 96 96 goto fault; 97 97 98 - set_fpr64(current->thread.fpu.fpr, 99 - insn.loongson3_lswc2_format.rt, value); 100 - set_fpr64(current->thread.fpu.fpr, 101 - insn.loongson3_lswc2_format.rq, value_next); 98 + set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0, value); 99 + set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0, value_next); 102 100 compute_return_epc(regs); 103 101 own_fpu(1); 104 102 } ··· 128 130 goto sigbus; 129 131 130 132 lose_fpu(1); 131 - value_next = get_fpr64(current->thread.fpu.fpr, 132 - insn.loongson3_lswc2_format.rq); 133 + value_next = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0); 133 134 134 135 StoreDW(addr + 8, value_next, res); 135 136 if (res) 136 137 goto fault; 137 138 138 - value = get_fpr64(current->thread.fpu.fpr, 139 - insn.loongson3_lswc2_format.rt); 139 + value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0); 140 140 141 141 StoreDW(addr, value, res); 142 142 if (res) ··· 200 204 if (res) 201 205 goto fault; 202 206 203 - set_fpr64(current->thread.fpu.fpr, 204 - insn.loongson3_lsdc2_format.rt, value); 207 + set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value); 205 208 compute_return_epc(regs); 206 209 own_fpu(1); 207 210 ··· 216 221 if (res) 217 222 goto fault; 218 223 219 - set_fpr64(current->thread.fpu.fpr, 220 - insn.loongson3_lsdc2_format.rt, value); 224 + set_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value); 221 225 compute_return_epc(regs); 222 226 own_fpu(1); 223 227 break; ··· 280 286 goto sigbus; 281 287 282 288 lose_fpu(1); 283 - value = get_fpr64(current->thread.fpu.fpr, 284 - insn.loongson3_lsdc2_format.rt); 289 + value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0); 285 290 286 291 StoreW(addr, value, res); 287 292 if (res) ··· 298 305 goto sigbus; 299 306 300 307 lose_fpu(1); 301 - value = get_fpr64(current->thread.fpu.fpr, 302 - insn.loongson3_lsdc2_format.rt); 308 + value = get_fpr64(&current->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0); 303 309 304 310 StoreDW(addr, value, res); 305 311 if (res)