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lib/crc: riscv: Migrate optimized CRC code into lib/crc/

Move the riscv-optimized CRC code from arch/riscv/lib/crc* into its new
location in lib/crc/riscv/, and wire it up in the new way. This new way
of organizing the CRC code eliminates the need to artificially split the
code for each CRC variant into separate arch and generic modules,
enabling better inlining and dead code elimination. For more details,
see "lib/crc: Prepare for arch-optimized code in subdirs of lib/crc/".

Reviewed-by: "Martin K. Petersen" <martin.petersen@oracle.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: "Jason A. Donenfeld" <Jason@zx2c4.com>
Link: https://lore.kernel.org/r/20250607200454.73587-9-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>

+13 -38
-3
arch/riscv/Kconfig
··· 24 24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 25 25 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 26 26 select ARCH_HAS_BINFMT_FLAT 27 - select ARCH_HAS_CRC32 if RISCV_ISA_ZBC 28 - select ARCH_HAS_CRC64 if 64BIT && RISCV_ISA_ZBC 29 - select ARCH_HAS_CRC_T10DIF if RISCV_ISA_ZBC 30 27 select ARCH_HAS_CURRENT_STACK_POINTER 31 28 select ARCH_HAS_DEBUG_VIRTUAL if MMU 32 29 select ARCH_HAS_DEBUG_VM_PGTABLE
-6
arch/riscv/lib/Makefile
··· 16 16 lib-$(CONFIG_MMU) += uaccess.o 17 17 lib-$(CONFIG_64BIT) += tishift.o 18 18 lib-$(CONFIG_RISCV_ISA_ZICBOZ) += clear_page.o 19 - obj-$(CONFIG_CRC32_ARCH) += crc32-riscv.o 20 - crc32-riscv-y := crc32.o crc32_msb.o crc32_lsb.o 21 - obj-$(CONFIG_CRC64_ARCH) += crc64-riscv.o 22 - crc64-riscv-y := crc64.o crc64_msb.o crc64_lsb.o 23 - obj-$(CONFIG_CRC_T10DIF_ARCH) += crc-t10dif-riscv.o 24 - crc-t10dif-riscv-y := crc-t10dif.o crc16_msb.o 25 19 obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o 26 20 lib-$(CONFIG_RISCV_ISA_V) += xor.o 27 21 lib-$(CONFIG_RISCV_ISA_V) += riscv_v_helpers.o
arch/riscv/lib/crc-clmul-consts.h lib/crc/riscv/crc-clmul-consts.h
arch/riscv/lib/crc-clmul-template.h lib/crc/riscv/crc-clmul-template.h
arch/riscv/lib/crc-clmul.h lib/crc/riscv/crc-clmul.h
+1 -7
arch/riscv/lib/crc-t10dif.c lib/crc/riscv/crc-t10dif.h
··· 7 7 8 8 #include <asm/hwcap.h> 9 9 #include <asm/alternative-macros.h> 10 - #include <linux/crc-t10dif.h> 11 - #include <linux/module.h> 12 10 13 11 #include "crc-clmul.h" 14 12 15 - u16 crc_t10dif_arch(u16 crc, const u8 *p, size_t len) 13 + static inline u16 crc_t10dif_arch(u16 crc, const u8 *p, size_t len) 16 14 { 17 15 if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC)) 18 16 return crc16_msb_clmul(crc, p, len, &crc16_msb_0x8bb7_consts); 19 17 return crc_t10dif_generic(crc, p, len); 20 18 } 21 - EXPORT_SYMBOL(crc_t10dif_arch); 22 - 23 - MODULE_DESCRIPTION("RISC-V optimized CRC-T10DIF function"); 24 - MODULE_LICENSE("GPL");
arch/riscv/lib/crc16_msb.c lib/crc/riscv/crc16_msb.c
+4 -13
arch/riscv/lib/crc32.c lib/crc/riscv/crc32.h
··· 7 7 8 8 #include <asm/hwcap.h> 9 9 #include <asm/alternative-macros.h> 10 - #include <linux/crc32.h> 11 - #include <linux/module.h> 12 10 13 11 #include "crc-clmul.h" 14 12 15 - u32 crc32_le_arch(u32 crc, const u8 *p, size_t len) 13 + static inline u32 crc32_le_arch(u32 crc, const u8 *p, size_t len) 16 14 { 17 15 if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC)) 18 16 return crc32_lsb_clmul(crc, p, len, 19 17 &crc32_lsb_0xedb88320_consts); 20 18 return crc32_le_base(crc, p, len); 21 19 } 22 - EXPORT_SYMBOL(crc32_le_arch); 23 20 24 - u32 crc32_be_arch(u32 crc, const u8 *p, size_t len) 21 + static inline u32 crc32_be_arch(u32 crc, const u8 *p, size_t len) 25 22 { 26 23 if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC)) 27 24 return crc32_msb_clmul(crc, p, len, 28 25 &crc32_msb_0x04c11db7_consts); 29 26 return crc32_be_base(crc, p, len); 30 27 } 31 - EXPORT_SYMBOL(crc32_be_arch); 32 28 33 - u32 crc32c_arch(u32 crc, const u8 *p, size_t len) 29 + static inline u32 crc32c_arch(u32 crc, const u8 *p, size_t len) 34 30 { 35 31 if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC)) 36 32 return crc32_lsb_clmul(crc, p, len, 37 33 &crc32_lsb_0x82f63b78_consts); 38 34 return crc32c_base(crc, p, len); 39 35 } 40 - EXPORT_SYMBOL(crc32c_arch); 41 36 42 - u32 crc32_optimizations(void) 37 + static inline u32 crc32_optimizations_arch(void) 43 38 { 44 39 if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC)) 45 40 return CRC32_LE_OPTIMIZATION | ··· 42 47 CRC32C_OPTIMIZATION; 43 48 return 0; 44 49 } 45 - EXPORT_SYMBOL(crc32_optimizations); 46 - 47 - MODULE_DESCRIPTION("RISC-V optimized CRC32 functions"); 48 - MODULE_LICENSE("GPL");
arch/riscv/lib/crc32_lsb.c lib/crc/riscv/crc32_lsb.c
arch/riscv/lib/crc32_msb.c lib/crc/riscv/crc32_msb.c
+2 -9
arch/riscv/lib/crc64.c lib/crc/riscv/crc64.h
··· 7 7 8 8 #include <asm/hwcap.h> 9 9 #include <asm/alternative-macros.h> 10 - #include <linux/crc64.h> 11 - #include <linux/module.h> 12 10 13 11 #include "crc-clmul.h" 14 12 15 - u64 crc64_be_arch(u64 crc, const u8 *p, size_t len) 13 + static inline u64 crc64_be_arch(u64 crc, const u8 *p, size_t len) 16 14 { 17 15 if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC)) 18 16 return crc64_msb_clmul(crc, p, len, 19 17 &crc64_msb_0x42f0e1eba9ea3693_consts); 20 18 return crc64_be_generic(crc, p, len); 21 19 } 22 - EXPORT_SYMBOL(crc64_be_arch); 23 20 24 - u64 crc64_nvme_arch(u64 crc, const u8 *p, size_t len) 21 + static inline u64 crc64_nvme_arch(u64 crc, const u8 *p, size_t len) 25 22 { 26 23 if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC)) 27 24 return crc64_lsb_clmul(crc, p, len, 28 25 &crc64_lsb_0x9a6c9329ac4bc9b5_consts); 29 26 return crc64_nvme_generic(crc, p, len); 30 27 } 31 - EXPORT_SYMBOL(crc64_nvme_arch); 32 - 33 - MODULE_DESCRIPTION("RISC-V optimized CRC64 functions"); 34 - MODULE_LICENSE("GPL");
arch/riscv/lib/crc64_lsb.c lib/crc/riscv/crc64_lsb.c
arch/riscv/lib/crc64_msb.c lib/crc/riscv/crc64_msb.c
+3
lib/crc/Kconfig
··· 53 53 default y if ARM && KERNEL_MODE_NEON 54 54 default y if ARM64 && KERNEL_MODE_NEON 55 55 default y if PPC64 && ALTIVEC 56 + default y if RISCV && RISCV_ISA_ZBC 56 57 57 58 config CRC32 58 59 tristate ··· 73 72 default y if LOONGARCH 74 73 default y if MIPS && CPU_MIPSR6 75 74 default y if PPC64 && ALTIVEC 75 + default y if RISCV && RISCV_ISA_ZBC 76 76 77 77 config CRC64 78 78 tristate ··· 87 85 config CRC64_ARCH 88 86 bool 89 87 depends on CRC64 && CRC_OPTIMIZATIONS 88 + default y if RISCV && RISCV_ISA_ZBC && 64BIT 90 89 91 90 config CRC_OPTIMIZATIONS 92 91 bool "Enable optimized CRC implementations" if EXPERT
+3
lib/crc/Makefile
··· 16 16 crc-t10dif-$(CONFIG_ARM) += arm/crc-t10dif-core.o 17 17 crc-t10dif-$(CONFIG_ARM64) += arm64/crc-t10dif-core.o 18 18 crc-t10dif-$(CONFIG_PPC) += powerpc/crct10dif-vpmsum_asm.o 19 + crc-t10dif-$(CONFIG_RISCV) += riscv/crc16_msb.o 19 20 endif 20 21 21 22 obj-$(CONFIG_CRC32) += crc32.o ··· 26 25 crc32-$(CONFIG_ARM) += arm/crc32-core.o 27 26 crc32-$(CONFIG_ARM64) += arm64/crc32-core.o 28 27 crc32-$(CONFIG_PPC) += powerpc/crc32c-vpmsum_asm.o 28 + crc32-$(CONFIG_RISCV) += riscv/crc32_lsb.o riscv/crc32_msb.o 29 29 endif 30 30 31 31 obj-$(CONFIG_CRC64) += crc64.o 32 32 crc64-y := crc64-main.o 33 33 ifeq ($(CONFIG_CRC64_ARCH),y) 34 34 CFLAGS_crc64-main.o += -I$(src)/$(SRCARCH) 35 + crc64-$(CONFIG_RISCV) += riscv/crc64_lsb.o riscv/crc64_msb.o 35 36 endif 36 37 37 38 obj-y += tests/