Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
iio: frequency: admv4420.c: Add support for ADMV4420
Add support for K Band Downconverter with Integrated
Fractional-N PLL and VCO.
More info:
https://www.analog.com/en/products/admv4420.html
Signed-off-by: Cristian Pop <cristian.pop@analog.com>
Link: https://lore.kernel.org/r/20220223130808.13352-2-cristian.pop@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
Cristian Pop
and committed by
Jonathan Cameron
b59c0415
bfdf1635
+409
+10
drivers/iio/frequency/Kconfig
+10
drivers/iio/frequency/Kconfig
···
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To compile this driver as a module, choose M here: the
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module will be called admv1014.
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config ADMV4420
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tristate "Analog Devices ADMV4420 K Band Downconverter"
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depends on SPI
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help
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Say yes here to build support for Analog Devices K Band
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Downconverter with integrated Fractional-N PLL and VCO.
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To compile this driver as a module, choose M here: the
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module will be called admv4420.
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config ADRF6780
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tristate "Analog Devices ADRF6780 Microwave Upconverter"
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depends on SPI
+1
drivers/iio/frequency/Makefile
+1
drivers/iio/frequency/Makefile
+398
drivers/iio/frequency/admv4420.c
+398
drivers/iio/frequency/admv4420.c
···
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// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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/*
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* ADMV4420
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*
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* Copyright 2021 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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#include <linux/units.h>
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#include <asm/unaligned.h>
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/* ADMV4420 Register Map */
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#define ADMV4420_SPI_CONFIG_1 0x00
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#define ADMV4420_SPI_CONFIG_2 0x01
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#define ADMV4420_CHIPTYPE 0x03
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#define ADMV4420_PRODUCT_ID_L 0x04
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#define ADMV4420_PRODUCT_ID_H 0x05
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#define ADMV4420_SCRATCHPAD 0x0A
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#define ADMV4420_SPI_REV 0x0B
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#define ADMV4420_ENABLES 0x103
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#define ADMV4420_SDO_LEVEL 0x108
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#define ADMV4420_INT_L 0x200
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#define ADMV4420_INT_H 0x201
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#define ADMV4420_FRAC_L 0x202
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#define ADMV4420_FRAC_M 0x203
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#define ADMV4420_FRAC_H 0x204
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#define ADMV4420_MOD_L 0x208
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#define ADMV4420_MOD_M 0x209
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#define ADMV4420_MOD_H 0x20A
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#define ADMV4420_R_DIV_L 0x20C
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#define ADMV4420_R_DIV_H 0x20D
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#define ADMV4420_REFERENCE 0x20E
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#define ADMV4420_VCO_DATA_READBACK1 0x211
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#define ADMV4420_VCO_DATA_READBACK2 0x212
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#define ADMV4420_PLL_MUX_SEL 0x213
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#define ADMV4420_LOCK_DETECT 0x214
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#define ADMV4420_BAND_SELECT 0x215
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#define ADMV4420_VCO_ALC_TIMEOUT 0x216
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#define ADMV4420_VCO_MANUAL 0x217
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#define ADMV4420_ALC 0x219
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#define ADMV4420_VCO_TIMEOUT1 0x21C
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#define ADMV4420_VCO_TIMEOUT2 0x21D
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#define ADMV4420_VCO_BAND_DIV 0x21E
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#define ADMV4420_VCO_READBACK_SEL 0x21F
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#define ADMV4420_AUTOCAL 0x226
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#define ADMV4420_CP_STATE 0x22C
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#define ADMV4420_CP_BLEED_EN 0x22D
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#define ADMV4420_CP_CURRENT 0x22E
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#define ADMV4420_CP_BLEED 0x22F
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+
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#define ADMV4420_SPI_CONFIG_1_SDOACTIVE (BIT(4) | BIT(3))
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#define ADMV4420_SPI_CONFIG_1_ENDIAN (BIT(5) | BIT(2))
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#define ADMV4420_SPI_CONFIG_1_SOFTRESET (BIT(7) | BIT(1))
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+
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#define ADMV4420_REFERENCE_DIVIDE_BY_2_MASK BIT(0)
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#define ADMV4420_REFERENCE_MODE_MASK BIT(1)
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#define ADMV4420_REFERENCE_DOUBLER_MASK BIT(2)
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+
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#define ADMV4420_REF_DIVIDER_MAX_VAL GENMASK(9, 0)
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#define ADMV4420_N_COUNTER_INT_MAX GENMASK(15, 0)
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#define ADMV4420_N_COUNTER_FRAC_MAX GENMASK(23, 0)
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#define ADMV4420_N_COUNTER_MOD_MAX GENMASK(23, 0)
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#define ENABLE_PLL BIT(6)
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#define ENABLE_LO BIT(5)
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#define ENABLE_VCO BIT(3)
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#define ENABLE_IFAMP BIT(2)
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#define ENABLE_MIXER BIT(1)
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#define ENABLE_LNA BIT(0)
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+
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#define ADMV4420_SCRATCH_PAD_VAL_1 0xAD
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#define ADMV4420_SCRATCH_PAD_VAL_2 0xEA
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#define ADMV4420_REF_FREQ_HZ 50000000
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#define MAX_N_COUNTER 655360UL
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#define MAX_R_DIVIDER 1024
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#define ADMV4420_DEFAULT_LO_FREQ_HZ 16750000000ULL
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enum admv4420_mux_sel {
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ADMV4420_LOW = 0,
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ADMV4420_LOCK_DTCT = 1,
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ADMV4420_R_COUNTER_PER_2 = 4,
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ADMV4420_N_CONUTER_PER_2 = 5,
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ADMV4420_HIGH = 8,
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};
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struct admv4420_reference_block {
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bool doubler_en;
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bool divide_by_2_en;
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bool ref_single_ended;
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u32 divider;
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};
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struct admv4420_n_counter {
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u32 int_val;
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u32 frac_val;
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u32 mod_val;
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u32 n_counter;
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};
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struct admv4420_state {
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struct spi_device *spi;
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struct regmap *regmap;
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u64 vco_freq_hz;
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u64 lo_freq_hz;
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struct admv4420_reference_block ref_block;
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struct admv4420_n_counter n_counter;
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enum admv4420_mux_sel mux_sel;
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struct mutex lock;
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u8 transf_buf[4] ____cacheline_aligned;
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};
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static const struct regmap_config admv4420_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.read_flag_mask = BIT(7),
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};
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static int admv4420_reg_access(struct iio_dev *indio_dev,
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u32 reg, u32 writeval,
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u32 *readval)
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{
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struct admv4420_state *st = iio_priv(indio_dev);
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if (readval)
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return regmap_read(st->regmap, reg, readval);
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else
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return regmap_write(st->regmap, reg, writeval);
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}
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static int admv4420_set_n_counter(struct admv4420_state *st, u32 int_val,
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u32 frac_val, u32 mod_val)
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{
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int ret;
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put_unaligned_le32(frac_val, st->transf_buf);
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ret = regmap_bulk_write(st->regmap, ADMV4420_FRAC_L, st->transf_buf, 3);
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if (ret)
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return ret;
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put_unaligned_le32(mod_val, st->transf_buf);
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ret = regmap_bulk_write(st->regmap, ADMV4420_MOD_L, st->transf_buf, 3);
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if (ret)
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return ret;
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put_unaligned_le32(int_val, st->transf_buf);
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return regmap_bulk_write(st->regmap, ADMV4420_INT_L, st->transf_buf, 2);
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}
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static int admv4420_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long info)
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{
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struct admv4420_state *st = iio_priv(indio_dev);
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switch (info) {
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case IIO_CHAN_INFO_FREQUENCY:
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*val = div_u64_rem(st->lo_freq_hz, MICRO, val2);
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info admv4420_info = {
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.read_raw = admv4420_read_raw,
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.debugfs_reg_access = &admv4420_reg_access,
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};
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static const struct iio_chan_spec admv4420_channels[] = {
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{
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.type = IIO_ALTVOLTAGE,
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.output = 0,
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.indexed = 1,
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_FREQUENCY),
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},
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};
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static void admv4420_fw_parse(struct admv4420_state *st)
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{
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struct device *dev = &st->spi->dev;
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u32 tmp;
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int ret;
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ret = device_property_read_u32(dev, "adi,lo-freq-khz", &tmp);
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if (!ret)
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st->lo_freq_hz = (u64)tmp * KILO;
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st->ref_block.ref_single_ended = device_property_read_bool(dev,
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"adi,ref-ext-single-ended-en");
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}
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static inline uint64_t admv4420_calc_pfd_vco(struct admv4420_state *st)
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{
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return div_u64(st->vco_freq_hz * 10, st->n_counter.n_counter);
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}
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static inline uint32_t admv4420_calc_pfd_ref(struct admv4420_state *st)
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{
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uint32_t tmp;
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u8 doubler, divide_by_2;
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doubler = st->ref_block.doubler_en ? 2 : 1;
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divide_by_2 = st->ref_block.divide_by_2_en ? 2 : 1;
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tmp = ADMV4420_REF_FREQ_HZ * doubler;
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return (tmp / (st->ref_block.divider * divide_by_2));
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}
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static int admv4420_calc_parameters(struct admv4420_state *st)
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{
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u64 pfd_ref, pfd_vco;
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bool sol_found = false;
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st->ref_block.doubler_en = false;
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st->ref_block.divide_by_2_en = false;
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st->vco_freq_hz = div_u64(st->lo_freq_hz, 2);
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for (st->ref_block.divider = 1; st->ref_block.divider < MAX_R_DIVIDER;
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st->ref_block.divider++) {
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pfd_ref = admv4420_calc_pfd_ref(st);
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for (st->n_counter.n_counter = 1; st->n_counter.n_counter < MAX_N_COUNTER;
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st->n_counter.n_counter++) {
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pfd_vco = admv4420_calc_pfd_vco(st);
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if (pfd_ref == pfd_vco) {
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sol_found = true;
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break;
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}
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}
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if (sol_found)
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break;
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st->n_counter.n_counter = 1;
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}
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if (!sol_found)
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return -1;
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st->n_counter.int_val = div_u64_rem(st->n_counter.n_counter, 10, &st->n_counter.frac_val);
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st->n_counter.mod_val = 10;
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return 0;
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}
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static int admv4420_setup(struct iio_dev *indio_dev)
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{
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struct admv4420_state *st = iio_priv(indio_dev);
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struct device *dev = indio_dev->dev.parent;
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u32 val;
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int ret;
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ret = regmap_write(st->regmap, ADMV4420_SPI_CONFIG_1,
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ADMV4420_SPI_CONFIG_1_SOFTRESET);
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if (ret)
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return ret;
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ret = regmap_write(st->regmap, ADMV4420_SPI_CONFIG_1,
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ADMV4420_SPI_CONFIG_1_SDOACTIVE |
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ADMV4420_SPI_CONFIG_1_ENDIAN);
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if (ret)
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return ret;
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ret = regmap_write(st->regmap,
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ADMV4420_SCRATCHPAD,
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ADMV4420_SCRATCH_PAD_VAL_1);
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if (ret)
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return ret;
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ret = regmap_read(st->regmap, ADMV4420_SCRATCHPAD, &val);
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if (ret)
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return ret;
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if (val != ADMV4420_SCRATCH_PAD_VAL_1) {
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dev_err(dev, "Failed ADMV4420 to read/write scratchpad %x ", val);
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return -EIO;
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}
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ret = regmap_write(st->regmap,
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ADMV4420_SCRATCHPAD,
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ADMV4420_SCRATCH_PAD_VAL_2);
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if (ret)
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return ret;
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ret = regmap_read(st->regmap, ADMV4420_SCRATCHPAD, &val);
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if (ret)
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return ret;
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if (val != ADMV4420_SCRATCH_PAD_VAL_2) {
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dev_err(dev, "Failed to read/write scratchpad %x ", val);
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return -EIO;
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}
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st->mux_sel = ADMV4420_LOCK_DTCT;
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st->lo_freq_hz = ADMV4420_DEFAULT_LO_FREQ_HZ;
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admv4420_fw_parse(st);
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+
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ret = admv4420_calc_parameters(st);
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if (ret) {
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dev_err(dev, "Failed calc parameters for %lld ", st->vco_freq_hz);
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return ret;
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}
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ret = regmap_write(st->regmap, ADMV4420_R_DIV_L,
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FIELD_GET(0xFF, st->ref_block.divider));
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if (ret)
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return ret;
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+
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ret = regmap_write(st->regmap, ADMV4420_R_DIV_H,
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FIELD_GET(0xFF00, st->ref_block.divider));
320
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if (ret)
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return ret;
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+
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ret = regmap_write(st->regmap, ADMV4420_REFERENCE,
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st->ref_block.divide_by_2_en |
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FIELD_PREP(ADMV4420_REFERENCE_MODE_MASK, st->ref_block.ref_single_ended) |
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FIELD_PREP(ADMV4420_REFERENCE_DOUBLER_MASK, st->ref_block.doubler_en));
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if (ret)
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return ret;
329
+
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ret = admv4420_set_n_counter(st, st->n_counter.int_val,
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st->n_counter.frac_val,
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st->n_counter.mod_val);
333
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if (ret)
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return ret;
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+
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ret = regmap_write(st->regmap, ADMV4420_PLL_MUX_SEL, st->mux_sel);
337
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if (ret)
338
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return ret;
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return regmap_write(st->regmap, ADMV4420_ENABLES,
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ENABLE_PLL | ENABLE_LO | ENABLE_VCO |
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ENABLE_IFAMP | ENABLE_MIXER | ENABLE_LNA);
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}
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+
345
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static int admv4420_probe(struct spi_device *spi)
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{
347
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struct iio_dev *indio_dev;
348
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struct admv4420_state *st;
349
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struct regmap *regmap;
350
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int ret;
351
+
352
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
353
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if (!indio_dev)
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return -ENOMEM;
355
+
356
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regmap = devm_regmap_init_spi(spi, &admv4420_regmap_config);
357
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if (IS_ERR(regmap))
358
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return dev_err_probe(&spi->dev, PTR_ERR(regmap),
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"Failed to initializing spi regmap\n");
360
+
361
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st = iio_priv(indio_dev);
362
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st->spi = spi;
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st->regmap = regmap;
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+
365
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indio_dev->name = "admv4420";
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indio_dev->info = &admv4420_info;
367
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indio_dev->channels = admv4420_channels;
368
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indio_dev->num_channels = ARRAY_SIZE(admv4420_channels);
369
+
370
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ret = admv4420_setup(indio_dev);
371
+
if (ret) {
372
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dev_err(&spi->dev, "Setup ADMV4420 failed (%d)\n", ret);
373
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return ret;
374
+
}
375
+
376
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return devm_iio_device_register(&spi->dev, indio_dev);
377
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}
378
+
379
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static const struct of_device_id admv4420_of_match[] = {
380
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{ .compatible = "adi,admv4420" },
381
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{ }
382
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};
383
+
384
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MODULE_DEVICE_TABLE(of, admv4420_of_match);
385
+
386
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static struct spi_driver admv4420_driver = {
387
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.driver = {
388
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.name = "admv4420",
389
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.of_match_table = admv4420_of_match,
390
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},
391
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.probe = admv4420_probe,
392
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};
393
+
394
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module_spi_driver(admv4420_driver);
395
+
396
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MODULE_AUTHOR("Cristian Pop <cristian.pop@analog.com>");
397
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MODULE_DESCRIPTION("Analog Devices ADMV44200 K Band Downconverter");
398
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MODULE_LICENSE("Dual BSD/GPL");