Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4680/1: parentheses around NR_IRQS definition
[ARM] 4679/1: AT91: Change maintainer email address
[ARM] 4675/1: pxa: fix mfp address definition error for pxa320
[ARM] 4674/1: pxa: increase LCD PCLK drive strength to fast 2mA for PXA300/PXA310
[ARM] 4673/1: pxa: add missing IRQ_SSP4 definitions for PXA3xx
[ARM] 4672/1: pxa: fix DRCMR(n) to support PXA27x and later processors
[ARM] 4665/1: fix __und_usr wrt accessing the undefined insn in user space
[ARM] 4659/1: remove possibilities for spurious false negative with __kuser_cmpxchg
[ARM] 4661/1: fix do_undefinstr wrt the enabling of IRQs
[ARM] uengine: fix memset size error
[ARM] 4648/1: i.MX/MX1 ensure more complete AITC initialization
[ARM] 4611/2: AT91: Fix GPIO buttons pins on SAM9261-EK.
[ARM] 4650/1: AT91: New-style init of I2C, support for i2c-gpio
[ARM] 4604/2: AT91: Master clock divistor on SAM9
[ARM] 4662/1: Fix PXA serial driver compilation if SERIAL_PXA_CONSOLE is disabled
[ARM] PXA ssp: unlock when ssp tries to close an invalid port
[ARM] 4654/1: pxa: update default MFP register value
[ARM] 4653/1: pxa: fix a gpio typo in mfp-pxa320.h
[ARM] 4652/1: pxa: fix a typo of pxa27x usb host clk definition
[ARM] 4651/1: pxa: add PXA3xx specific IRQ definitions
+404
-117
+1
-1
MAINTAINERS
+1
-1
MAINTAINERS
+2
-4
arch/arm/common/uengine.c
+2
-4
arch/arm/common/uengine.c
···
374
374
u8 *ucode;
375
375
int i;
376
376
377
-
gpr_a = kmalloc(128 * sizeof(u32), GFP_KERNEL);
378
-
gpr_b = kmalloc(128 * sizeof(u32), GFP_KERNEL);
377
+
gpr_a = kzalloc(128 * sizeof(u32), GFP_KERNEL);
378
+
gpr_b = kzalloc(128 * sizeof(u32), GFP_KERNEL);
379
379
ucode = kmalloc(513 * 5, GFP_KERNEL);
380
380
if (gpr_a == NULL || gpr_b == NULL || ucode == NULL) {
381
381
kfree(ucode);
···
388
388
if (c->uengine_parameters & IXP2000_UENGINE_4_CONTEXTS)
389
389
per_ctx_regs = 32;
390
390
391
-
memset(gpr_a, 0, sizeof(gpr_a));
392
-
memset(gpr_b, 0, sizeof(gpr_b));
393
391
for (i = 0; i < 256; i++) {
394
392
struct ixp2000_reg_value *r = c->initial_reg_values + i;
395
393
u32 *bank;
+59
-39
arch/arm/kernel/entry-armv.S
+59
-39
arch/arm/kernel/entry-armv.S
···
339
339
str r1, [sp] @ save the "real" r0 copied
340
340
@ from the exception stack
341
341
342
-
#if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
343
-
#ifndef CONFIG_MMU
344
-
#warning "NPTL on non MMU needs fixing"
345
-
#else
346
-
@ make sure our user space atomic helper is aborted
347
-
cmp r2, #TASK_SIZE
348
-
bichs r3, r3, #PSR_Z_BIT
349
-
#endif
350
-
#endif
351
-
352
342
@
353
343
@ We are now ready to fill in the remaining blanks on the stack:
354
344
@
···
362
372
zero_fp
363
373
.endm
364
374
375
+
.macro kuser_cmpxchg_check
376
+
#if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
377
+
#ifndef CONFIG_MMU
378
+
#warning "NPTL on non MMU needs fixing"
379
+
#else
380
+
@ Make sure our user space atomic helper is restarted
381
+
@ if it was interrupted in a critical region. Here we
382
+
@ perform a quick test inline since it should be false
383
+
@ 99.9999% of the time. The rest is done out of line.
384
+
cmp r2, #TASK_SIZE
385
+
blhs kuser_cmpxchg_fixup
386
+
#endif
387
+
#endif
388
+
.endm
389
+
365
390
.align 5
366
391
__dabt_usr:
367
392
usr_entry
393
+
kuser_cmpxchg_check
368
394
369
395
@
370
396
@ Call the processor-specific abort handler:
···
410
404
.align 5
411
405
__irq_usr:
412
406
usr_entry
407
+
kuser_cmpxchg_check
413
408
414
409
#ifdef CONFIG_TRACE_IRQFLAGS
415
410
bl trace_hardirqs_off
···
453
446
@
454
447
@ r0 - instruction
455
448
@
456
-
1: ldrt r0, [r4]
457
449
adr r9, ret_from_exception
458
450
adr lr, __und_usr_unknown
451
+
1: ldrt r0, [r4]
459
452
@
460
453
@ fallthrough to call_fpe
461
454
@
···
676
669
*
677
670
* Clobbered:
678
671
*
679
-
* the Z flag might be lost
672
+
* none
680
673
*
681
674
* Definition and user space usage example:
682
675
*
···
737
730
*
738
731
* - This routine already includes memory barriers as needed.
739
732
*
740
-
* - A failure might be transient, i.e. it is possible, although unlikely,
741
-
* that "failure" be returned even if *ptr == oldval.
742
-
*
743
733
* For example, a user space atomic_add implementation could look like this:
744
734
*
745
735
* #define atomic_add(ptr, val) \
···
773
769
774
770
#elif __LINUX_ARM_ARCH__ < 6
775
771
776
-
/*
777
-
* Theory of operation:
778
-
*
779
-
* We set the Z flag before loading oldval. If ever an exception
780
-
* occurs we can not be sure the loaded value will still be the same
781
-
* when the exception returns, therefore the user exception handler
782
-
* will clear the Z flag whenever the interrupted user code was
783
-
* actually from the kernel address space (see the usr_entry macro).
784
-
*
785
-
* The post-increment on the str is used to prevent a race with an
786
-
* exception happening just after the str instruction which would
787
-
* clear the Z flag although the exchange was done.
788
-
*/
789
772
#ifdef CONFIG_MMU
790
-
teq ip, ip @ set Z flag
791
-
ldr ip, [r2] @ load current val
792
-
add r3, r2, #1 @ prepare store ptr
793
-
teqeq ip, r0 @ compare with oldval if still allowed
794
-
streq r1, [r3, #-1]! @ store newval if still allowed
795
-
subs r0, r2, r3 @ if r2 == r3 the str occured
773
+
774
+
/*
775
+
* The only thing that can break atomicity in this cmpxchg
776
+
* implementation is either an IRQ or a data abort exception
777
+
* causing another process/thread to be scheduled in the middle
778
+
* of the critical sequence. To prevent this, code is added to
779
+
* the IRQ and data abort exception handlers to set the pc back
780
+
* to the beginning of the critical section if it is found to be
781
+
* within that critical section (see kuser_cmpxchg_fixup).
782
+
*/
783
+
1: ldr r3, [r2] @ load current val
784
+
subs r3, r3, r0 @ compare with oldval
785
+
2: streq r1, [r2] @ store newval if eq
786
+
rsbs r0, r3, #0 @ set return val and C flag
787
+
usr_ret lr
788
+
789
+
.text
790
+
kuser_cmpxchg_fixup:
791
+
@ Called from kuser_cmpxchg_check macro.
792
+
@ r2 = address of interrupted insn (must be preserved).
793
+
@ sp = saved regs. r7 and r8 are clobbered.
794
+
@ 1b = first critical insn, 2b = last critical insn.
795
+
@ If r2 >= 1b and r2 <= 2b then saved pc_usr is set to 1b.
796
+
mov r7, #0xffff0fff
797
+
sub r7, r7, #(0xffff0fff - (0xffff0fc0 + (1b - __kuser_cmpxchg)))
798
+
subs r8, r2, r7
799
+
rsbcss r8, r8, #(2b - 1b)
800
+
strcs r7, [sp, #S_PC]
801
+
mov pc, lr
802
+
.previous
803
+
796
804
#else
797
805
#warning "NPTL on non MMU needs fixing"
798
806
mov r0, #-1
799
807
adds r0, r0, #0
800
-
#endif
801
808
usr_ret lr
809
+
#endif
802
810
803
811
#else
804
812
805
813
#ifdef CONFIG_SMP
806
814
mcr p15, 0, r0, c7, c10, 5 @ dmb
807
815
#endif
808
-
ldrex r3, [r2]
816
+
1: ldrex r3, [r2]
809
817
subs r3, r3, r0
810
818
strexeq r3, r1, [r2]
819
+
teqeq r3, #1
820
+
beq 1b
811
821
rsbs r0, r3, #0
822
+
/* beware -- each __kuser slot must be 8 instructions max */
812
823
#ifdef CONFIG_SMP
813
-
mcr p15, 0, r0, c7, c10, 5 @ dmb
814
-
#endif
824
+
b __kuser_memory_barrier
825
+
#else
815
826
usr_ret lr
827
+
#endif
816
828
817
829
#endif
818
830
···
849
829
*
850
830
* Clobbered:
851
831
*
852
-
* the Z flag might be lost
832
+
* none
853
833
*
854
834
* Definition and user space usage example:
855
835
*
+2
-3
arch/arm/kernel/traps.c
+2
-3
arch/arm/kernel/traps.c
···
327
327
if ((instr & hook->instr_mask) == hook->instr_val &&
328
328
(regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) {
329
329
if (hook->fn(regs, instr) == 0) {
330
-
spin_unlock_irq(&undef_lock);
330
+
spin_unlock_irqrestore(&undef_lock, flags);
331
331
return;
332
332
}
333
333
}
···
509
509
* existence. Don't ever use this from user code.
510
510
*/
511
511
case 0xfff0:
512
-
{
512
+
for (;;) {
513
513
extern void do_DataAbort(unsigned long addr, unsigned int fsr,
514
514
struct pt_regs *regs);
515
515
unsigned long val;
···
545
545
up_read(&mm->mmap_sem);
546
546
/* simulate a write access fault */
547
547
do_DataAbort(addr, 15 + (1 << 11), regs);
548
-
return -1;
549
548
}
550
549
#endif
551
550
+38
-3
arch/arm/mach-at91/at91rm9200_devices.c
+38
-3
arch/arm/mach-at91/at91rm9200_devices.c
···
14
14
#include <asm/mach/map.h>
15
15
16
16
#include <linux/platform_device.h>
17
+
#include <linux/i2c-gpio.h>
17
18
18
19
#include <asm/arch/board.h>
19
20
#include <asm/arch/gpio.h>
···
436
435
* TWI (i2c)
437
436
* -------------------------------------------------------------------- */
438
437
439
-
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
438
+
/*
439
+
* Prefer the GPIO code since the TWI controller isn't robust
440
+
* (gets overruns and underruns under load) and can only issue
441
+
* repeated STARTs in one scenario (the driver doesn't yet handle them).
442
+
*/
443
+
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
444
+
445
+
static struct i2c_gpio_platform_data pdata = {
446
+
.sda_pin = AT91_PIN_PA25,
447
+
.sda_is_open_drain = 1,
448
+
.scl_pin = AT91_PIN_PA26,
449
+
.scl_is_open_drain = 1,
450
+
.udelay = 2, /* ~100 kHz */
451
+
};
452
+
453
+
static struct platform_device at91rm9200_twi_device = {
454
+
.name = "i2c-gpio",
455
+
.id = -1,
456
+
.dev.platform_data = &pdata,
457
+
};
458
+
459
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
460
+
{
461
+
at91_set_GPIO_periph(AT91_PIN_PA25, 1); /* TWD (SDA) */
462
+
at91_set_multi_drive(AT91_PIN_PA25, 1);
463
+
464
+
at91_set_GPIO_periph(AT91_PIN_PA26, 1); /* TWCK (SCL) */
465
+
at91_set_multi_drive(AT91_PIN_PA26, 1);
466
+
467
+
i2c_register_board_info(0, devices, nr_devices);
468
+
platform_device_register(&at91rm9200_twi_device);
469
+
}
470
+
471
+
#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
440
472
441
473
static struct resource twi_resources[] = {
442
474
[0] = {
···
491
457
.num_resources = ARRAY_SIZE(twi_resources),
492
458
};
493
459
494
-
void __init at91_add_device_i2c(void)
460
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
495
461
{
496
462
/* pins used for TWI interface */
497
463
at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
···
500
466
at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
501
467
at91_set_multi_drive(AT91_PIN_PA26, 1);
502
468
469
+
i2c_register_board_info(0, devices, nr_devices);
503
470
platform_device_register(&at91rm9200_twi_device);
504
471
}
505
472
#else
506
-
void __init at91_add_device_i2c(void) {}
473
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
507
474
#endif
508
475
509
476
+39
-3
arch/arm/mach-at91/at91sam9260_devices.c
+39
-3
arch/arm/mach-at91/at91sam9260_devices.c
···
13
13
#include <asm/mach/map.h>
14
14
15
15
#include <linux/platform_device.h>
16
+
#include <linux/i2c-gpio.h>
16
17
17
18
#include <asm/arch/board.h>
18
19
#include <asm/arch/gpio.h>
···
353
352
* TWI (i2c)
354
353
* -------------------------------------------------------------------- */
355
354
356
-
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
355
+
/*
356
+
* Prefer the GPIO code since the TWI controller isn't robust
357
+
* (gets overruns and underruns under load) and can only issue
358
+
* repeated STARTs in one scenario (the driver doesn't yet handle them).
359
+
*/
360
+
361
+
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
362
+
363
+
static struct i2c_gpio_platform_data pdata = {
364
+
.sda_pin = AT91_PIN_PA23,
365
+
.sda_is_open_drain = 1,
366
+
.scl_pin = AT91_PIN_PA24,
367
+
.scl_is_open_drain = 1,
368
+
.udelay = 2, /* ~100 kHz */
369
+
};
370
+
371
+
static struct platform_device at91sam9260_twi_device = {
372
+
.name = "i2c-gpio",
373
+
.id = -1,
374
+
.dev.platform_data = &pdata,
375
+
};
376
+
377
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
378
+
{
379
+
at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
380
+
at91_set_multi_drive(AT91_PIN_PA23, 1);
381
+
382
+
at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
383
+
at91_set_multi_drive(AT91_PIN_PA24, 1);
384
+
385
+
i2c_register_board_info(0, devices, nr_devices);
386
+
platform_device_register(&at91sam9260_twi_device);
387
+
}
388
+
389
+
#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
357
390
358
391
static struct resource twi_resources[] = {
359
392
[0] = {
···
409
374
.num_resources = ARRAY_SIZE(twi_resources),
410
375
};
411
376
412
-
void __init at91_add_device_i2c(void)
377
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
413
378
{
414
379
/* pins used for TWI interface */
415
380
at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
···
418
383
at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
419
384
at91_set_multi_drive(AT91_PIN_PA24, 1);
420
385
386
+
i2c_register_board_info(0, devices, nr_devices);
421
387
platform_device_register(&at91sam9260_twi_device);
422
388
}
423
389
#else
424
-
void __init at91_add_device_i2c(void) {}
390
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
425
391
#endif
426
392
427
393
+39
-3
arch/arm/mach-at91/at91sam9261_devices.c
+39
-3
arch/arm/mach-at91/at91sam9261_devices.c
···
14
14
#include <asm/mach/map.h>
15
15
16
16
#include <linux/platform_device.h>
17
+
#include <linux/i2c-gpio.h>
17
18
19
+
#include <linux/fb.h>
18
20
#include <video/atmel_lcdc.h>
19
21
20
22
#include <asm/arch/board.h>
···
277
275
* TWI (i2c)
278
276
* -------------------------------------------------------------------- */
279
277
280
-
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
278
+
/*
279
+
* Prefer the GPIO code since the TWI controller isn't robust
280
+
* (gets overruns and underruns under load) and can only issue
281
+
* repeated STARTs in one scenario (the driver doesn't yet handle them).
282
+
*/
283
+
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
284
+
285
+
static struct i2c_gpio_platform_data pdata = {
286
+
.sda_pin = AT91_PIN_PA7,
287
+
.sda_is_open_drain = 1,
288
+
.scl_pin = AT91_PIN_PA8,
289
+
.scl_is_open_drain = 1,
290
+
.udelay = 2, /* ~100 kHz */
291
+
};
292
+
293
+
static struct platform_device at91sam9261_twi_device = {
294
+
.name = "i2c-gpio",
295
+
.id = -1,
296
+
.dev.platform_data = &pdata,
297
+
};
298
+
299
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
300
+
{
301
+
at91_set_GPIO_periph(AT91_PIN_PA7, 1); /* TWD (SDA) */
302
+
at91_set_multi_drive(AT91_PIN_PA7, 1);
303
+
304
+
at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */
305
+
at91_set_multi_drive(AT91_PIN_PA8, 1);
306
+
307
+
i2c_register_board_info(0, devices, nr_devices);
308
+
platform_device_register(&at91sam9261_twi_device);
309
+
}
310
+
311
+
#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
281
312
282
313
static struct resource twi_resources[] = {
283
314
[0] = {
···
332
297
.num_resources = ARRAY_SIZE(twi_resources),
333
298
};
334
299
335
-
void __init at91_add_device_i2c(void)
300
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
336
301
{
337
302
/* pins used for TWI interface */
338
303
at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
···
341
306
at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
342
307
at91_set_multi_drive(AT91_PIN_PA8, 1);
343
308
309
+
i2c_register_board_info(0, devices, nr_devices);
344
310
platform_device_register(&at91sam9261_twi_device);
345
311
}
346
312
#else
347
-
void __init at91_add_device_i2c(void) {}
313
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
348
314
#endif
349
315
350
316
+39
-3
arch/arm/mach-at91/at91sam9263_devices.c
+39
-3
arch/arm/mach-at91/at91sam9263_devices.c
···
13
13
#include <asm/mach/map.h>
14
14
15
15
#include <linux/platform_device.h>
16
+
#include <linux/i2c-gpio.h>
16
17
18
+
#include <linux/fb.h>
17
19
#include <video/atmel_lcdc.h>
18
20
19
21
#include <asm/arch/board.h>
···
423
421
* TWI (i2c)
424
422
* -------------------------------------------------------------------- */
425
423
426
-
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
424
+
/*
425
+
* Prefer the GPIO code since the TWI controller isn't robust
426
+
* (gets overruns and underruns under load) and can only issue
427
+
* repeated STARTs in one scenario (the driver doesn't yet handle them).
428
+
*/
429
+
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
430
+
431
+
static struct i2c_gpio_platform_data pdata = {
432
+
.sda_pin = AT91_PIN_PB4,
433
+
.sda_is_open_drain = 1,
434
+
.scl_pin = AT91_PIN_PB5,
435
+
.scl_is_open_drain = 1,
436
+
.udelay = 2, /* ~100 kHz */
437
+
};
438
+
439
+
static struct platform_device at91sam9263_twi_device = {
440
+
.name = "i2c-gpio",
441
+
.id = -1,
442
+
.dev.platform_data = &pdata,
443
+
};
444
+
445
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
446
+
{
447
+
at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */
448
+
at91_set_multi_drive(AT91_PIN_PB4, 1);
449
+
450
+
at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */
451
+
at91_set_multi_drive(AT91_PIN_PB5, 1);
452
+
453
+
i2c_register_board_info(0, devices, nr_devices);
454
+
platform_device_register(&at91sam9263_twi_device);
455
+
}
456
+
457
+
#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
427
458
428
459
static struct resource twi_resources[] = {
429
460
[0] = {
···
478
443
.num_resources = ARRAY_SIZE(twi_resources),
479
444
};
480
445
481
-
void __init at91_add_device_i2c(void)
446
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
482
447
{
483
448
/* pins used for TWI interface */
484
449
at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
···
487
452
at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
488
453
at91_set_multi_drive(AT91_PIN_PB5, 1);
489
454
455
+
i2c_register_board_info(0, devices, nr_devices);
490
456
platform_device_register(&at91sam9263_twi_device);
491
457
}
492
458
#else
493
-
void __init at91_add_device_i2c(void) {}
459
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
494
460
#endif
495
461
496
462
+39
-4
arch/arm/mach-at91/at91sam9rl_devices.c
+39
-4
arch/arm/mach-at91/at91sam9rl_devices.c
···
10
10
#include <asm/mach/map.h>
11
11
12
12
#include <linux/platform_device.h>
13
-
#include <linux/fb.h>
13
+
#include <linux/i2c-gpio.h>
14
14
15
+
#include <linux/fb.h>
15
16
#include <video/atmel_lcdc.h>
16
17
17
18
#include <asm/arch/board.h>
···
170
169
* TWI (i2c)
171
170
* -------------------------------------------------------------------- */
172
171
173
-
#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
172
+
/*
173
+
* Prefer the GPIO code since the TWI controller isn't robust
174
+
* (gets overruns and underruns under load) and can only issue
175
+
* repeated STARTs in one scenario (the driver doesn't yet handle them).
176
+
*/
177
+
#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
178
+
179
+
static struct i2c_gpio_platform_data pdata = {
180
+
.sda_pin = AT91_PIN_PA23,
181
+
.sda_is_open_drain = 1,
182
+
.scl_pin = AT91_PIN_PA24,
183
+
.scl_is_open_drain = 1,
184
+
.udelay = 2, /* ~100 kHz */
185
+
};
186
+
187
+
static struct platform_device at91sam9rl_twi_device = {
188
+
.name = "i2c-gpio",
189
+
.id = -1,
190
+
.dev.platform_data = &pdata,
191
+
};
192
+
193
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
194
+
{
195
+
at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
196
+
at91_set_multi_drive(AT91_PIN_PA23, 1);
197
+
198
+
at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
199
+
at91_set_multi_drive(AT91_PIN_PA24, 1);
200
+
201
+
i2c_register_board_info(0, devices, nr_devices);
202
+
platform_device_register(&at91sam9rl_twi_device);
203
+
}
204
+
205
+
#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
174
206
175
207
static struct resource twi_resources[] = {
176
208
[0] = {
···
225
191
.num_resources = ARRAY_SIZE(twi_resources),
226
192
};
227
193
228
-
void __init at91_add_device_i2c(void)
194
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
229
195
{
230
196
/* pins used for TWI interface */
231
197
at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
···
234
200
at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
235
201
at91_set_multi_drive(AT91_PIN_PA24, 1);
236
202
203
+
i2c_register_board_info(0, devices, nr_devices);
237
204
platform_device_register(&at91sam9rl_twi_device);
238
205
}
239
206
#else
240
-
void __init at91_add_device_i2c(void) {}
207
+
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
241
208
#endif
242
209
243
210
+1
-1
arch/arm/mach-at91/board-carmeva.c
+1
-1
arch/arm/mach-at91/board-carmeva.c
+4
-7
arch/arm/mach-at91/board-csb337.c
+4
-7
arch/arm/mach-at91/board-csb337.c
···
23
23
#include <linux/mm.h>
24
24
#include <linux/module.h>
25
25
#include <linux/platform_device.h>
26
-
#include <linux/i2c.h>
27
26
#include <linux/spi/spi.h>
28
27
#include <linux/mtd/physmap.h>
29
28
···
84
85
};
85
86
86
87
static struct i2c_board_info __initdata csb337_i2c_devices[] = {
87
-
{ I2C_BOARD_INFO("rtc-ds1307", 0x68),
88
-
.type = "ds1307",
88
+
{
89
+
I2C_BOARD_INFO("rtc-ds1307", 0x68),
90
+
.type = "ds1307",
89
91
},
90
92
};
91
-
92
93
93
94
static struct at91_cf_data __initdata csb337_cf_data = {
94
95
/*
···
167
168
/* USB Device */
168
169
at91_add_device_udc(&csb337_udc_data);
169
170
/* I2C */
170
-
at91_add_device_i2c();
171
-
i2c_register_board_info(0, csb337_i2c_devices,
172
-
ARRAY_SIZE(csb337_i2c_devices));
171
+
at91_add_device_i2c(csb337_i2c_devices, ARRAY_SIZE(csb337_i2c_devices));
173
172
/* Compact Flash */
174
173
at91_set_gpio_input(AT91_PIN_PB22, 1); /* IOIS16 */
175
174
at91_add_device_cf(&csb337_cf_data);
+1
-1
arch/arm/mach-at91/board-csb637.c
+1
-1
arch/arm/mach-at91/board-csb637.c
+14
-1
arch/arm/mach-at91/board-dk.c
+14
-1
arch/arm/mach-at91/board-dk.c
···
124
124
#endif
125
125
};
126
126
127
+
static struct i2c_board_info __initdata dk_i2c_devices[] = {
128
+
{
129
+
I2C_BOARD_INFO("ics1523", 0x26),
130
+
},
131
+
{
132
+
I2C_BOARD_INFO("x9429", 0x28),
133
+
},
134
+
{
135
+
I2C_BOARD_INFO("at24c", 0x50),
136
+
.type = "24c1024",
137
+
}
138
+
};
139
+
127
140
static struct mtd_partition __initdata dk_nand_partition[] = {
128
141
{
129
142
.name = "NAND Partition 1",
···
198
185
/* Compact Flash */
199
186
at91_add_device_cf(&dk_cf_data);
200
187
/* I2C */
201
-
at91_add_device_i2c();
188
+
at91_add_device_i2c(dk_i2c_devices, ARRAY_SIZE(dk_i2c_devices));
202
189
/* SPI */
203
190
at91_add_device_spi(dk_spi_devices, ARRAY_SIZE(dk_spi_devices));
204
191
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+9
-1
arch/arm/mach-at91/board-eb9200.c
+9
-1
arch/arm/mach-at91/board-eb9200.c
···
91
91
.wire4 = 1,
92
92
};
93
93
94
+
static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
95
+
{
96
+
I2C_BOARD_INFO("at24c", 0x50),
97
+
.type = "24c512",
98
+
},
99
+
};
100
+
101
+
94
102
static void __init eb9200_board_init(void)
95
103
{
96
104
/* Serial */
···
110
102
/* USB Device */
111
103
at91_add_device_udc(&eb9200_udc_data);
112
104
/* I2C */
113
-
at91_add_device_i2c();
105
+
at91_add_device_i2c(eb9200_i2c_devices, ARRAY_SIZE(eb9200_i2c_devices));
114
106
/* Compact Flash */
115
107
at91_add_device_cf(&eb9200_cf_data);
116
108
/* SPI */
+1
-1
arch/arm/mach-at91/board-ek.c
+1
-1
arch/arm/mach-at91/board-ek.c
···
145
145
at91_add_device_udc(&ek_udc_data);
146
146
at91_set_multi_drive(ek_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
147
147
/* I2C */
148
-
at91_add_device_i2c();
148
+
at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
149
149
/* SPI */
150
150
at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
151
151
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+1
-1
arch/arm/mach-at91/board-kafa.c
+1
-1
arch/arm/mach-at91/board-kafa.c
+1
-1
arch/arm/mach-at91/board-kb9202.c
+1
-1
arch/arm/mach-at91/board-kb9202.c
+1
-1
arch/arm/mach-at91/board-picotux200.c
+1
-1
arch/arm/mach-at91/board-picotux200.c
···
139
139
// at91_add_device_udc(&picotux200_udc_data);
140
140
// at91_set_multi_drive(picotux200_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
141
141
/* I2C */
142
-
at91_add_device_i2c();
142
+
at91_add_device_i2c(NULL, 0);
143
143
/* SPI */
144
144
// at91_add_device_spi(picotux200_spi_devices, ARRAY_SIZE(picotux200_spi_devices));
145
145
#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+1
-1
arch/arm/mach-at91/board-sam9260ek.c
+1
-1
arch/arm/mach-at91/board-sam9260ek.c
+9
-9
arch/arm/mach-at91/board-sam9261ek.c
+9
-9
arch/arm/mach-at91/board-sam9261ek.c
···
382
382
383
383
static void __init ek_add_device_buttons(void)
384
384
{
385
-
at91_set_gpio_input(AT91_PIN_PB27, 0); /* btn0 */
386
-
at91_set_deglitch(AT91_PIN_PB27, 1);
387
-
at91_set_gpio_input(AT91_PIN_PB26, 0); /* btn1 */
388
-
at91_set_deglitch(AT91_PIN_PB26, 1);
389
-
at91_set_gpio_input(AT91_PIN_PB25, 0); /* btn2 */
390
-
at91_set_deglitch(AT91_PIN_PB25, 1);
391
-
at91_set_gpio_input(AT91_PIN_PB24, 0); /* btn3 */
392
-
at91_set_deglitch(AT91_PIN_PB24, 1);
385
+
at91_set_gpio_input(AT91_PIN_PA27, 0); /* btn0 */
386
+
at91_set_deglitch(AT91_PIN_PA27, 1);
387
+
at91_set_gpio_input(AT91_PIN_PA26, 0); /* btn1 */
388
+
at91_set_deglitch(AT91_PIN_PA26, 1);
389
+
at91_set_gpio_input(AT91_PIN_PA25, 0); /* btn2 */
390
+
at91_set_deglitch(AT91_PIN_PA25, 1);
391
+
at91_set_gpio_input(AT91_PIN_PA24, 0); /* btn3 */
392
+
at91_set_deglitch(AT91_PIN_PA24, 1);
393
393
394
394
platform_device_register(&ek_button_device);
395
395
}
···
406
406
/* USB Device */
407
407
at91_add_device_udc(&ek_udc_data);
408
408
/* I2C */
409
-
at91_add_device_i2c();
409
+
at91_add_device_i2c(NULL, 0);
410
410
/* NAND */
411
411
at91_add_device_nand(&ek_nand_data);
412
412
/* DM9000 ethernet */
+1
-1
arch/arm/mach-at91/board-sam9263ek.c
+1
-1
arch/arm/mach-at91/board-sam9263ek.c
+1
-1
arch/arm/mach-at91/board-sam9rlek.c
+1
-1
arch/arm/mach-at91/board-sam9rlek.c
+6
-3
arch/arm/mach-at91/clock.c
+6
-3
arch/arm/mach-at91/clock.c
···
351
351
pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
352
352
parent = at91_css_to_clk(pckr & AT91_PMC_CSS);
353
353
clk->parent = parent;
354
-
clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
354
+
clk->rate_hz = parent->rate_hz / (1 << ((pckr & AT91_PMC_PRES) >> 2));
355
355
}
356
356
357
357
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
···
587
587
mckr = at91_sys_read(AT91_PMC_MCKR);
588
588
mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
589
589
freq = mck.parent->rate_hz;
590
-
freq /= (1 << ((mckr >> 2) & 3)); /* prescale */
591
-
mck.rate_hz = freq / (1 + ((mckr >> 8) & 3)); /* mdiv */
590
+
freq /= (1 << ((mckr & AT91_PMC_PRES) >> 2)); /* prescale */
591
+
if (cpu_is_at91rm9200())
592
+
mck.rate_hz = freq / (1 + ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
593
+
else
594
+
mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */
592
595
593
596
/* Register the PMC's standard clocks */
594
597
for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
+45
-6
arch/arm/mach-imx/irq.c
+45
-6
arch/arm/mach-imx/irq.c
···
43
43
*
44
44
*/
45
45
46
-
#define INTENNUM_OFF 0x8
47
-
#define INTDISNUM_OFF 0xC
46
+
#define INTCNTL_OFF 0x00
47
+
#define NIMASK_OFF 0x04
48
+
#define INTENNUM_OFF 0x08
49
+
#define INTDISNUM_OFF 0x0C
50
+
#define INTENABLEH_OFF 0x10
51
+
#define INTENABLEL_OFF 0x14
52
+
#define INTTYPEH_OFF 0x18
53
+
#define INTTYPEL_OFF 0x1C
54
+
#define NIPRIORITY_OFF(x) (0x20+4*(7-(x)))
55
+
#define NIVECSR_OFF 0x40
56
+
#define FIVECSR_OFF 0x44
57
+
#define INTSRCH_OFF 0x48
58
+
#define INTSRCL_OFF 0x4C
59
+
#define INTFRCH_OFF 0x50
60
+
#define INTFRCL_OFF 0x54
61
+
#define NIPNDH_OFF 0x58
62
+
#define NIPNDL_OFF 0x5C
63
+
#define FIPNDH_OFF 0x60
64
+
#define FIPNDL_OFF 0x64
48
65
49
66
#define VA_AITC_BASE IO_ADDRESS(IMX_AITC_BASE)
50
-
#define IMX_AITC_INTDISNUM (VA_AITC_BASE + INTDISNUM_OFF)
67
+
#define IMX_AITC_INTCNTL (VA_AITC_BASE + INTCNTL_OFF)
68
+
#define IMX_AITC_NIMASK (VA_AITC_BASE + NIMASK_OFF)
51
69
#define IMX_AITC_INTENNUM (VA_AITC_BASE + INTENNUM_OFF)
70
+
#define IMX_AITC_INTDISNUM (VA_AITC_BASE + INTDISNUM_OFF)
71
+
#define IMX_AITC_INTENABLEH (VA_AITC_BASE + INTENABLEH_OFF)
72
+
#define IMX_AITC_INTENABLEL (VA_AITC_BASE + INTENABLEL_OFF)
73
+
#define IMX_AITC_INTTYPEH (VA_AITC_BASE + INTTYPEH_OFF)
74
+
#define IMX_AITC_INTTYPEL (VA_AITC_BASE + INTTYPEL_OFF)
75
+
#define IMX_AITC_NIPRIORITY(x) (VA_AITC_BASE + NIPRIORITY_OFF(x))
76
+
#define IMX_AITC_NIVECSR (VA_AITC_BASE + NIVECSR_OFF)
77
+
#define IMX_AITC_FIVECSR (VA_AITC_BASE + FIVECSR_OFF)
78
+
#define IMX_AITC_INTSRCH (VA_AITC_BASE + INTSRCH_OFF)
79
+
#define IMX_AITC_INTSRCL (VA_AITC_BASE + INTSRCL_OFF)
80
+
#define IMX_AITC_INTFRCH (VA_AITC_BASE + INTFRCH_OFF)
81
+
#define IMX_AITC_INTFRCL (VA_AITC_BASE + INTFRCL_OFF)
82
+
#define IMX_AITC_NIPNDH (VA_AITC_BASE + NIPNDH_OFF)
83
+
#define IMX_AITC_NIPNDL (VA_AITC_BASE + NIPNDL_OFF)
84
+
#define IMX_AITC_FIPNDH (VA_AITC_BASE + FIPNDH_OFF)
85
+
#define IMX_AITC_FIPNDL (VA_AITC_BASE + FIPNDL_OFF)
52
86
53
87
#if 0
54
88
#define DEBUG_IRQ(fmt...) printk(fmt)
···
256
222
257
223
DEBUG_IRQ("Initializing imx interrupts\n");
258
224
259
-
/* Mask all interrupts initially */
225
+
/* Disable all interrupts initially. */
226
+
/* Do not rely on the bootloader. */
227
+
__raw_writel(0, IMX_AITC_INTENABLEH);
228
+
__raw_writel(0, IMX_AITC_INTENABLEL);
229
+
230
+
/* Mask all GPIO interrupts as well */
260
231
IMR(0) = 0;
261
232
IMR(1) = 0;
262
233
IMR(2) = 0;
···
284
245
set_irq_chained_handler(GPIO_INT_PORTC, imx_gpioc_demux_handler);
285
246
set_irq_chained_handler(GPIO_INT_PORTD, imx_gpiod_demux_handler);
286
247
287
-
/* Disable all interrupts initially. */
288
-
/* In IMX this is done in the bootloader. */
248
+
/* Release masking of interrupts according to priority */
249
+
__raw_writel(-1, IMX_AITC_NIMASK);
289
250
}
+1
-1
arch/arm/mach-pxa/pxa27x.c
+1
-1
arch/arm/mach-pxa/pxa27x.c
···
146
146
INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev),
147
147
INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
148
148
149
-
INIT_CKEN("USBCLK", USB, 48000000, 0, &pxa27x_device_ohci.dev),
149
+
INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev),
150
150
INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
151
151
INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL),
152
152
+5
-2
arch/arm/mach-pxa/pxa320.c
+5
-2
arch/arm/mach-pxa/pxa320.c
···
23
23
static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
24
24
25
25
MFP_ADDR_X(GPIO0, GPIO4, 0x0124),
26
-
MFP_ADDR_X(GPIO5, GPIO26, 0x028C),
27
-
MFP_ADDR_X(GPIO27, GPIO62, 0x0400),
26
+
MFP_ADDR_X(GPIO5, GPIO9, 0x028C),
27
+
MFP_ADDR(GPIO10, 0x0458),
28
+
MFP_ADDR_X(GPIO11, GPIO26, 0x02A0),
29
+
MFP_ADDR_X(GPIO27, GPIO48, 0x0400),
30
+
MFP_ADDR_X(GPIO49, GPIO62, 0x045C),
28
31
MFP_ADDR_X(GPIO63, GPIO73, 0x04B4),
29
32
MFP_ADDR_X(GPIO74, GPIO98, 0x04F0),
30
33
MFP_ADDR_X(GPIO99, GPIO127, 0x0600),
+1
arch/arm/mach-pxa/ssp.c
+1
arch/arm/mach-pxa/ssp.c
+2
-2
drivers/serial/pxa.c
+2
-2
drivers/serial/pxa.c
···
585
585
return up->name;
586
586
}
587
587
588
-
#ifdef CONFIG_SERIAL_PXA_CONSOLE
589
-
590
588
static struct uart_pxa_port *serial_pxa_ports[4];
591
589
static struct uart_driver serial_pxa_reg;
590
+
591
+
#ifdef CONFIG_SERIAL_PXA_CONSOLE
592
592
593
593
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
594
594
+2
-1
include/asm-arm/arch-at91/board.h
+2
-1
include/asm-arm/arch-at91/board.h
···
33
33
34
34
#include <linux/mtd/partitions.h>
35
35
#include <linux/device.h>
36
+
#include <linux/i2c.h>
36
37
#include <linux/spi/spi.h>
37
38
38
39
/* USB Device */
···
95
94
extern void __init at91_add_device_nand(struct at91_nand_data *data);
96
95
97
96
/* I2C*/
98
-
extern void __init at91_add_device_i2c(void);
97
+
extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices);
99
98
100
99
/* SPI */
101
100
extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices);
+1
-1
include/asm-arm/arch-ixp23xx/irqs.h
+1
-1
include/asm-arm/arch-ixp23xx/irqs.h
+1
-1
include/asm-arm/arch-omap/board-innovator.h
+1
-1
include/asm-arm/arch-omap/board-innovator.h
+18
-2
include/asm-arm/arch-pxa/irqs.h
+18
-2
include/asm-arm/arch-pxa/irqs.h
···
13
13
14
14
#define PXA_IRQ(x) (x)
15
15
16
-
#ifdef CONFIG_PXA27x
16
+
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
17
17
#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
18
18
#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
19
19
#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */
···
52
52
#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */
53
53
#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */
54
54
55
-
#ifdef CONFIG_PXA27x
55
+
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
56
56
#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */
57
57
#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */
58
+
#endif
59
+
60
+
#ifdef CONFIG_PXA3xx
61
+
#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */
62
+
#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
63
+
#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
64
+
#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
65
+
#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */
66
+
#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */
67
+
#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */
68
+
#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */
69
+
#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */
70
+
#define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */
71
+
#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */
72
+
#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */
73
+
#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
58
74
#endif
59
75
60
76
#define PXA_GPIO_IRQ_BASE (64)
+1
-1
include/asm-arm/arch-pxa/mfp-pxa300.h
+1
-1
include/asm-arm/arch-pxa/mfp-pxa300.h
···
179
179
#define GPIO62_LCD_CS_N MFP_CFG_DRV(GPIO62, AF2, DS01X)
180
180
#define GPIO72_LCD_FCLK MFP_CFG_DRV(GPIO72, AF1, DS01X)
181
181
#define GPIO73_LCD_LCLK MFP_CFG_DRV(GPIO73, AF1, DS01X)
182
-
#define GPIO74_LCD_PCLK MFP_CFG_DRV(GPIO74, AF1, DS01X)
182
+
#define GPIO74_LCD_PCLK MFP_CFG_DRV(GPIO74, AF1, DS02X)
183
183
#define GPIO75_LCD_BIAS MFP_CFG_DRV(GPIO75, AF1, DS01X)
184
184
#define GPIO76_LCD_VSYNC MFP_CFG_DRV(GPIO76, AF2, DS01X)
185
185
+1
-1
include/asm-arm/arch-pxa/mfp-pxa320.h
+1
-1
include/asm-arm/arch-pxa/mfp-pxa320.h
+13
-5
include/asm-arm/arch-pxa/mfp.h
+13
-5
include/asm-arm/arch-pxa/mfp.h
···
346
346
#define MFP_CFG_PIN(mfp_cfg) (((mfp_cfg) >> 16) & 0xffff)
347
347
#define MFP_CFG_VAL(mfp_cfg) ((mfp_cfg) & 0xffff)
348
348
349
-
#define MFPR_DEFAULT (0x0000)
349
+
/*
350
+
* MFP register defaults to
351
+
* drive strength fast 3mA (010'b)
352
+
* edge detection logic disabled
353
+
* alternate function 0
354
+
*/
355
+
#define MFPR_DEFAULT (0x0840)
350
356
351
357
#define MFP_CFG(pin, af) \
352
358
((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af))
353
359
354
360
#define MFP_CFG_DRV(pin, af, drv) \
355
-
((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\
361
+
((MFP_PIN_##pin << 16) | (MFPR_DEFAULT & ~MFPR_DRV_MASK) |\
356
362
((MFP_##drv) << 10) | (MFP_##af))
357
363
358
364
#define MFP_CFG_LPM(pin, af, lpm) \
359
-
((MFP_PIN_##pin << 16) | MFPR_DEFAULT | (MFP_##af) |\
365
+
((MFP_PIN_##pin << 16) | (MFPR_DEFAULT & ~MFPR_LPM_MASK) |\
360
366
(((MFP_LPM_##lpm) & 0x3) << 7) |\
361
367
(((MFP_LPM_##lpm) & 0x4) << 12) |\
362
-
(((MFP_LPM_##lpm) & 0x8) << 10))
368
+
(((MFP_LPM_##lpm) & 0x8) << 10) |\
369
+
(MFP_##af))
363
370
364
371
#define MFP_CFG_X(pin, af, drv, lpm) \
365
-
((MFP_PIN_##pin << 16) | MFPR_DEFAULT |\
372
+
((MFP_PIN_##pin << 16) |\
373
+
(MFPR_DEFAULT & ~(MFPR_DRV_MASK | MFPR_LPM_MASK)) |\
366
374
((MFP_##drv) << 10) | (MFP_##af) |\
367
375
(((MFP_LPM_##lpm) & 0x3) << 7) |\
368
376
(((MFP_LPM_##lpm) & 0x4) << 12) |\
+4
-1
include/asm-arm/arch-pxa/pxa-regs.h
+4
-1
include/asm-arm/arch-pxa/pxa-regs.h
···
110
110
#define DALGN __REG(0x400000a0) /* DMA Alignment Register */
111
111
#define DINT __REG(0x400000f0) /* DMA Interrupt Register */
112
112
113
-
#define DRCMR(n) __REG2(0x40000100, (n)<<2)
113
+
#define DRCMR(n) (*(((n) < 64) ? \
114
+
&__REG2(0x40000100, ((n) & 0x3f) << 2) : \
115
+
&__REG2(0x40001100, ((n) & 0x3f) << 2)))
116
+
114
117
#define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */
115
118
#define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */
116
119
#define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */