Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"A set of x86 fixes:
- Cure the LDT remapping to user space on 5 level paging which ended
up in the KASLR space
- Remove LDT mapping before freeing the LDT pages
- Make NFIT MCE handling more robust
- Unbreak the VSMP build by removing the dependency on paravirt ops
- Support broken PIT emulation on Microsoft hyperV
- Don't trace vmware_sched_clock() to avoid tracer recursion
- Remove -pipe from KBUILD CFLAGS which breaks clang and is also
slower on GCC
- Trivial coding style and typo fixes"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/cpu/vmware: Do not trace vmware_sched_clock()
x86/vsmp: Remove dependency on pv_irq_ops
x86/ldt: Remove unused variable in map_ldt_struct()
x86/ldt: Unmap PTEs for the slot before freeing LDT pages
x86/mm: Move LDT remap out of KASLR region on 5-level paging
acpi/nfit, x86/mce: Validate a MCE's address before using it
acpi/nfit, x86/mce: Handle only uncorrectable machine checks
x86/build: Remove -pipe from KBUILD_CFLAGS
x86/hyper-v: Fix indentation in hv_do_fast_hypercall16()
Documentation/x86: Fix typo in zero-page.txt
x86/hyper-v: Enable PIT shutdown quirk
clockevents/drivers/i8253: Add support for PIT shutdown quirk
+114
-138
+18
-16
Documentation/x86/x86_64/mm.txt
+18
-16
Documentation/x86/x86_64/mm.txt
···
34
34
____________________________________________________________|___________________________________________________________
35
35
| | | |
36
36
ffff800000000000 | -128 TB | ffff87ffffffffff | 8 TB | ... guard hole, also reserved for hypervisor
37
-
ffff880000000000 | -120 TB | ffffc7ffffffffff | 64 TB | direct mapping of all physical memory (page_offset_base)
38
-
ffffc80000000000 | -56 TB | ffffc8ffffffffff | 1 TB | ... unused hole
37
+
ffff880000000000 | -120 TB | ffff887fffffffff | 0.5 TB | LDT remap for PTI
38
+
ffff888000000000 | -119.5 TB | ffffc87fffffffff | 64 TB | direct mapping of all physical memory (page_offset_base)
39
+
ffffc88000000000 | -55.5 TB | ffffc8ffffffffff | 0.5 TB | ... unused hole
39
40
ffffc90000000000 | -55 TB | ffffe8ffffffffff | 32 TB | vmalloc/ioremap space (vmalloc_base)
40
41
ffffe90000000000 | -23 TB | ffffe9ffffffffff | 1 TB | ... unused hole
41
42
ffffea0000000000 | -22 TB | ffffeaffffffffff | 1 TB | virtual memory map (vmemmap_base)
42
43
ffffeb0000000000 | -21 TB | ffffebffffffffff | 1 TB | ... unused hole
43
44
ffffec0000000000 | -20 TB | fffffbffffffffff | 16 TB | KASAN shadow memory
45
+
__________________|____________|__________________|_________|____________________________________________________________
46
+
|
47
+
| Identical layout to the 56-bit one from here on:
48
+
____________________________________________________________|____________________________________________________________
49
+
| | | |
44
50
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
45
51
| | | | vaddr_end for KASLR
46
52
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
47
-
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | LDT remap for PTI
53
+
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
48
54
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
49
-
__________________|____________|__________________|_________|____________________________________________________________
50
-
|
51
-
| Identical layout to the 47-bit one from here on:
52
-
____________________________________________________________|____________________________________________________________
53
-
| | | |
54
55
ffffff8000000000 | -512 GB | ffffffeeffffffff | 444 GB | ... unused hole
55
56
ffffffef00000000 | -68 GB | fffffffeffffffff | 64 GB | EFI region mapping space
56
57
ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | ... unused hole
···
84
83
__________________|____________|__________________|_________|___________________________________________________________
85
84
| | | |
86
85
0000800000000000 | +64 PB | ffff7fffffffffff | ~16K PB | ... huge, still almost 64 bits wide hole of non-canonical
87
-
| | | | virtual memory addresses up to the -128 TB
86
+
| | | | virtual memory addresses up to the -64 PB
88
87
| | | | starting offset of kernel mappings.
89
88
__________________|____________|__________________|_________|___________________________________________________________
90
89
|
···
92
91
____________________________________________________________|___________________________________________________________
93
92
| | | |
94
93
ff00000000000000 | -64 PB | ff0fffffffffffff | 4 PB | ... guard hole, also reserved for hypervisor
95
-
ff10000000000000 | -60 PB | ff8fffffffffffff | 32 PB | direct mapping of all physical memory (page_offset_base)
96
-
ff90000000000000 | -28 PB | ff9fffffffffffff | 4 PB | LDT remap for PTI
94
+
ff10000000000000 | -60 PB | ff10ffffffffffff | 0.25 PB | LDT remap for PTI
95
+
ff11000000000000 | -59.75 PB | ff90ffffffffffff | 32 PB | direct mapping of all physical memory (page_offset_base)
96
+
ff91000000000000 | -27.75 PB | ff9fffffffffffff | 3.75 PB | ... unused hole
97
97
ffa0000000000000 | -24 PB | ffd1ffffffffffff | 12.5 PB | vmalloc/ioremap space (vmalloc_base)
98
98
ffd2000000000000 | -11.5 PB | ffd3ffffffffffff | 0.5 PB | ... unused hole
99
99
ffd4000000000000 | -11 PB | ffd5ffffffffffff | 0.5 PB | virtual memory map (vmemmap_base)
100
100
ffd6000000000000 | -10.5 PB | ffdeffffffffffff | 2.25 PB | ... unused hole
101
101
ffdf000000000000 | -8.25 PB | fffffdffffffffff | ~8 PB | KASAN shadow memory
102
-
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
103
-
| | | | vaddr_end for KASLR
104
-
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
105
-
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
106
-
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
107
102
__________________|____________|__________________|_________|____________________________________________________________
108
103
|
109
104
| Identical layout to the 47-bit one from here on:
110
105
____________________________________________________________|____________________________________________________________
111
106
| | | |
107
+
fffffc0000000000 | -4 TB | fffffdffffffffff | 2 TB | ... unused hole
108
+
| | | | vaddr_end for KASLR
109
+
fffffe0000000000 | -2 TB | fffffe7fffffffff | 0.5 TB | cpu_entry_area mapping
110
+
fffffe8000000000 | -1.5 TB | fffffeffffffffff | 0.5 TB | ... unused hole
111
+
ffffff0000000000 | -1 TB | ffffff7fffffffff | 0.5 TB | %esp fixup stacks
112
112
ffffff8000000000 | -512 GB | ffffffeeffffffff | 444 GB | ... unused hole
113
113
ffffffef00000000 | -68 GB | fffffffeffffffff | 64 GB | EFI region mapping space
114
114
ffffffff00000000 | -4 GB | ffffffff7fffffff | 2 GB | ... unused hole
+1
-1
Documentation/x86/zero-page.txt
+1
-1
Documentation/x86/zero-page.txt
···
25
25
0C8/004 ALL ext_cmd_line_ptr cmd_line_ptr high 32bits
26
26
140/080 ALL edid_info Video mode setup (struct edid_info)
27
27
1C0/020 ALL efi_info EFI 32 information (struct efi_info)
28
-
1E0/004 ALL alk_mem_k Alternative mem check, in KB
28
+
1E0/004 ALL alt_mem_k Alternative mem check, in KB
29
29
1E4/004 ALL scratch Scratch field for the kernel setup code
30
30
1E8/001 ALL e820_entries Number of entries in e820_table (below)
31
31
1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below)
-1
arch/x86/Kconfig
-1
arch/x86/Kconfig
+1
-3
arch/x86/Makefile
+1
-3
arch/x86/Makefile
···
213
213
KBUILD_LDFLAGS += $(call ld-option, -z max-page-size=0x200000)
214
214
endif
215
215
216
-
# Speed up the build
217
-
KBUILD_CFLAGS += -pipe
218
216
# Workaround for a gcc prelease that unfortunately was shipped in a suse release
219
217
KBUILD_CFLAGS += -Wno-sign-compare
220
218
#
···
237
239
archmacros:
238
240
$(Q)$(MAKE) $(build)=arch/x86/kernel arch/x86/kernel/macros.s
239
241
240
-
ASM_MACRO_FLAGS = -Wa,arch/x86/kernel/macros.s -Wa,-
242
+
ASM_MACRO_FLAGS = -Wa,arch/x86/kernel/macros.s
241
243
export ASM_MACRO_FLAGS
242
244
KBUILD_CFLAGS += $(ASM_MACRO_FLAGS)
243
245
+2
arch/x86/include/asm/mce.h
+2
arch/x86/include/asm/mce.h
···
221
221
222
222
int mce_available(struct cpuinfo_x86 *c);
223
223
bool mce_is_memory_error(struct mce *m);
224
+
bool mce_is_correctable(struct mce *m);
225
+
int mce_usable_address(struct mce *m);
224
226
225
227
DECLARE_PER_CPU(unsigned, mce_exception_count);
226
228
DECLARE_PER_CPU(unsigned, mce_poll_count);
+1
-1
arch/x86/include/asm/mshyperv.h
+1
-1
arch/x86/include/asm/mshyperv.h
+7
-5
arch/x86/include/asm/page_64_types.h
+7
-5
arch/x86/include/asm/page_64_types.h
···
33
33
34
34
/*
35
35
* Set __PAGE_OFFSET to the most negative possible address +
36
-
* PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
37
-
* hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
38
-
* what Xen requires.
36
+
* PGDIR_SIZE*17 (pgd slot 273).
37
+
*
38
+
* The gap is to allow a space for LDT remap for PTI (1 pgd slot) and space for
39
+
* a hypervisor (16 slots). Choosing 16 slots for a hypervisor is arbitrary,
40
+
* but it's what Xen requires.
39
41
*/
40
-
#define __PAGE_OFFSET_BASE_L5 _AC(0xff10000000000000, UL)
41
-
#define __PAGE_OFFSET_BASE_L4 _AC(0xffff880000000000, UL)
42
+
#define __PAGE_OFFSET_BASE_L5 _AC(0xff11000000000000, UL)
43
+
#define __PAGE_OFFSET_BASE_L4 _AC(0xffff888000000000, UL)
42
44
43
45
#ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
44
46
#define __PAGE_OFFSET page_offset_base
+1
-3
arch/x86/include/asm/pgtable_64_types.h
+1
-3
arch/x86/include/asm/pgtable_64_types.h
···
111
111
*/
112
112
#define MAXMEM (1UL << MAX_PHYSMEM_BITS)
113
113
114
-
#define LDT_PGD_ENTRY_L4 -3UL
115
-
#define LDT_PGD_ENTRY_L5 -112UL
116
-
#define LDT_PGD_ENTRY (pgtable_l5_enabled() ? LDT_PGD_ENTRY_L5 : LDT_PGD_ENTRY_L4)
114
+
#define LDT_PGD_ENTRY -240UL
117
115
#define LDT_BASE_ADDR (LDT_PGD_ENTRY << PGDIR_SHIFT)
118
116
#define LDT_END_ADDR (LDT_BASE_ADDR + PGDIR_SIZE)
119
117
+4
-2
arch/x86/kernel/cpu/mcheck/mce.c
+4
-2
arch/x86/kernel/cpu/mcheck/mce.c
···
485
485
* be somewhat complicated (e.g. segment offset would require an instruction
486
486
* parser). So only support physical addresses up to page granuality for now.
487
487
*/
488
-
static int mce_usable_address(struct mce *m)
488
+
int mce_usable_address(struct mce *m)
489
489
{
490
490
if (!(m->status & MCI_STATUS_ADDRV))
491
491
return 0;
···
505
505
506
506
return 1;
507
507
}
508
+
EXPORT_SYMBOL_GPL(mce_usable_address);
508
509
509
510
bool mce_is_memory_error(struct mce *m)
510
511
{
···
535
534
}
536
535
EXPORT_SYMBOL_GPL(mce_is_memory_error);
537
536
538
-
static bool mce_is_correctable(struct mce *m)
537
+
bool mce_is_correctable(struct mce *m)
539
538
{
540
539
if (m->cpuvendor == X86_VENDOR_AMD && m->status & MCI_STATUS_DEFERRED)
541
540
return false;
···
548
547
549
548
return true;
550
549
}
550
+
EXPORT_SYMBOL_GPL(mce_is_correctable);
551
551
552
552
static bool cec_add_mce(struct mce *m)
553
553
{
+11
arch/x86/kernel/cpu/mshyperv.c
+11
arch/x86/kernel/cpu/mshyperv.c
···
20
20
#include <linux/interrupt.h>
21
21
#include <linux/irq.h>
22
22
#include <linux/kexec.h>
23
+
#include <linux/i8253.h>
23
24
#include <asm/processor.h>
24
25
#include <asm/hypervisor.h>
25
26
#include <asm/hyperv-tlfs.h>
···
295
294
*/
296
295
if (efi_enabled(EFI_BOOT))
297
296
x86_platform.get_nmi_reason = hv_get_nmi_reason;
297
+
298
+
/*
299
+
* Hyper-V VMs have a PIT emulation quirk such that zeroing the
300
+
* counter register during PIT shutdown restarts the PIT. So it
301
+
* continues to interrupt @18.2 HZ. Setting i8253_clear_counter
302
+
* to false tells pit_shutdown() not to zero the counter so that
303
+
* the PIT really is shutdown. Generation 2 VMs don't have a PIT,
304
+
* and setting this value has no effect.
305
+
*/
306
+
i8253_clear_counter_on_shutdown = false;
298
307
299
308
#if IS_ENABLED(CONFIG_HYPERV)
300
309
/*
+1
-1
arch/x86/kernel/cpu/vmware.c
+1
-1
arch/x86/kernel/cpu/vmware.c
+38
-21
arch/x86/kernel/ldt.c
+38
-21
arch/x86/kernel/ldt.c
···
199
199
/*
200
200
* If PTI is enabled, this maps the LDT into the kernelmode and
201
201
* usermode tables for the given mm.
202
-
*
203
-
* There is no corresponding unmap function. Even if the LDT is freed, we
204
-
* leave the PTEs around until the slot is reused or the mm is destroyed.
205
-
* This is harmless: the LDT is always in ordinary memory, and no one will
206
-
* access the freed slot.
207
-
*
208
-
* If we wanted to unmap freed LDTs, we'd also need to do a flush to make
209
-
* it useful, and the flush would slow down modify_ldt().
210
202
*/
211
203
static int
212
204
map_ldt_struct(struct mm_struct *mm, struct ldt_struct *ldt, int slot)
···
206
214
unsigned long va;
207
215
bool is_vmalloc;
208
216
spinlock_t *ptl;
209
-
pgd_t *pgd;
210
-
int i;
217
+
int i, nr_pages;
211
218
212
219
if (!static_cpu_has(X86_FEATURE_PTI))
213
220
return 0;
···
220
229
/* Check if the current mappings are sane */
221
230
sanity_check_ldt_mapping(mm);
222
231
223
-
/*
224
-
* Did we already have the top level entry allocated? We can't
225
-
* use pgd_none() for this because it doens't do anything on
226
-
* 4-level page table kernels.
227
-
*/
228
-
pgd = pgd_offset(mm, LDT_BASE_ADDR);
229
-
230
232
is_vmalloc = is_vmalloc_addr(ldt->entries);
231
233
232
-
for (i = 0; i * PAGE_SIZE < ldt->nr_entries * LDT_ENTRY_SIZE; i++) {
234
+
nr_pages = DIV_ROUND_UP(ldt->nr_entries * LDT_ENTRY_SIZE, PAGE_SIZE);
235
+
236
+
for (i = 0; i < nr_pages; i++) {
233
237
unsigned long offset = i << PAGE_SHIFT;
234
238
const void *src = (char *)ldt->entries + offset;
235
239
unsigned long pfn;
···
258
272
/* Propagate LDT mapping to the user page-table */
259
273
map_ldt_struct_to_user(mm);
260
274
261
-
va = (unsigned long)ldt_slot_va(slot);
262
-
flush_tlb_mm_range(mm, va, va + LDT_SLOT_STRIDE, PAGE_SHIFT, false);
263
-
264
275
ldt->slot = slot;
265
276
return 0;
277
+
}
278
+
279
+
static void unmap_ldt_struct(struct mm_struct *mm, struct ldt_struct *ldt)
280
+
{
281
+
unsigned long va;
282
+
int i, nr_pages;
283
+
284
+
if (!ldt)
285
+
return;
286
+
287
+
/* LDT map/unmap is only required for PTI */
288
+
if (!static_cpu_has(X86_FEATURE_PTI))
289
+
return;
290
+
291
+
nr_pages = DIV_ROUND_UP(ldt->nr_entries * LDT_ENTRY_SIZE, PAGE_SIZE);
292
+
293
+
for (i = 0; i < nr_pages; i++) {
294
+
unsigned long offset = i << PAGE_SHIFT;
295
+
spinlock_t *ptl;
296
+
pte_t *ptep;
297
+
298
+
va = (unsigned long)ldt_slot_va(ldt->slot) + offset;
299
+
ptep = get_locked_pte(mm, va, &ptl);
300
+
pte_clear(mm, va, ptep);
301
+
pte_unmap_unlock(ptep, ptl);
302
+
}
303
+
304
+
va = (unsigned long)ldt_slot_va(ldt->slot);
305
+
flush_tlb_mm_range(mm, va, va + nr_pages * PAGE_SIZE, PAGE_SHIFT, false);
266
306
}
267
307
268
308
#else /* !CONFIG_PAGE_TABLE_ISOLATION */
···
297
285
map_ldt_struct(struct mm_struct *mm, struct ldt_struct *ldt, int slot)
298
286
{
299
287
return 0;
288
+
}
289
+
290
+
static void unmap_ldt_struct(struct mm_struct *mm, struct ldt_struct *ldt)
291
+
{
300
292
}
301
293
#endif /* CONFIG_PAGE_TABLE_ISOLATION */
302
294
···
540
524
}
541
525
542
526
install_ldt(mm, new_ldt);
527
+
unmap_ldt_struct(mm, old_ldt);
543
528
free_ldt_struct(old_ldt);
544
529
error = 0;
545
530
+7
-77
arch/x86/kernel/vsmp_64.c
+7
-77
arch/x86/kernel/vsmp_64.c
···
26
26
27
27
#define TOPOLOGY_REGISTER_OFFSET 0x10
28
28
29
-
#if defined CONFIG_PCI && defined CONFIG_PARAVIRT_XXL
30
-
/*
31
-
* Interrupt control on vSMPowered systems:
32
-
* ~AC is a shadow of IF. If IF is 'on' AC should be 'off'
33
-
* and vice versa.
34
-
*/
35
-
36
-
asmlinkage __visible unsigned long vsmp_save_fl(void)
37
-
{
38
-
unsigned long flags = native_save_fl();
39
-
40
-
if (!(flags & X86_EFLAGS_IF) || (flags & X86_EFLAGS_AC))
41
-
flags &= ~X86_EFLAGS_IF;
42
-
return flags;
43
-
}
44
-
PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl);
45
-
46
-
__visible void vsmp_restore_fl(unsigned long flags)
47
-
{
48
-
if (flags & X86_EFLAGS_IF)
49
-
flags &= ~X86_EFLAGS_AC;
50
-
else
51
-
flags |= X86_EFLAGS_AC;
52
-
native_restore_fl(flags);
53
-
}
54
-
PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
55
-
56
-
asmlinkage __visible void vsmp_irq_disable(void)
57
-
{
58
-
unsigned long flags = native_save_fl();
59
-
60
-
native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
61
-
}
62
-
PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
63
-
64
-
asmlinkage __visible void vsmp_irq_enable(void)
65
-
{
66
-
unsigned long flags = native_save_fl();
67
-
68
-
native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
69
-
}
70
-
PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);
71
-
72
-
static unsigned __init vsmp_patch(u8 type, void *ibuf,
73
-
unsigned long addr, unsigned len)
74
-
{
75
-
switch (type) {
76
-
case PARAVIRT_PATCH(irq.irq_enable):
77
-
case PARAVIRT_PATCH(irq.irq_disable):
78
-
case PARAVIRT_PATCH(irq.save_fl):
79
-
case PARAVIRT_PATCH(irq.restore_fl):
80
-
return paravirt_patch_default(type, ibuf, addr, len);
81
-
default:
82
-
return native_patch(type, ibuf, addr, len);
83
-
}
84
-
85
-
}
86
-
87
-
static void __init set_vsmp_pv_ops(void)
29
+
#ifdef CONFIG_PCI
30
+
static void __init set_vsmp_ctl(void)
88
31
{
89
32
void __iomem *address;
90
33
unsigned int cap, ctl, cfg;
···
52
109
}
53
110
#endif
54
111
55
-
if (cap & ctl & (1 << 4)) {
56
-
/* Setup irq ops and turn on vSMP IRQ fastpath handling */
57
-
pv_ops.irq.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
58
-
pv_ops.irq.irq_enable = PV_CALLEE_SAVE(vsmp_irq_enable);
59
-
pv_ops.irq.save_fl = PV_CALLEE_SAVE(vsmp_save_fl);
60
-
pv_ops.irq.restore_fl = PV_CALLEE_SAVE(vsmp_restore_fl);
61
-
pv_ops.init.patch = vsmp_patch;
62
-
ctl &= ~(1 << 4);
63
-
}
64
112
writel(ctl, address + 4);
65
113
ctl = readl(address + 4);
66
114
pr_info("vSMP CTL: control set to:0x%08x\n", ctl);
67
115
68
116
early_iounmap(address, 8);
69
117
}
70
-
#else
71
-
static void __init set_vsmp_pv_ops(void)
72
-
{
73
-
}
74
-
#endif
75
-
76
-
#ifdef CONFIG_PCI
77
118
static int is_vsmp = -1;
78
119
79
120
static void __init detect_vsmp_box(void)
···
91
164
{
92
165
return 0;
93
166
}
167
+
static void __init set_vsmp_ctl(void)
168
+
{
169
+
}
94
170
#endif
95
171
96
172
static void __init vsmp_cap_cpus(void)
97
173
{
98
-
#if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP)
174
+
#if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
99
175
void __iomem *address;
100
176
unsigned int cfg, topology, node_shift, maxcpus;
101
177
···
151
221
152
222
vsmp_cap_cpus();
153
223
154
-
set_vsmp_pv_ops();
224
+
set_vsmp_ctl();
155
225
return;
156
226
}
+3
-3
arch/x86/xen/mmu_pv.c
+3
-3
arch/x86/xen/mmu_pv.c
···
1905
1905
init_top_pgt[0] = __pgd(0);
1906
1906
1907
1907
/* Pre-constructed entries are in pfn, so convert to mfn */
1908
-
/* L4[272] -> level3_ident_pgt */
1908
+
/* L4[273] -> level3_ident_pgt */
1909
1909
/* L4[511] -> level3_kernel_pgt */
1910
1910
convert_pfn_mfn(init_top_pgt);
1911
1911
···
1925
1925
addr[0] = (unsigned long)pgd;
1926
1926
addr[1] = (unsigned long)l3;
1927
1927
addr[2] = (unsigned long)l2;
1928
-
/* Graft it onto L4[272][0]. Note that we creating an aliasing problem:
1929
-
* Both L4[272][0] and L4[511][510] have entries that point to the same
1928
+
/* Graft it onto L4[273][0]. Note that we creating an aliasing problem:
1929
+
* Both L4[273][0] and L4[511][510] have entries that point to the same
1930
1930
* L2 (PMD) tables. Meaning that if you modify it in __va space
1931
1931
* it will be also modified in the __ka space! (But if you just
1932
1932
* modify the PMD table to point to other PTE's or none, then you
+6
-2
drivers/acpi/nfit/mce.c
+6
-2
drivers/acpi/nfit/mce.c
···
25
25
struct acpi_nfit_desc *acpi_desc;
26
26
struct nfit_spa *nfit_spa;
27
27
28
-
/* We only care about memory errors */
29
-
if (!mce_is_memory_error(mce))
28
+
/* We only care about uncorrectable memory errors */
29
+
if (!mce_is_memory_error(mce) || mce_is_correctable(mce))
30
+
return NOTIFY_DONE;
31
+
32
+
/* Verify the address reported in the MCE is valid. */
33
+
if (!mce_usable_address(mce))
30
34
return NOTIFY_DONE;
31
35
32
36
/*
+12
-2
drivers/clocksource/i8253.c
+12
-2
drivers/clocksource/i8253.c
···
20
20
DEFINE_RAW_SPINLOCK(i8253_lock);
21
21
EXPORT_SYMBOL(i8253_lock);
22
22
23
+
/*
24
+
* Handle PIT quirk in pit_shutdown() where zeroing the counter register
25
+
* restarts the PIT, negating the shutdown. On platforms with the quirk,
26
+
* platform specific code can set this to false.
27
+
*/
28
+
bool i8253_clear_counter_on_shutdown __ro_after_init = true;
29
+
23
30
#ifdef CONFIG_CLKSRC_I8253
24
31
/*
25
32
* Since the PIT overflows every tick, its not very useful
···
116
109
raw_spin_lock(&i8253_lock);
117
110
118
111
outb_p(0x30, PIT_MODE);
119
-
outb_p(0, PIT_CH0);
120
-
outb_p(0, PIT_CH0);
112
+
113
+
if (i8253_clear_counter_on_shutdown) {
114
+
outb_p(0, PIT_CH0);
115
+
outb_p(0, PIT_CH0);
116
+
}
121
117
122
118
raw_spin_unlock(&i8253_lock);
123
119
return 0;