Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'cpufreq-arm-updates-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm

Pull CPUFreq Arm updates for 7.0 from Viresh Kumar:

"- Update cpufreq-dt-platdev list for tegra, qcom, TI (Aaron Kling,
Dhruva Gole, and Konrad Dybcio).

- Minor improvements to the cpufreq / cpumask rust implementation
(Alexandre Courbot, Alice Ryhl, Tamir Duberstein, and Yilin Chen).

- Add support for AM62L3 SoC to ti-cpufreq driver (Dhruva Gole).

- Update FIE arch_freq_scale in ticks for non-PCC regs (Jie Zhan).

- Other minor cleanups / improvements (Felix Gu, Juan Martinez, Luca
Weiss, and Sergey Shtylyov)."

* tag 'cpufreq-arm-updates-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
cpufreq: scmi: Fix device_node reference leak in scmi_cpu_domain_id()
cpufreq: ti-cpufreq: add support for AM62L3 SoC
cpufreq: dt-platdev: Add ti,am62l3 to blocklist
cpufreq/amd-pstate: Add comment explaining nominal_perf usage for performance policy
cpufreq: scmi: correct SCMI explanation
cpufreq: dt-platdev: Block the driver from probing on more QC platforms
rust: cpumask: rename methods of Cpumask for clarity and consistency
cpufreq: CPPC: Update FIE arch_freq_scale in ticks for non-PCC regs
cpufreq: CPPC: Factor out cppc_fie_kworker_init()
ACPI: CPPC: Factor out and export per-cpu cppc_perf_ctrs_in_pcc_cpu()
rust: cpufreq: replace `kernel::c_str!` with C-Strings
cpufreq: Add Tegra186 and Tegra194 to cpufreq-dt-platdev blocklist
dt-bindings: cpufreq: qcom-hw: document Milos CPUFREQ Hardware
rust: cpufreq: add __rust_helper to helpers
rust: cpufreq: always inline functions using build_assert with arguments

+165 -67
+2
Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
··· 35 35 - description: v2 of CPUFREQ HW (EPSS) 36 36 items: 37 37 - enum: 38 + - qcom,milos-cpufreq-epss 38 39 - qcom,qcs8300-cpufreq-epss 39 40 - qcom,qdu1000-cpufreq-epss 40 41 - qcom,sa8255p-cpufreq-epss ··· 170 169 compatible: 171 170 contains: 172 171 enum: 172 + - qcom,milos-cpufreq-epss 173 173 - qcom,qcs8300-cpufreq-epss 174 174 - qcom,sc7280-cpufreq-epss 175 175 - qcom,sm8250-cpufreq-epss
+27 -21
drivers/acpi/cppc_acpi.c
··· 1424 1424 EXPORT_SYMBOL_GPL(cppc_get_perf_caps); 1425 1425 1426 1426 /** 1427 + * cppc_perf_ctrs_in_pcc_cpu - Check if any perf counters of a CPU are in PCC. 1428 + * @cpu: CPU on which to check perf counters. 1429 + * 1430 + * Return: true if any of the counters are in PCC regions, false otherwise 1431 + */ 1432 + bool cppc_perf_ctrs_in_pcc_cpu(unsigned int cpu) 1433 + { 1434 + struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu); 1435 + struct cpc_register_resource *ref_perf_reg; 1436 + 1437 + /* 1438 + * If reference perf register is not supported then we should use the 1439 + * nominal perf value 1440 + */ 1441 + ref_perf_reg = &cpc_desc->cpc_regs[REFERENCE_PERF]; 1442 + if (!CPC_SUPPORTED(ref_perf_reg)) 1443 + ref_perf_reg = &cpc_desc->cpc_regs[NOMINAL_PERF]; 1444 + 1445 + return CPC_IN_PCC(&cpc_desc->cpc_regs[DELIVERED_CTR]) || 1446 + CPC_IN_PCC(&cpc_desc->cpc_regs[REFERENCE_CTR]) || 1447 + CPC_IN_PCC(&cpc_desc->cpc_regs[CTR_WRAP_TIME]) || 1448 + CPC_IN_PCC(ref_perf_reg); 1449 + } 1450 + EXPORT_SYMBOL_GPL(cppc_perf_ctrs_in_pcc_cpu); 1451 + 1452 + /** 1427 1453 * cppc_perf_ctrs_in_pcc - Check if any perf counters are in a PCC region. 1428 1454 * 1429 1455 * CPPC has flexibility about how CPU performance counters are accessed. ··· 1463 1437 int cpu; 1464 1438 1465 1439 for_each_online_cpu(cpu) { 1466 - struct cpc_register_resource *ref_perf_reg; 1467 - struct cpc_desc *cpc_desc; 1468 - 1469 - cpc_desc = per_cpu(cpc_desc_ptr, cpu); 1470 - 1471 - if (CPC_IN_PCC(&cpc_desc->cpc_regs[DELIVERED_CTR]) || 1472 - CPC_IN_PCC(&cpc_desc->cpc_regs[REFERENCE_CTR]) || 1473 - CPC_IN_PCC(&cpc_desc->cpc_regs[CTR_WRAP_TIME])) 1474 - return true; 1475 - 1476 - 1477 - ref_perf_reg = &cpc_desc->cpc_regs[REFERENCE_PERF]; 1478 - 1479 - /* 1480 - * If reference perf register is not supported then we should 1481 - * use the nominal perf value 1482 - */ 1483 - if (!CPC_SUPPORTED(ref_perf_reg)) 1484 - ref_perf_reg = &cpc_desc->cpc_regs[NOMINAL_PERF]; 1485 - 1486 - if (CPC_IN_PCC(ref_perf_reg)) 1440 + if (cppc_perf_ctrs_in_pcc_cpu(cpu)) 1487 1441 return true; 1488 1442 } 1489 1443
+13
drivers/cpufreq/amd-pstate.c
··· 636 636 WRITE_ONCE(cpudata->max_limit_freq, policy->max); 637 637 638 638 if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE) { 639 + /* 640 + * For performance policy, set MinPerf to nominal_perf rather than 641 + * highest_perf or lowest_nonlinear_perf. 642 + * 643 + * Per commit 0c411b39e4f4c, using highest_perf was observed 644 + * to cause frequency throttling on power-limited platforms, leading to 645 + * performance regressions. Using lowest_nonlinear_perf would limit 646 + * performance too much for HPC workloads requiring high frequency 647 + * operation and minimal wakeup latency from idle states. 648 + * 649 + * nominal_perf therefore provides a balance by avoiding throttling 650 + * while still maintaining enough performance for HPC workloads. 651 + */ 639 652 perf.min_limit_perf = min(perf.nominal_perf, perf.max_limit_perf); 640 653 WRITE_ONCE(cpudata->min_limit_freq, min(cpudata->nominal_freq, cpudata->max_limit_freq)); 641 654 } else {
+65 -33
drivers/cpufreq/cppc_cpufreq.c
··· 54 54 struct cppc_perf_fb_ctrs *fb_ctrs_t1); 55 55 56 56 /** 57 - * cppc_scale_freq_workfn - CPPC arch_freq_scale updater for frequency invariance 58 - * @work: The work item. 57 + * __cppc_scale_freq_tick - CPPC arch_freq_scale updater for frequency invariance 58 + * @cppc_fi: per-cpu CPPC FIE data. 59 59 * 60 - * The CPPC driver register itself with the topology core to provide its own 60 + * The CPPC driver registers itself with the topology core to provide its own 61 61 * implementation (cppc_scale_freq_tick()) of topology_scale_freq_tick() which 62 62 * gets called by the scheduler on every tick. 63 63 * 64 64 * Note that the arch specific counters have higher priority than CPPC counters, 65 65 * if available, though the CPPC driver doesn't need to have any special 66 66 * handling for that. 67 - * 68 - * On an invocation of cppc_scale_freq_tick(), we schedule an irq work (since we 69 - * reach here from hard-irq context), which then schedules a normal work item 70 - * and cppc_scale_freq_workfn() updates the per_cpu arch_freq_scale variable 71 - * based on the counter updates since the last tick. 72 67 */ 73 - static void cppc_scale_freq_workfn(struct kthread_work *work) 68 + static void __cppc_scale_freq_tick(struct cppc_freq_invariance *cppc_fi) 74 69 { 75 - struct cppc_freq_invariance *cppc_fi; 76 70 struct cppc_perf_fb_ctrs fb_ctrs = {0}; 77 71 struct cppc_cpudata *cpu_data; 78 72 unsigned long local_freq_scale; 79 73 u64 perf; 80 74 81 - cppc_fi = container_of(work, struct cppc_freq_invariance, work); 82 75 cpu_data = cppc_fi->cpu_data; 83 76 84 77 if (cppc_get_perf_ctrs(cppc_fi->cpu, &fb_ctrs)) { ··· 95 102 per_cpu(arch_freq_scale, cppc_fi->cpu) = local_freq_scale; 96 103 } 97 104 105 + static void cppc_scale_freq_tick(void) 106 + { 107 + __cppc_scale_freq_tick(&per_cpu(cppc_freq_inv, smp_processor_id())); 108 + } 109 + 110 + static struct scale_freq_data cppc_sftd = { 111 + .source = SCALE_FREQ_SOURCE_CPPC, 112 + .set_freq_scale = cppc_scale_freq_tick, 113 + }; 114 + 115 + static void cppc_scale_freq_workfn(struct kthread_work *work) 116 + { 117 + struct cppc_freq_invariance *cppc_fi; 118 + 119 + cppc_fi = container_of(work, struct cppc_freq_invariance, work); 120 + __cppc_scale_freq_tick(cppc_fi); 121 + } 122 + 98 123 static void cppc_irq_work(struct irq_work *irq_work) 99 124 { 100 125 struct cppc_freq_invariance *cppc_fi; ··· 121 110 kthread_queue_work(kworker_fie, &cppc_fi->work); 122 111 } 123 112 124 - static void cppc_scale_freq_tick(void) 113 + /* 114 + * Reading perf counters may sleep if the CPC regs are in PCC. Thus, we 115 + * schedule an irq work in scale_freq_tick (since we reach here from hard-irq 116 + * context), which then schedules a normal work item cppc_scale_freq_workfn() 117 + * that updates the per_cpu arch_freq_scale variable based on the counter 118 + * updates since the last tick. 119 + */ 120 + static void cppc_scale_freq_tick_pcc(void) 125 121 { 126 122 struct cppc_freq_invariance *cppc_fi = &per_cpu(cppc_freq_inv, smp_processor_id()); 127 123 ··· 139 121 irq_work_queue(&cppc_fi->irq_work); 140 122 } 141 123 142 - static struct scale_freq_data cppc_sftd = { 124 + static struct scale_freq_data cppc_sftd_pcc = { 143 125 .source = SCALE_FREQ_SOURCE_CPPC, 144 - .set_freq_scale = cppc_scale_freq_tick, 126 + .set_freq_scale = cppc_scale_freq_tick_pcc, 145 127 }; 146 128 147 129 static void cppc_cpufreq_cpu_fie_init(struct cpufreq_policy *policy) 148 130 { 131 + struct scale_freq_data *sftd = &cppc_sftd; 149 132 struct cppc_freq_invariance *cppc_fi; 150 133 int cpu, ret; 151 134 ··· 157 138 cppc_fi = &per_cpu(cppc_freq_inv, cpu); 158 139 cppc_fi->cpu = cpu; 159 140 cppc_fi->cpu_data = policy->driver_data; 160 - kthread_init_work(&cppc_fi->work, cppc_scale_freq_workfn); 161 - init_irq_work(&cppc_fi->irq_work, cppc_irq_work); 141 + if (cppc_perf_ctrs_in_pcc_cpu(cpu)) { 142 + kthread_init_work(&cppc_fi->work, cppc_scale_freq_workfn); 143 + init_irq_work(&cppc_fi->irq_work, cppc_irq_work); 144 + sftd = &cppc_sftd_pcc; 145 + } 162 146 163 147 ret = cppc_get_perf_ctrs(cpu, &cppc_fi->prev_perf_fb_ctrs); 164 148 ··· 177 155 } 178 156 179 157 /* Register for freq-invariance */ 180 - topology_set_scale_freq_source(&cppc_sftd, policy->cpus); 158 + topology_set_scale_freq_source(sftd, policy->cpus); 181 159 } 182 160 183 161 /* ··· 200 178 topology_clear_scale_freq_source(SCALE_FREQ_SOURCE_CPPC, policy->related_cpus); 201 179 202 180 for_each_cpu(cpu, policy->related_cpus) { 181 + if (!cppc_perf_ctrs_in_pcc_cpu(cpu)) 182 + continue; 203 183 cppc_fi = &per_cpu(cppc_freq_inv, cpu); 204 184 irq_work_sync(&cppc_fi->irq_work); 205 185 kthread_cancel_work_sync(&cppc_fi->work); 206 186 } 207 187 } 208 188 209 - static void __init cppc_freq_invariance_init(void) 189 + static void cppc_fie_kworker_init(void) 210 190 { 211 191 struct sched_attr attr = { 212 192 .size = sizeof(struct sched_attr), ··· 225 201 }; 226 202 int ret; 227 203 228 - if (fie_disabled != FIE_ENABLED && fie_disabled != FIE_DISABLED) { 229 - fie_disabled = FIE_ENABLED; 230 - if (cppc_perf_ctrs_in_pcc()) { 231 - pr_info("FIE not enabled on systems with registers in PCC\n"); 232 - fie_disabled = FIE_DISABLED; 233 - } 234 - } 235 - 236 - if (fie_disabled) 237 - return; 238 - 239 204 kworker_fie = kthread_run_worker(0, "cppc_fie"); 240 205 if (IS_ERR(kworker_fie)) { 241 206 pr_warn("%s: failed to create kworker_fie: %ld\n", __func__, 242 207 PTR_ERR(kworker_fie)); 243 208 fie_disabled = FIE_DISABLED; 209 + kworker_fie = NULL; 244 210 return; 245 211 } 246 212 ··· 240 226 ret); 241 227 kthread_destroy_worker(kworker_fie); 242 228 fie_disabled = FIE_DISABLED; 229 + kworker_fie = NULL; 243 230 } 231 + } 232 + 233 + static void __init cppc_freq_invariance_init(void) 234 + { 235 + bool perf_ctrs_in_pcc = cppc_perf_ctrs_in_pcc(); 236 + 237 + if (fie_disabled == FIE_UNSET) { 238 + if (perf_ctrs_in_pcc) { 239 + pr_info("FIE not enabled on systems with registers in PCC\n"); 240 + fie_disabled = FIE_DISABLED; 241 + } else { 242 + fie_disabled = FIE_ENABLED; 243 + } 244 + } 245 + 246 + if (fie_disabled || !perf_ctrs_in_pcc) 247 + return; 248 + 249 + cppc_fie_kworker_init(); 244 250 } 245 251 246 252 static void cppc_freq_invariance_exit(void) 247 253 { 248 - if (fie_disabled) 249 - return; 250 - 251 - kthread_destroy_worker(kworker_fie); 254 + if (kworker_fie) 255 + kthread_destroy_worker(kworker_fie); 252 256 } 253 257 254 258 #else
+6
drivers/cpufreq/cpufreq-dt-platdev.c
··· 147 147 { .compatible = "nvidia,tegra30", }, 148 148 { .compatible = "nvidia,tegra114", }, 149 149 { .compatible = "nvidia,tegra124", }, 150 + { .compatible = "nvidia,tegra186", }, 151 + { .compatible = "nvidia,tegra194", }, 150 152 { .compatible = "nvidia,tegra210", }, 151 153 { .compatible = "nvidia,tegra234", }, 152 154 ··· 171 169 { .compatible = "qcom,sdm845", }, 172 170 { .compatible = "qcom,sdx75", }, 173 171 { .compatible = "qcom,sm6115", }, 172 + { .compatible = "qcom,sm6125", }, 173 + { .compatible = "qcom,sm6150", }, 174 174 { .compatible = "qcom,sm6350", }, 175 175 { .compatible = "qcom,sm6375", }, 176 + { .compatible = "qcom,sm7125", }, 176 177 { .compatible = "qcom,sm7225", }, 177 178 { .compatible = "qcom,sm7325", }, 178 179 { .compatible = "qcom,sm8150", }, ··· 196 191 { .compatible = "ti,am625", }, 197 192 { .compatible = "ti,am62a7", }, 198 193 { .compatible = "ti,am62d2", }, 194 + { .compatible = "ti,am62l3", }, 199 195 { .compatible = "ti,am62p5", }, 200 196 201 197 { .compatible = "qcom,ipq5332", },
+2 -3
drivers/cpufreq/rcpufreq_dt.rs
··· 3 3 //! Rust based implementation of the cpufreq-dt driver. 4 4 5 5 use kernel::{ 6 - c_str, 7 6 clk::Clk, 8 7 cpu, cpufreq, 9 8 cpumask::CpumaskVar, ··· 51 52 52 53 #[vtable] 53 54 impl cpufreq::Driver for CPUFreqDTDriver { 54 - const NAME: &'static CStr = c_str!("cpufreq-dt"); 55 + const NAME: &'static CStr = c"cpufreq-dt"; 55 56 const FLAGS: u16 = cpufreq::flags::NEED_INITIAL_FREQ_CHECK | cpufreq::flags::IS_COOLING_DEV; 56 57 const BOOST_ENABLED: bool = true; 57 58 ··· 196 197 OF_TABLE, 197 198 MODULE_OF_TABLE, 198 199 <CPUFreqDTDriver as platform::Driver>::IdInfo, 199 - [(of::DeviceId::new(c_str!("operating-points-v2")), ())] 200 + [(of::DeviceId::new(c"operating-points-v2"), ())] 200 201 ); 201 202 202 203 impl platform::Driver for CPUFreqDTDriver {
+2 -1
drivers/cpufreq/scmi-cpufreq.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 /* 3 - * System Control and Power Interface (SCMI) based CPUFreq Interface driver 3 + * System Control and Management Interface (SCMI) based CPUFreq Interface driver 4 4 * 5 5 * Copyright (C) 2018-2021 ARM Ltd. 6 6 * Sudeep Holla <sudeep.holla@arm.com> ··· 101 101 return -EINVAL; 102 102 } 103 103 104 + of_node_put(domain_id.np); 104 105 return domain_id.args[0]; 105 106 } 106 107
+33 -1
drivers/cpufreq/ti-cpufreq.c
··· 70 70 #define AM62A7_SUPPORT_R_MPU_OPP BIT(1) 71 71 #define AM62A7_SUPPORT_V_MPU_OPP BIT(2) 72 72 73 + #define AM62L3_EFUSE_E_MPU_OPP 5 74 + #define AM62L3_EFUSE_O_MPU_OPP 15 75 + 76 + #define AM62L3_SUPPORT_E_MPU_OPP BIT(0) 77 + #define AM62L3_SUPPORT_O_MPU_OPP BIT(1) 78 + 73 79 #define AM62P5_EFUSE_O_MPU_OPP 15 74 80 #define AM62P5_EFUSE_S_MPU_OPP 19 75 81 #define AM62P5_EFUSE_T_MPU_OPP 20 ··· 219 213 return calculated_efuse; 220 214 } 221 215 216 + static unsigned long am62l3_efuse_xlate(struct ti_cpufreq_data *opp_data, 217 + unsigned long efuse) 218 + { 219 + unsigned long calculated_efuse = AM62L3_SUPPORT_E_MPU_OPP; 220 + 221 + switch (efuse) { 222 + case AM62L3_EFUSE_O_MPU_OPP: 223 + calculated_efuse |= AM62L3_SUPPORT_O_MPU_OPP; 224 + fallthrough; 225 + case AM62L3_EFUSE_E_MPU_OPP: 226 + calculated_efuse |= AM62L3_SUPPORT_E_MPU_OPP; 227 + } 228 + 229 + return calculated_efuse; 230 + } 231 + 222 232 static struct ti_cpufreq_soc_data am3x_soc_data = { 223 233 .efuse_xlate = amx3_efuse_xlate, 224 234 .efuse_fallback = AM33XX_800M_ARM_MPU_MAX_FREQ, ··· 335 313 static const struct soc_device_attribute k3_cpufreq_soc[] = { 336 314 { .family = "AM62X", }, 337 315 { .family = "AM62AX", }, 338 - { .family = "AM62PX", }, 339 316 { .family = "AM62DX", }, 317 + { .family = "AM62LX", }, 318 + { .family = "AM62PX", }, 340 319 { /* sentinel */ } 341 320 }; 342 321 ··· 352 329 353 330 static struct ti_cpufreq_soc_data am62a7_soc_data = { 354 331 .efuse_xlate = am62a7_efuse_xlate, 332 + .efuse_offset = 0x0, 333 + .efuse_mask = 0x07c0, 334 + .efuse_shift = 0x6, 335 + .multi_regulator = false, 336 + }; 337 + 338 + static struct ti_cpufreq_soc_data am62l3_soc_data = { 339 + .efuse_xlate = am62l3_efuse_xlate, 355 340 .efuse_offset = 0x0, 356 341 .efuse_mask = 0x07c0, 357 342 .efuse_shift = 0x6, ··· 494 463 { .compatible = "ti,am625", .data = &am625_soc_data, }, 495 464 { .compatible = "ti,am62a7", .data = &am62a7_soc_data, }, 496 465 { .compatible = "ti,am62d2", .data = &am62a7_soc_data, }, 466 + { .compatible = "ti,am62l3", .data = &am62l3_soc_data, }, 497 467 { .compatible = "ti,am62p5", .data = &am62p5_soc_data, }, 498 468 /* legacy */ 499 469 { .compatible = "ti,omap3430", .data = &omap34xx_soc_data, },
+5
include/acpi/cppc_acpi.h
··· 154 154 extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls); 155 155 extern int cppc_set_enable(int cpu, bool enable); 156 156 extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps); 157 + extern bool cppc_perf_ctrs_in_pcc_cpu(unsigned int cpu); 157 158 extern bool cppc_perf_ctrs_in_pcc(void); 158 159 extern unsigned int cppc_perf_to_khz(struct cppc_perf_caps *caps, unsigned int perf); 159 160 extern unsigned int cppc_khz_to_perf(struct cppc_perf_caps *caps, unsigned int freq); ··· 204 203 static inline int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps) 205 204 { 206 205 return -EOPNOTSUPP; 206 + } 207 + static inline bool cppc_perf_ctrs_in_pcc_cpu(unsigned int cpu) 208 + { 209 + return false; 207 210 } 208 211 static inline bool cppc_perf_ctrs_in_pcc(void) 209 212 {
+2 -1
rust/helpers/cpufreq.c
··· 3 3 #include <linux/cpufreq.h> 4 4 5 5 #ifdef CONFIG_CPU_FREQ 6 - void rust_helper_cpufreq_register_em_with_opp(struct cpufreq_policy *policy) 6 + __rust_helper void 7 + rust_helper_cpufreq_register_em_with_opp(struct cpufreq_policy *policy) 7 8 { 8 9 cpufreq_register_em_with_opp(policy); 9 10 }
+3 -2
rust/kernel/cpufreq.rs
··· 840 840 /// ``` 841 841 /// use kernel::{ 842 842 /// cpufreq, 843 - /// c_str, 844 843 /// device::{Core, Device}, 845 844 /// macros::vtable, 846 845 /// of, platform, ··· 852 853 /// 853 854 /// #[vtable] 854 855 /// impl cpufreq::Driver for SampleDriver { 855 - /// const NAME: &'static CStr = c_str!("cpufreq-sample"); 856 + /// const NAME: &'static CStr = c"cpufreq-sample"; 856 857 /// const FLAGS: u16 = cpufreq::flags::NEED_INITIAL_FREQ_CHECK | cpufreq::flags::IS_COOLING_DEV; 857 858 /// const BOOST_ENABLED: bool = true; 858 859 /// ··· 1014 1015 ..pin_init::zeroed() 1015 1016 }; 1016 1017 1018 + // Always inline to optimize out error path of `build_assert`. 1019 + #[inline(always)] 1017 1020 const fn copy_name(name: &'static CStr) -> [c_char; CPUFREQ_NAME_LEN] { 1018 1021 let src = name.to_bytes_with_nul(); 1019 1022 let mut dst = [0; CPUFREQ_NAME_LEN];
+5 -5
rust/kernel/cpumask.rs
··· 39 39 /// fn set_clear_cpu(ptr: *mut bindings::cpumask, set_cpu: CpuId, clear_cpu: CpuId) { 40 40 /// // SAFETY: The `ptr` is valid for writing and remains valid for the lifetime of the 41 41 /// // returned reference. 42 - /// let mask = unsafe { Cpumask::as_mut_ref(ptr) }; 42 + /// let mask = unsafe { Cpumask::from_raw_mut(ptr) }; 43 43 /// 44 44 /// mask.set(set_cpu); 45 45 /// mask.clear(clear_cpu); ··· 49 49 pub struct Cpumask(Opaque<bindings::cpumask>); 50 50 51 51 impl Cpumask { 52 - /// Creates a mutable reference to an existing `struct cpumask` pointer. 52 + /// Creates a mutable reference from an existing `struct cpumask` pointer. 53 53 /// 54 54 /// # Safety 55 55 /// 56 56 /// The caller must ensure that `ptr` is valid for writing and remains valid for the lifetime 57 57 /// of the returned reference. 58 - pub unsafe fn as_mut_ref<'a>(ptr: *mut bindings::cpumask) -> &'a mut Self { 58 + pub unsafe fn from_raw_mut<'a>(ptr: *mut bindings::cpumask) -> &'a mut Self { 59 59 // SAFETY: Guaranteed by the safety requirements of the function. 60 60 // 61 61 // INVARIANT: The caller ensures that `ptr` is valid for writing and remains valid for the ··· 63 63 unsafe { &mut *ptr.cast() } 64 64 } 65 65 66 - /// Creates a reference to an existing `struct cpumask` pointer. 66 + /// Creates a reference from an existing `struct cpumask` pointer. 67 67 /// 68 68 /// # Safety 69 69 /// 70 70 /// The caller must ensure that `ptr` is valid for reading and remains valid for the lifetime 71 71 /// of the returned reference. 72 - pub unsafe fn as_ref<'a>(ptr: *const bindings::cpumask) -> &'a Self { 72 + pub unsafe fn from_raw<'a>(ptr: *const bindings::cpumask) -> &'a Self { 73 73 // SAFETY: Guaranteed by the safety requirements of the function. 74 74 // 75 75 // INVARIANT: The caller ensures that `ptr` is valid for reading and remains valid for the