tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

crypto: octeontx2 - Fix address alignment issue on ucode loading

octeontx2 crypto driver allocates memory using kmalloc/kzalloc,
and uses this memory for dma (does dma_map_single()). It assumes
that kmalloc/kzalloc will return 128-byte aligned address. But
kmalloc/kzalloc returns 8-byte aligned address after below changes:
"9382bc44b5f5 arm64: allow kmalloc() caches aligned to the
smaller cache_line_size()"

Completion address should be 32-Byte alignment when loading
microcode.

Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com>
Cc: <stable@vger.kernel.org> # v6.5+
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Bharat Bhushan and committed by
Herbert Xu b7b88b49 2157e50f

+21 -14
+21 -14
drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
··· 1491 1491 union otx2_cpt_opcode opcode; 1492 1492 union otx2_cpt_res_s *result; 1493 1493 union otx2_cpt_inst_s inst; 1494 + dma_addr_t result_baddr; 1494 1495 dma_addr_t rptr_baddr; 1495 1496 struct pci_dev *pdev; 1496 - u32 len, compl_rlen; 1497 1497 int timeout = 10000; 1498 + void *base, *rptr; 1498 1499 int ret, etype; 1499 - void *rptr; 1500 + u32 len; 1500 1501 1501 1502 /* 1502 1503 * We don't get capabilities if it was already done ··· 1520 1519 if (ret) 1521 1520 goto delete_grps; 1522 1521 1523 - compl_rlen = ALIGN(sizeof(union otx2_cpt_res_s), OTX2_CPT_DMA_MINALIGN); 1524 - len = compl_rlen + LOADFVC_RLEN; 1522 + /* Allocate extra memory for "rptr" and "result" pointer alignment */ 1523 + len = LOADFVC_RLEN + ARCH_DMA_MINALIGN + 1524 + sizeof(union otx2_cpt_res_s) + OTX2_CPT_RES_ADDR_ALIGN; 1525 1525 1526 - result = kzalloc(len, GFP_KERNEL); 1527 - if (!result) { 1526 + base = kzalloc(len, GFP_KERNEL); 1527 + if (!base) { 1528 1528 ret = -ENOMEM; 1529 1529 goto lf_cleanup; 1530 1530 } 1531 - rptr_baddr = dma_map_single(&pdev->dev, (void *)result, len, 1532 - DMA_BIDIRECTIONAL); 1531 + 1532 + rptr = PTR_ALIGN(base, ARCH_DMA_MINALIGN); 1533 + rptr_baddr = dma_map_single(&pdev->dev, rptr, len, DMA_BIDIRECTIONAL); 1533 1534 if (dma_mapping_error(&pdev->dev, rptr_baddr)) { 1534 1535 dev_err(&pdev->dev, "DMA mapping failed\n"); 1535 1536 ret = -EFAULT; 1536 - goto free_result; 1537 + goto free_rptr; 1537 1538 } 1538 - rptr = (u8 *)result + compl_rlen; 1539 + 1540 + result = (union otx2_cpt_res_s *)PTR_ALIGN(rptr + LOADFVC_RLEN, 1541 + OTX2_CPT_RES_ADDR_ALIGN); 1542 + result_baddr = ALIGN(rptr_baddr + LOADFVC_RLEN, 1543 + OTX2_CPT_RES_ADDR_ALIGN); 1539 1544 1540 1545 /* Fill in the command */ 1541 1546 opcode.s.major = LOADFVC_MAJOR_OP; ··· 1553 1546 /* 64-bit swap for microcode data reads, not needed for addresses */ 1554 1547 cpu_to_be64s(&iq_cmd.cmd.u); 1555 1548 iq_cmd.dptr = 0; 1556 - iq_cmd.rptr = rptr_baddr + compl_rlen; 1549 + iq_cmd.rptr = rptr_baddr; 1557 1550 iq_cmd.cptr.u = 0; 1558 1551 1559 1552 for (etype = 1; etype < OTX2_CPT_MAX_ENG_TYPES; etype++) { 1560 1553 result->s.compcode = OTX2_CPT_COMPLETION_CODE_INIT; 1561 1554 iq_cmd.cptr.s.grp = otx2_cpt_get_eng_grp(&cptpf->eng_grps, 1562 1555 etype); 1563 - otx2_cpt_fill_inst(&inst, &iq_cmd, rptr_baddr); 1556 + otx2_cpt_fill_inst(&inst, &iq_cmd, result_baddr); 1564 1557 lfs->ops->send_cmd(&inst, 1, &cptpf->lfs.lf[0]); 1565 1558 timeout = 10000; 1566 1559 ··· 1583 1576 1584 1577 error_no_response: 1585 1578 dma_unmap_single(&pdev->dev, rptr_baddr, len, DMA_BIDIRECTIONAL); 1586 - free_result: 1587 - kfree(result); 1579 + free_rptr: 1580 + kfree(base); 1588 1581 lf_cleanup: 1589 1582 otx2_cptlf_shutdown(lfs); 1590 1583 delete_grps: