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iio: adc: ad7124: reduce the number of SPI transfers

The ad7124_init_config_vref() function writes the AD7124_ADC_CONTROL
register for each channel that is configured to use the internal
reference.

The ad7124_write_config()function performs 7 SPI transfers for
configuring 2 registers: config_x and filter_x.

Reduce the number of SPI transfers:
-during the probe by only setting the st->adc_control value in
ad7124_init_config_vref() and writing to the device only at the end of
ad7124_setup().
-in ad7124_write_config() by grouping writes to the same register.

Signed-off-by: Dumitru Ceclan <dumitru.ceclan@analog.com>
Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Link: https://patch.msgid.link/20240731-ad7124-fix-v1-3-46a76aa4b9be@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Dumitru Ceclan and committed by
Jonathan Cameron b7eef979 13fad260

+12 -19
+12 -19
drivers/iio/adc/ad7124.c
··· 378 378 cfg->vref_mv = 2500; 379 379 st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK; 380 380 st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); 381 - return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 382 - 2, st->adc_control); 381 + return 0; 383 382 default: 384 383 dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); 385 384 return -EINVAL; ··· 396 397 397 398 tmp = (cfg->buf_positive << 1) + cfg->buf_negative; 398 399 val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) | 399 - AD7124_CONFIG_IN_BUFF(tmp); 400 + AD7124_CONFIG_IN_BUFF(tmp) | AD7124_CONFIG_PGA(cfg->pga_bits); 401 + 400 402 ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val); 401 403 if (ret < 0) 402 404 return ret; 403 405 404 - tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type); 405 - ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_TYPE_MSK, 406 - tmp, 3); 407 - if (ret < 0) 408 - return ret; 409 - 410 - ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_FS_MSK, 411 - AD7124_FILTER_FS(cfg->odr_sel_bits), 3); 412 - if (ret < 0) 413 - return ret; 414 - 415 - return ad7124_spi_write_mask(st, AD7124_CONFIG(cfg->cfg_slot), AD7124_CONFIG_PGA_MSK, 416 - AD7124_CONFIG_PGA(cfg->pga_bits), 2); 406 + tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type) | 407 + AD7124_FILTER_FS(cfg->odr_sel_bits); 408 + return ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), 409 + AD7124_FILTER_TYPE_MSK | AD7124_FILTER_FS_MSK, 410 + tmp, 3); 417 411 } 418 412 419 413 static struct ad7124_channel_config *ad7124_pop_config(struct ad7124_state *st) ··· 895 903 /* Set the power mode */ 896 904 st->adc_control &= ~AD7124_ADC_CTRL_PWR_MSK; 897 905 st->adc_control |= AD7124_ADC_CTRL_PWR(power_mode); 898 - ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); 899 - if (ret < 0) 900 - return ret; 901 906 902 907 mutex_init(&st->cfgs_lock); 903 908 INIT_KFIFO(st->live_cfgs_fifo); ··· 911 922 */ 912 923 ad7124_set_channel_odr(st, i, 10); 913 924 } 925 + 926 + ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); 927 + if (ret < 0) 928 + return ret; 914 929 915 930 return ret; 916 931 }