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Merge tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux

Pull devicetree bug fixes and documentation updates from Grant Likely:
"A few bugfixes for the new DT overlay feature, documentation updates,
spelling corrections, and changes to MAINTAINERS. Nothing earth
shattering here"

* tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux:
of/unittest: Overlays with sub-devices tests
of/platform: Handle of_populate drivers in notifier
of/overlay: Do not generate duplicate nodes
devicetree: document the "qemu" and "virtio" vendor prefixes
devicetree: document ARM bindings for QEMU's Firmware Config interface
Documentation: of: fix typo in graph bindings
dma-mapping: fix debug print to display correct dma_pfn_offset
of: replace Asahi Kasei Corp vendor prefix
ARM: dt: GIC: Spelling s/specific/specifier/, s/flaggs/flags/
dt/bindings: arm-boards: Spelling s/pointong/pointing/
MAINTAINERS: Update DT website and git repository
MAINTAINERS: drop DT regex matching on of_get_property and of_match_table

+187 -23
+1 -1
Documentation/devicetree/bindings/arm/arm-boards
··· 23 23 range of 0x200 bytes. 24 24 25 25 - syscon: the root node of the Integrator platforms must have a 26 - system controller node pointong to the control registers, 26 + system controller node pointing to the control registers, 27 27 with the compatible string 28 28 "arm,integrator-ap-syscon" 29 29 "arm,integrator-cp-syscon"
+72
Documentation/devicetree/bindings/arm/fw-cfg.txt
··· 1 + * QEMU Firmware Configuration bindings for ARM 2 + 3 + QEMU's arm-softmmu and aarch64-softmmu emulation / virtualization targets 4 + provide the following Firmware Configuration interface on the "virt" machine 5 + type: 6 + 7 + - A write-only, 16-bit wide selector (or control) register, 8 + - a read-write, 64-bit wide data register. 9 + 10 + QEMU exposes the control and data register to ARM guests as memory mapped 11 + registers; their location is communicated to the guest's UEFI firmware in the 12 + DTB that QEMU places at the bottom of the guest's DRAM. 13 + 14 + The guest writes a selector value (a key) to the selector register, and then 15 + can read the corresponding data (produced by QEMU) via the data register. If 16 + the selected entry is writable, the guest can rewrite it through the data 17 + register. 18 + 19 + The selector register takes keys in big endian byte order. 20 + 21 + The data register allows accesses with 8, 16, 32 and 64-bit width (only at 22 + offset 0 of the register). Accesses larger than a byte are interpreted as 23 + arrays, bundled together only for better performance. The bytes constituting 24 + such a word, in increasing address order, correspond to the bytes that would 25 + have been transferred by byte-wide accesses in chronological order. 26 + 27 + The interface allows guest firmware to download various parameters and blobs 28 + that affect how the firmware works and what tables it installs for the guest 29 + OS. For example, boot order of devices, ACPI tables, SMBIOS tables, kernel and 30 + initrd images for direct kernel booting, virtual machine UUID, SMP information, 31 + virtual NUMA topology, and so on. 32 + 33 + The authoritative registry of the valid selector values and their meanings is 34 + the QEMU source code; the structure of the data blobs corresponding to the 35 + individual key values is also defined in the QEMU source code. 36 + 37 + The presence of the registers can be verified by selecting the "signature" blob 38 + with key 0x0000, and reading four bytes from the data register. The returned 39 + signature is "QEMU". 40 + 41 + The outermost protocol (involving the write / read sequences of the control and 42 + data registers) is expected to be versioned, and/or described by feature bits. 43 + The interface revision / feature bitmap can be retrieved with key 0x0001. The 44 + blob to be read from the data register has size 4, and it is to be interpreted 45 + as a uint32_t value in little endian byte order. The current value 46 + (corresponding to the above outer protocol) is zero. 47 + 48 + The guest kernel is not expected to use these registers (although it is 49 + certainly allowed to); the device tree bindings are documented here because 50 + this is where device tree bindings reside in general. 51 + 52 + Required properties: 53 + 54 + - compatible: "qemu,fw-cfg-mmio". 55 + 56 + - reg: the MMIO region used by the device. 57 + * Bytes 0x0 to 0x7 cover the data register. 58 + * Bytes 0x8 to 0x9 cover the selector register. 59 + * Further registers may be appended to the region in case of future interface 60 + revisions / feature bits. 61 + 62 + Example: 63 + 64 + / { 65 + #size-cells = <0x2>; 66 + #address-cells = <0x2>; 67 + 68 + fw-cfg@9020000 { 69 + compatible = "qemu,fw-cfg-mmio"; 70 + reg = <0x0 0x9020000 0x0 0xa>; 71 + }; 72 + };
+1 -1
Documentation/devicetree/bindings/graph.txt
··· 19 19 may be described by specialized bindings depending on the type of connection. 20 20 21 21 To see how this binding applies to video pipelines, for example, see 22 - Documentation/device-tree/bindings/media/video-interfaces.txt. 22 + Documentation/devicetree/bindings/media/video-interfaces.txt. 23 23 Here the ports describe data interfaces, and the links between them are 24 24 the connecting data buses. A single port with multiple connections can 25 25 correspond to multiple devices being connected to the same physical bus.
+3 -1
Documentation/devicetree/bindings/vendor-prefixes.txt
··· 9 9 adapteva Adapteva, Inc. 10 10 adi Analog Devices, Inc. 11 11 aeroflexgaisler Aeroflex Gaisler AB 12 - ak Asahi Kasei Corp. 13 12 allwinner Allwinner Technology Co., Ltd. 14 13 altr Altera Corp. 15 14 amcc Applied Micro Circuits Corporation (APM, formally AMCC) ··· 19 20 apm Applied Micro Circuits Corporation (APM) 20 21 arm ARM Ltd. 21 22 armadeus ARMadeus Systems SARL 23 + asahi-kasei Asahi Kasei Corp. 22 24 atmel Atmel Corporation 23 25 auo AU Optronics Corporation 24 26 avago Avago Technologies ··· 127 127 powervr PowerVR (deprecated, use img) 128 128 qca Qualcomm Atheros, Inc. 129 129 qcom Qualcomm Technologies, Inc 130 + qemu QEMU, a generic and open source machine emulator and virtualizer 130 131 qnap QNAP Systems, Inc. 131 132 radxa Radxa 132 133 raidsonic RaidSonic Technology GmbH ··· 169 168 v3 V3 Semiconductor 170 169 variscite Variscite Ltd. 171 170 via VIA Technologies, Inc. 171 + virtio Virtual I/O Device Specification, developed by the OASIS consortium 172 172 voipac Voipac Technologies s.r.o. 173 173 winbond Winbond Electronics corp. 174 174 wlf Wolfson Microelectronics
+3 -5
MAINTAINERS
··· 696 696 W: http://blackfin.uclinux.org/ 697 697 S: Supported 698 698 F: sound/soc/blackfin/* 699 - 699 + 700 700 ANALOG DEVICES INC IIO DRIVERS 701 701 M: Lars-Peter Clausen <lars@metafoo.de> 702 702 M: Michael Hennerich <Michael.Hennerich@analog.com> ··· 7024 7024 M: Grant Likely <grant.likely@linaro.org> 7025 7025 M: Rob Herring <robh+dt@kernel.org> 7026 7026 L: devicetree@vger.kernel.org 7027 - W: http://fdt.secretlab.ca 7028 - T: git git://git.secretlab.ca/git/linux-2.6.git 7027 + W: http://www.devicetree.org/ 7028 + T: git git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux.git 7029 7029 S: Maintained 7030 7030 F: drivers/of/ 7031 7031 F: include/linux/of*.h 7032 7032 F: scripts/dtc/ 7033 - K: of_get_property 7034 - K: of_match_table 7035 7033 7036 7034 OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS 7037 7035 M: Rob Herring <robh+dt@kernel.org>
+1 -1
arch/arm/boot/dts/tegra20-seaboard.dts
··· 406 406 clock-frequency = <400000>; 407 407 408 408 magnetometer@c { 409 - compatible = "ak,ak8975"; 409 + compatible = "asahi-kasei,ak8975"; 410 410 reg = <0xc>; 411 411 interrupt-parent = <&gpio>; 412 412 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
-11
drivers/of/overlay.c
··· 114 114 ret = of_overlay_apply_one(ov, tchild, child); 115 115 if (ret) 116 116 return ret; 117 - 118 - /* The properties are already copied, now do the child nodes */ 119 - for_each_child_of_node(child, grandchild) { 120 - ret = of_overlay_apply_single_device_node(ov, tchild, grandchild); 121 - if (ret) { 122 - pr_err("%s: Failed to apply single node @%s/%s\n", 123 - __func__, tchild->full_name, 124 - grandchild->name); 125 - return ret; 126 - } 127 - } 128 117 } 129 118 130 119 return ret;
+10 -1
drivers/of/platform.c
··· 188 188 size = dev->coherent_dma_mask; 189 189 } else { 190 190 offset = PFN_DOWN(paddr - dma_addr); 191 - dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", dev->dma_pfn_offset); 191 + dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", offset); 192 192 } 193 193 dev->dma_pfn_offset = offset; 194 194 ··· 566 566 if (!of_node_check_flag(rd->dn->parent, OF_POPULATED_BUS)) 567 567 return NOTIFY_OK; /* not for us */ 568 568 569 + /* already populated? (driver using of_populate manually) */ 570 + if (of_node_check_flag(rd->dn, OF_POPULATED)) 571 + return NOTIFY_OK; 572 + 569 573 /* pdev_parent may be NULL when no bus platform device */ 570 574 pdev_parent = of_find_device_by_node(rd->dn->parent); 571 575 pdev = of_platform_device_create(rd->dn, NULL, ··· 585 581 break; 586 582 587 583 case OF_RECONFIG_CHANGE_REMOVE: 584 + 585 + /* already depopulated? */ 586 + if (!of_node_check_flag(rd->dn, OF_POPULATED)) 587 + return NOTIFY_OK; 588 + 588 589 /* find our device by node */ 589 590 pdev = of_find_device_by_node(rd->dn); 590 591 if (pdev == NULL)
+55
drivers/of/unittest-data/tests-overlay.dtsi
··· 176 176 }; 177 177 }; 178 178 179 + overlay10 { 180 + fragment@0 { 181 + target-path = "/testcase-data/overlay-node/test-bus"; 182 + __overlay__ { 183 + 184 + /* suppress DTC warning */ 185 + #address-cells = <1>; 186 + #size-cells = <0>; 187 + 188 + test-selftest10 { 189 + compatible = "selftest"; 190 + status = "okay"; 191 + reg = <10>; 192 + 193 + #address-cells = <1>; 194 + #size-cells = <0>; 195 + 196 + test-selftest101 { 197 + compatible = "selftest"; 198 + status = "okay"; 199 + reg = <1>; 200 + }; 201 + 202 + }; 203 + }; 204 + }; 205 + }; 206 + 207 + overlay11 { 208 + fragment@0 { 209 + target-path = "/testcase-data/overlay-node/test-bus"; 210 + __overlay__ { 211 + 212 + /* suppress DTC warning */ 213 + #address-cells = <1>; 214 + #size-cells = <0>; 215 + 216 + test-selftest11 { 217 + compatible = "selftest"; 218 + status = "okay"; 219 + reg = <11>; 220 + 221 + #address-cells = <1>; 222 + #size-cells = <0>; 223 + 224 + test-selftest111 { 225 + compatible = "selftest"; 226 + status = "okay"; 227 + reg = <1>; 228 + }; 229 + 230 + }; 231 + }; 232 + }; 233 + }; 179 234 }; 180 235 };
+39
drivers/of/unittest.c
··· 978 978 } 979 979 980 980 dev_dbg(dev, "%s for node @%s\n", __func__, np->full_name); 981 + 982 + of_platform_populate(np, NULL, NULL, &pdev->dev); 983 + 981 984 return 0; 982 985 } 983 986 ··· 1388 1385 selftest(1, "overlay test %d passed\n", 8); 1389 1386 } 1390 1387 1388 + /* test insertion of a bus with parent devices */ 1389 + static void of_selftest_overlay_10(void) 1390 + { 1391 + int ret; 1392 + char *child_path; 1393 + 1394 + /* device should disable */ 1395 + ret = of_selftest_apply_overlay_check(10, 10, 0, 1); 1396 + if (selftest(ret == 0, "overlay test %d failed; overlay application\n", 10)) 1397 + return; 1398 + 1399 + child_path = kasprintf(GFP_KERNEL, "%s/test-selftest101", 1400 + selftest_path(10)); 1401 + if (selftest(child_path, "overlay test %d failed; kasprintf\n", 10)) 1402 + return; 1403 + 1404 + ret = of_path_platform_device_exists(child_path); 1405 + kfree(child_path); 1406 + if (selftest(ret, "overlay test %d failed; no child device\n", 10)) 1407 + return; 1408 + } 1409 + 1410 + /* test insertion of a bus with parent devices (and revert) */ 1411 + static void of_selftest_overlay_11(void) 1412 + { 1413 + int ret; 1414 + 1415 + /* device should disable */ 1416 + ret = of_selftest_apply_revert_overlay_check(11, 11, 0, 1); 1417 + if (selftest(ret == 0, "overlay test %d failed; overlay application\n", 11)) 1418 + return; 1419 + } 1420 + 1391 1421 static void __init of_selftest_overlay(void) 1392 1422 { 1393 1423 struct device_node *bus_np = NULL; ··· 1468 1432 of_selftest_overlay_5(); 1469 1433 of_selftest_overlay_6(); 1470 1434 of_selftest_overlay_8(); 1435 + 1436 + of_selftest_overlay_10(); 1437 + of_selftest_overlay_11(); 1471 1438 1472 1439 out: 1473 1440 of_node_put(bus_np);
+2 -2
include/dt-bindings/interrupt-controller/arm-gic.h
··· 7 7 8 8 #include <dt-bindings/interrupt-controller/irq.h> 9 9 10 - /* interrupt specific cell 0 */ 10 + /* interrupt specifier cell 0 */ 11 11 12 12 #define GIC_SPI 0 13 13 #define GIC_PPI 1 14 14 15 15 /* 16 16 * Interrupt specifier cell 2. 17 - * The flaggs in irq.h are valid, plus those below. 17 + * The flags in irq.h are valid, plus those below. 18 18 */ 19 19 #define GIC_CPU_MASK_RAW(x) ((x) << 8) 20 20 #define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)