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Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:
"This is a bit larger than usual at rc4 time. The reason is due to
Lee's work of fixing newly reported build warnings.

The rest is fixes as usual"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (22 commits)
MAINTAINERS: adjust to removing i2c designware platform data
i2c: s3c2410: fix possible NULL pointer deref on read message after write
i2c: mediatek: Disable i2c start_en and clear intr_stat brfore reset
i2c: i801: Don't generate an interrupt on bus reset
i2c: mpc: implement erratum A-004447 workaround
powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P1010 i2c controllers
powerpc/fsl: set fsl,i2c-erratum-a004447 flag for P2041 i2c controllers
dt-bindings: i2c: mpc: Add fsl,i2c-erratum-a004447 flag
i2c: busses: i2c-stm32f4: Remove incorrectly placed ' ' from function name
i2c: busses: i2c-st: Fix copy/paste function misnaming issues
i2c: busses: i2c-pnx: Provide descriptions for 'alg_data' data structure
i2c: busses: i2c-ocores: Place the expected function names into the documentation headers
i2c: busses: i2c-eg20t: Fix 'bad line' issue and provide description for 'msgs' param
i2c: busses: i2c-designware-master: Fix misnaming of 'i2c_dw_init_master()'
i2c: busses: i2c-cadence: Fix incorrectly documented 'enum cdns_i2c_slave_mode'
i2c: busses: i2c-ali1563: File headers are not good candidates for kernel-doc
i2c: muxes: i2c-arb-gpio-challenge: Demote non-conformant kernel-doc headers
i2c: busses: i2c-nomadik: Fix formatting issue pertaining to 'timeout'
i2c: sh_mobile: Use new clock calculation formulas for RZ/G2E
i2c: I2C_HISI should depend on ACPI
...

+142 -29
+7
Documentation/devicetree/bindings/i2c/i2c-mpc.yaml
··· 46 46 description: | 47 47 I2C bus timeout in microseconds 48 48 49 + fsl,i2c-erratum-a004447: 50 + $ref: /schemas/types.yaml#/definitions/flag 51 + description: | 52 + Indicates the presence of QorIQ erratum A-004447, which 53 + says that the standard i2c recovery scheme mechanism does 54 + not work and an alternate implementation is needed. 55 + 49 56 required: 50 57 - compatible 51 58 - reg
-1
MAINTAINERS
··· 17678 17678 L: linux-i2c@vger.kernel.org 17679 17679 S: Maintained 17680 17680 F: drivers/i2c/busses/i2c-designware-* 17681 - F: include/linux/platform_data/i2c-designware.h 17682 17681 17683 17682 SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER 17684 17683 M: Jaehoon Chung <jh80.chung@samsung.com>
+8
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
··· 122 122 }; 123 123 124 124 /include/ "pq3-i2c-0.dtsi" 125 + i2c@3000 { 126 + fsl,i2c-erratum-a004447; 127 + }; 128 + 125 129 /include/ "pq3-i2c-1.dtsi" 130 + i2c@3100 { 131 + fsl,i2c-erratum-a004447; 132 + }; 133 + 126 134 /include/ "pq3-duart-0.dtsi" 127 135 /include/ "pq3-espi-0.dtsi" 128 136 spi0: spi@7000 {
+16
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
··· 371 371 }; 372 372 373 373 /include/ "qoriq-i2c-0.dtsi" 374 + i2c@118000 { 375 + fsl,i2c-erratum-a004447; 376 + }; 377 + 378 + i2c@118100 { 379 + fsl,i2c-erratum-a004447; 380 + }; 381 + 374 382 /include/ "qoriq-i2c-1.dtsi" 383 + i2c@119000 { 384 + fsl,i2c-erratum-a004447; 385 + }; 386 + 387 + i2c@119100 { 388 + fsl,i2c-erratum-a004447; 389 + }; 390 + 375 391 /include/ "qoriq-duart-0.dtsi" 376 392 /include/ "qoriq-duart-1.dtsi" 377 393 /include/ "qoriq-gpio-0.dtsi"
+1 -1
drivers/i2c/busses/Kconfig
··· 647 647 648 648 config I2C_HISI 649 649 tristate "HiSilicon I2C controller" 650 - depends on ARM64 || COMPILE_TEST 650 + depends on (ARM64 && ACPI) || COMPILE_TEST 651 651 help 652 652 Say Y here if you want to have Hisilicon I2C controller support 653 653 available on the Kunpeng Server.
+1 -1
drivers/i2c/busses/i2c-ali1563.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0-only 2 - /** 2 + /* 3 3 * i2c-ali1563.c - i2c driver for the ALi 1563 Southbridge 4 4 * 5 5 * Copyright (C) 2004 Patrick Mochel
+1 -1
drivers/i2c/busses/i2c-cadence.c
··· 144 144 }; 145 145 146 146 /** 147 - * enum cdns_i2c_slave_mode - Slave state when I2C is operating in slave mode 147 + * enum cdns_i2c_slave_state - Slave state when I2C is operating in slave mode 148 148 * 149 149 * @CDNS_I2C_SLAVE_STATE_IDLE: I2C slave idle 150 150 * @CDNS_I2C_SLAVE_STATE_SEND: I2C slave sending data to master
+1 -1
drivers/i2c/busses/i2c-designware-master.c
··· 165 165 } 166 166 167 167 /** 168 - * i2c_dw_init() - Initialize the designware I2C master hardware 168 + * i2c_dw_init_master() - Initialize the designware I2C master hardware 169 169 * @dev: device private data 170 170 * 171 171 * This functions configures and enables the I2C master.
+2 -1
drivers/i2c/busses/i2c-eg20t.c
··· 148 148 149 149 /** 150 150 * struct adapter_info - This structure holds the adapter information for the 151 - PCH i2c controller 151 + * PCH i2c controller 152 152 * @pch_data: stores a list of i2c_algo_pch_data 153 153 * @pch_i2c_suspended: specifies whether the system is suspended or not 154 154 * perhaps with more lines and words. ··· 358 358 /** 359 359 * pch_i2c_writebytes() - write data to I2C bus in normal mode 360 360 * @i2c_adap: Pointer to the struct i2c_adapter. 361 + * @msgs: Pointer to the i2c message structure. 361 362 * @last: specifies whether last message or not. 362 363 * In the case of compound mode it will be 1 for last message, 363 364 * otherwise 0.
+2 -4
drivers/i2c/busses/i2c-i801.c
··· 395 395 dev_err(&priv->pci_dev->dev, "Transaction timeout\n"); 396 396 /* try to stop the current command */ 397 397 dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n"); 398 - outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL, 399 - SMBHSTCNT(priv)); 398 + outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv)); 400 399 usleep_range(1000, 2000); 401 - outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL), 402 - SMBHSTCNT(priv)); 400 + outb_p(0, SMBHSTCNT(priv)); 403 401 404 402 /* Check if it worked */ 405 403 status = inb_p(SMBHSTSTS(priv));
-1
drivers/i2c/busses/i2c-icy.c
··· 123 123 { 124 124 struct icy_i2c *i2c; 125 125 struct i2c_algo_pcf_data *algo_data; 126 - struct fwnode_handle *new_fwnode; 127 126 struct i2c_board_info ltc2990_info = { 128 127 .type = "ltc2990", 129 128 .swnode = &icy_ltc2990_node,
+79 -2
drivers/i2c/busses/i2c-mpc.c
··· 19 19 20 20 #include <linux/clk.h> 21 21 #include <linux/io.h> 22 + #include <linux/iopoll.h> 22 23 #include <linux/fsl_devices.h> 23 24 #include <linux/i2c.h> 24 25 #include <linux/interrupt.h> ··· 46 45 #define CCR_MTX 0x10 47 46 #define CCR_TXAK 0x08 48 47 #define CCR_RSTA 0x04 48 + #define CCR_RSVD 0x02 49 49 50 50 #define CSR_MCF 0x80 51 51 #define CSR_MAAS 0x40 ··· 99 97 u32 block; 100 98 int rc; 101 99 int expect_rxack; 102 - 100 + bool has_errata_A004447; 103 101 }; 104 102 105 103 struct mpc_i2c_divider { ··· 135 133 readb(i2c->base + MPC_I2C_DR); 136 134 writeccr(i2c, CCR_MEN); 137 135 udelay(delay_val << 1); 136 + } 137 + } 138 + 139 + static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask) 140 + { 141 + void __iomem *addr = i2c->base + MPC_I2C_SR; 142 + u8 val; 143 + 144 + return readb_poll_timeout(addr, val, val & mask, 0, 100); 145 + } 146 + 147 + /* 148 + * Workaround for Erratum A004447. From the P2040CE Rev Q 149 + * 150 + * 1. Set up the frequency divider and sampling rate. 151 + * 2. I2CCR - a0h 152 + * 3. Poll for I2CSR[MBB] to get set. 153 + * 4. If I2CSR[MAL] is set (an indication that SDA is stuck low), then go to 154 + * step 5. If MAL is not set, then go to step 13. 155 + * 5. I2CCR - 00h 156 + * 6. I2CCR - 22h 157 + * 7. I2CCR - a2h 158 + * 8. Poll for I2CSR[MBB] to get set. 159 + * 9. Issue read to I2CDR. 160 + * 10. Poll for I2CSR[MIF] to be set. 161 + * 11. I2CCR - 82h 162 + * 12. Workaround complete. Skip the next steps. 163 + * 13. Issue read to I2CDR. 164 + * 14. Poll for I2CSR[MIF] to be set. 165 + * 15. I2CCR - 80h 166 + */ 167 + static void mpc_i2c_fixup_A004447(struct mpc_i2c *i2c) 168 + { 169 + int ret; 170 + u32 val; 171 + 172 + writeccr(i2c, CCR_MEN | CCR_MSTA); 173 + ret = i2c_mpc_wait_sr(i2c, CSR_MBB); 174 + if (ret) { 175 + dev_err(i2c->dev, "timeout waiting for CSR_MBB\n"); 176 + return; 177 + } 178 + 179 + val = readb(i2c->base + MPC_I2C_SR); 180 + 181 + if (val & CSR_MAL) { 182 + writeccr(i2c, 0x00); 183 + writeccr(i2c, CCR_MSTA | CCR_RSVD); 184 + writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSVD); 185 + ret = i2c_mpc_wait_sr(i2c, CSR_MBB); 186 + if (ret) { 187 + dev_err(i2c->dev, "timeout waiting for CSR_MBB\n"); 188 + return; 189 + } 190 + val = readb(i2c->base + MPC_I2C_DR); 191 + ret = i2c_mpc_wait_sr(i2c, CSR_MIF); 192 + if (ret) { 193 + dev_err(i2c->dev, "timeout waiting for CSR_MIF\n"); 194 + return; 195 + } 196 + writeccr(i2c, CCR_MEN | CCR_RSVD); 197 + } else { 198 + val = readb(i2c->base + MPC_I2C_DR); 199 + ret = i2c_mpc_wait_sr(i2c, CSR_MIF); 200 + if (ret) { 201 + dev_err(i2c->dev, "timeout waiting for CSR_MIF\n"); 202 + return; 203 + } 204 + writeccr(i2c, CCR_MEN); 138 205 } 139 206 } 140 207 ··· 741 670 { 742 671 struct mpc_i2c *i2c = i2c_get_adapdata(adap); 743 672 744 - mpc_i2c_fixup(i2c); 673 + if (i2c->has_errata_A004447) 674 + mpc_i2c_fixup_A004447(i2c); 675 + else 676 + mpc_i2c_fixup(i2c); 745 677 746 678 return 0; 747 679 } ··· 840 766 mpc_ops.timeout = 5; 841 767 } 842 768 dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ); 769 + 770 + if (of_property_read_bool(op->dev.of_node, "fsl,i2c-erratum-a004447")) 771 + i2c->has_errata_A004447 = true; 843 772 844 773 i2c->adap = mpc_ops; 845 774 scnprintf(i2c->adap.name, sizeof(i2c->adap.name),
+5
drivers/i2c/busses/i2c-mt65xx.c
··· 479 479 static void mtk_i2c_init_hw(struct mtk_i2c *i2c) 480 480 { 481 481 u16 control_reg; 482 + u16 intr_stat_reg; 483 + 484 + mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START); 485 + intr_stat_reg = mtk_i2c_readw(i2c, OFFSET_INTR_STAT); 486 + mtk_i2c_writew(i2c, intr_stat_reg, OFFSET_INTR_STAT); 482 487 483 488 if (i2c->dev_comp->apdma_sync) { 484 489 writel(I2C_DMA_WARM_RST, i2c->pdmabase + OFFSET_RST);
+1 -1
drivers/i2c/busses/i2c-nomadik.c
··· 159 159 * @clk_freq: clock frequency for the operation mode 160 160 * @tft: Tx FIFO Threshold in bytes 161 161 * @rft: Rx FIFO Threshold in bytes 162 - * @timeout Slave response timeout (ms) 162 + * @timeout: Slave response timeout (ms) 163 163 * @sm: speed mode 164 164 * @stop: stop condition. 165 165 * @xfer_complete: acknowledge completion for a I2C message.
+4 -4
drivers/i2c/busses/i2c-ocores.c
··· 250 250 } 251 251 252 252 /** 253 - * Process timeout event 253 + * ocores_process_timeout() - Process timeout event 254 254 * @i2c: ocores I2C device instance 255 255 */ 256 256 static void ocores_process_timeout(struct ocores_i2c *i2c) ··· 264 264 } 265 265 266 266 /** 267 - * Wait until something change in a given register 267 + * ocores_wait() - Wait until something change in a given register 268 268 * @i2c: ocores I2C device instance 269 269 * @reg: register to query 270 270 * @mask: bitmask to apply on register value ··· 296 296 } 297 297 298 298 /** 299 - * Wait until is possible to process some data 299 + * ocores_poll_wait() - Wait until is possible to process some data 300 300 * @i2c: ocores I2C device instance 301 301 * 302 302 * Used when the device is in polling mode (interrupts disabled). ··· 334 334 } 335 335 336 336 /** 337 - * It handles an IRQ-less transfer 337 + * ocores_process_polling() - It handles an IRQ-less transfer 338 338 * @i2c: ocores I2C device instance 339 339 * 340 340 * Even if IRQ are disabled, the I2C OpenCore IP behavior is exactly the same
+4 -4
drivers/i2c/busses/i2c-pnx.c
··· 138 138 /** 139 139 * i2c_pnx_start - start a device 140 140 * @slave_addr: slave address 141 - * @adap: pointer to adapter structure 141 + * @alg_data: pointer to local driver data structure 142 142 * 143 143 * Generate a START signal in the desired mode. 144 144 */ ··· 194 194 195 195 /** 196 196 * i2c_pnx_stop - stop a device 197 - * @adap: pointer to I2C adapter structure 197 + * @alg_data: pointer to local driver data structure 198 198 * 199 199 * Generate a STOP signal to terminate the master transaction. 200 200 */ ··· 223 223 224 224 /** 225 225 * i2c_pnx_master_xmit - transmit data to slave 226 - * @adap: pointer to I2C adapter structure 226 + * @alg_data: pointer to local driver data structure 227 227 * 228 228 * Sends one byte of data to the slave 229 229 */ ··· 293 293 294 294 /** 295 295 * i2c_pnx_master_rcv - receive data from slave 296 - * @adap: pointer to I2C adapter structure 296 + * @alg_data: pointer to local driver data structure 297 297 * 298 298 * Reads one byte data from the slave 299 299 */
+1 -1
drivers/i2c/busses/i2c-qcom-geni.c
··· 100 100 [GP_IRQ0] = {-EIO, "Unknown I2C err GP_IRQ0"}, 101 101 [NACK] = {-ENXIO, "NACK: slv unresponsive, check its power/reset-ln"}, 102 102 [GP_IRQ2] = {-EIO, "Unknown I2C err GP IRQ2"}, 103 - [BUS_PROTO] = {-EPROTO, "Bus proto err, noisy/unepxected start/stop"}, 103 + [BUS_PROTO] = {-EPROTO, "Bus proto err, noisy/unexpected start/stop"}, 104 104 [ARB_LOST] = {-EAGAIN, "Bus arbitration lost, clock line undriveable"}, 105 105 [GP_IRQ5] = {-EIO, "Unknown I2C err GP IRQ5"}, 106 106 [GENI_OVERRUN] = {-EIO, "Cmd overrun, check GENI cmd-state machine"},
+3
drivers/i2c/busses/i2c-s3c2410.c
··· 480 480 * forces us to send a new START 481 481 * when we change direction 482 482 */ 483 + dev_dbg(i2c->dev, 484 + "missing START before write->read\n"); 483 485 s3c24xx_i2c_stop(i2c, -EINVAL); 486 + break; 484 487 } 485 488 486 489 goto retry_write;
+1 -1
drivers/i2c/busses/i2c-sh_mobile.c
··· 807 807 static const struct of_device_id sh_mobile_i2c_dt_ids[] = { 808 808 { .compatible = "renesas,iic-r8a73a4", .data = &fast_clock_dt_config }, 809 809 { .compatible = "renesas,iic-r8a7740", .data = &r8a7740_dt_config }, 810 - { .compatible = "renesas,iic-r8a774c0", .data = &fast_clock_dt_config }, 810 + { .compatible = "renesas,iic-r8a774c0", .data = &v2_freq_calc_dt_config }, 811 811 { .compatible = "renesas,iic-r8a7790", .data = &v2_freq_calc_dt_config }, 812 812 { .compatible = "renesas,iic-r8a7791", .data = &v2_freq_calc_dt_config }, 813 813 { .compatible = "renesas,iic-r8a7792", .data = &v2_freq_calc_dt_config },
+2 -2
drivers/i2c/busses/i2c-st.c
··· 524 524 } 525 525 526 526 /** 527 - * st_i2c_handle_write() - Handle FIFO enmpty interrupt in case of read 527 + * st_i2c_handle_read() - Handle FIFO empty interrupt in case of read 528 528 * @i2c_dev: Controller's private data 529 529 */ 530 530 static void st_i2c_handle_read(struct st_i2c_dev *i2c_dev) ··· 558 558 } 559 559 560 560 /** 561 - * st_i2c_isr() - Interrupt routine 561 + * st_i2c_isr_thread() - Interrupt routine 562 562 * @irq: interrupt number 563 563 * @data: Controller's private data 564 564 */
+1 -1
drivers/i2c/busses/i2c-stm32f4.c
··· 313 313 } 314 314 315 315 /** 316 - * stm32f4_i2c_write_ byte() - Write a byte in the data register 316 + * stm32f4_i2c_write_byte() - Write a byte in the data register 317 317 * @i2c_dev: Controller's private data 318 318 * @byte: Data to write in the register 319 319 */
+2 -2
drivers/i2c/muxes/i2c-arb-gpio-challenge.c
··· 34 34 }; 35 35 36 36 37 - /** 37 + /* 38 38 * i2c_arbitrator_select - claim the I2C bus 39 39 * 40 40 * Use the GPIO-based signalling protocol; return -EBUSY if we fail. ··· 77 77 return -EBUSY; 78 78 } 79 79 80 - /** 80 + /* 81 81 * i2c_arbitrator_deselect - release the I2C bus 82 82 * 83 83 * Release the I2C bus using the GPIO-based signalling protocol.