tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/msm: Add a `preempt_record_size` field

Adds a field to `adreno_info` to store the GPU specific preempt record
size.

Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618015/
Signed-off-by: Rob Clark <robdclark@chromium.org>

authored by

Antonino Maniscalco and committed by
Rob Clark b9365f41 3241504e

+5
+4
drivers/gpu/drm/msm/adreno/a6xx_catalog.c
··· 1324 1324 .gmu_cgc_mode = 0x00020000, 1325 1325 }, 1326 1326 .address_space_size = SZ_16G, 1327 + .preempt_record_size = 2860 * SZ_1K, 1327 1328 }, { 1328 1329 .chip_ids = ADRENO_CHIP_IDS(0x43050a01), /* "C510v2" */ 1329 1330 .family = ADRENO_7XX_GEN2, ··· 1345 1344 .gmu_cgc_mode = 0x00020202, 1346 1345 }, 1347 1346 .address_space_size = SZ_16G, 1347 + .preempt_record_size = 4192 * SZ_1K, 1348 1348 }, { 1349 1349 .chip_ids = ADRENO_CHIP_IDS(0x43050c01), /* "C512v2" */ 1350 1350 .family = ADRENO_7XX_GEN2, ··· 1365 1363 .gmu_cgc_mode = 0x00020202, 1366 1364 }, 1367 1365 .address_space_size = SZ_256G, 1366 + .preempt_record_size = 4192 * SZ_1K, 1368 1367 }, { 1369 1368 .chip_ids = ADRENO_CHIP_IDS(0x43051401), /* "C520v2" */ 1370 1369 .family = ADRENO_7XX_GEN3, ··· 1385 1382 .gmu_cgc_mode = 0x00020202, 1386 1383 }, 1387 1384 .address_space_size = SZ_16G, 1385 + .preempt_record_size = 3572 * SZ_1K, 1388 1386 } 1389 1387 }; 1390 1388 DECLARE_ADRENO_GPULIST(a7xx);
+1
drivers/gpu/drm/msm/adreno/adreno_gpu.h
··· 111 111 * {SHRT_MAX, 0} sentinal. 112 112 */ 113 113 struct adreno_speedbin *speedbins; 114 + u64 preempt_record_size; 114 115 }; 115 116 116 117 #define ADRENO_CHIP_IDS(tbl...) (uint32_t[]) { tbl, 0 }