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ASoC: fsl_micfil: Add sample rate constraint

On some platforms, for example i.MX93, there is only one
audio PLL source, so some sample rate can't be supported.
If the PLL source is used for 8kHz series rates, then 11kHz
series rates can't be supported.

So add constraints according to the frequency of available
clock sources, then alsa-lib will help to convert the
unsupported rate for the driver.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://patch.msgid.link/1728884313-6778-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Shengjiu Wang and committed by
Mark Brown b9a8ecf8 038fa6dd

+38
+38
sound/soc/fsl/fsl_micfil.c
··· 28 28 29 29 #define MICFIL_OSR_DEFAULT 16 30 30 31 + #define MICFIL_NUM_RATES 7 32 + #define MICFIL_CLK_SRC_NUM 3 33 + /* clock source ids */ 34 + #define MICFIL_AUDIO_PLL1 0 35 + #define MICFIL_AUDIO_PLL2 1 36 + #define MICFIL_CLK_EXT3 2 37 + 31 38 enum quality { 32 39 QUALITY_HIGH, 33 40 QUALITY_MEDIUM, ··· 52 45 struct clk *mclk; 53 46 struct clk *pll8k_clk; 54 47 struct clk *pll11k_clk; 48 + struct clk *clk_src[MICFIL_CLK_SRC_NUM]; 55 49 struct snd_dmaengine_dai_dma_data dma_params_rx; 56 50 struct sdma_peripheral_config sdmacfg; 57 51 struct snd_soc_card *card; 52 + struct snd_pcm_hw_constraint_list constraint_rates; 53 + unsigned int constraint_rates_list[MICFIL_NUM_RATES]; 58 54 unsigned int dataline; 59 55 char name[32]; 60 56 int irq[MICFIL_IRQ_LINES]; ··· 485 475 struct snd_soc_dai *dai) 486 476 { 487 477 struct fsl_micfil *micfil = snd_soc_dai_get_drvdata(dai); 478 + unsigned int rates[MICFIL_NUM_RATES] = {8000, 11025, 16000, 22050, 32000, 44100, 48000}; 479 + int i, j, k = 0; 480 + u64 clk_rate; 488 481 489 482 if (!micfil) { 490 483 dev_err(dai->dev, "micfil dai priv_data not set\n"); 491 484 return -EINVAL; 492 485 } 486 + 487 + micfil->constraint_rates.list = micfil->constraint_rates_list; 488 + micfil->constraint_rates.count = 0; 489 + 490 + for (j = 0; j < MICFIL_NUM_RATES; j++) { 491 + for (i = 0; i < MICFIL_CLK_SRC_NUM; i++) { 492 + clk_rate = clk_get_rate(micfil->clk_src[i]); 493 + if (clk_rate != 0 && do_div(clk_rate, rates[j]) == 0) { 494 + micfil->constraint_rates_list[k++] = rates[j]; 495 + micfil->constraint_rates.count++; 496 + break; 497 + } 498 + } 499 + } 500 + 501 + if (micfil->constraint_rates.count > 0) 502 + snd_pcm_hw_constraint_list(substream->runtime, 0, 503 + SNDRV_PCM_HW_PARAM_RATE, 504 + &micfil->constraint_rates); 493 505 494 506 return 0; 495 507 } ··· 1206 1174 1207 1175 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk, 1208 1176 &micfil->pll11k_clk); 1177 + 1178 + micfil->clk_src[MICFIL_AUDIO_PLL1] = micfil->pll8k_clk; 1179 + micfil->clk_src[MICFIL_AUDIO_PLL2] = micfil->pll11k_clk; 1180 + micfil->clk_src[MICFIL_CLK_EXT3] = devm_clk_get(&pdev->dev, "clkext3"); 1181 + if (IS_ERR(micfil->clk_src[MICFIL_CLK_EXT3])) 1182 + micfil->clk_src[MICFIL_CLK_EXT3] = NULL; 1209 1183 1210 1184 /* init regmap */ 1211 1185 regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);