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octeontx2-af: Support ESP/AH RSS hashing

Support SPI and sequence number fields of
ESP/AH header to be hashed for RSS. By default
ESP/AH fields are not considered for RSS and
needs to be set explicitly as below:
ethtool -U eth0 rx-flow-hash esp4 sdfn
or
ethtool -U eth0 rx-flow-hash ah4 sdfn
or
ethtool -U eth0 rx-flow-hash esp6 sdfn
or
ethtool -U eth0 rx-flow-hash ah6 sdfn

To disable hashing of ESP fields:
ethtool -U eth0 rx-flow-hash esp4 sd
or
ethtool -U eth0 rx-flow-hash ah4 sd
or
ethtool -U eth0 rx-flow-hash esp6 sd
or
ethtool -U eth0 rx-flow-hash ah6 sd

Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Link: https://lore.kernel.org/r/1611378552-13288-1-git-send-email-sundeep.lkml@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Subbaraya Sundeep and committed by
Jakub Kicinski b9b7421a 24f97b6a

+65 -1
+2
drivers/net/ethernet/marvell/octeontx2/af/mbox.h
··· 717 717 #define NIX_FLOW_KEY_TYPE_INNR_ETH_DMAC BIT(17) 718 718 #define NIX_FLOW_KEY_TYPE_VLAN BIT(20) 719 719 #define NIX_FLOW_KEY_TYPE_IPV4_PROTO BIT(21) 720 + #define NIX_FLOW_KEY_TYPE_AH BIT(22) 721 + #define NIX_FLOW_KEY_TYPE_ESP BIT(23) 720 722 u32 flowkey_cfg; /* Flowkey types selected */ 721 723 u8 group; /* RSS context or group */ 722 724 };
+27
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
··· 2580 2580 struct nix_rx_flowkey_alg *field; 2581 2581 struct nix_rx_flowkey_alg tmp; 2582 2582 u32 key_type, valid_key; 2583 + int l4_key_offset; 2583 2584 2584 2585 if (!alg) 2585 2586 return -EINVAL; ··· 2713 2712 field_marker = false; 2714 2713 keyoff_marker = false; 2715 2714 } 2715 + 2716 + /* TCP/UDP/SCTP and ESP/AH falls at same offset so 2717 + * remember the TCP key offset of 40 byte hash key. 2718 + */ 2719 + if (key_type == NIX_FLOW_KEY_TYPE_TCP) 2720 + l4_key_offset = key_off; 2716 2721 break; 2717 2722 case NIX_FLOW_KEY_TYPE_NVGRE: 2718 2723 field->lid = NPC_LID_LD; ··· 2790 2783 field->ltype_mask = 0xF; 2791 2784 field->fn_mask = 1; /* Mask out the first nibble */ 2792 2785 break; 2786 + case NIX_FLOW_KEY_TYPE_AH: 2787 + case NIX_FLOW_KEY_TYPE_ESP: 2788 + field->hdr_offset = 0; 2789 + field->bytesm1 = 7; /* SPI + sequence number */ 2790 + field->ltype_mask = 0xF; 2791 + field->lid = NPC_LID_LE; 2792 + field->ltype_match = NPC_LT_LE_ESP; 2793 + if (key_type == NIX_FLOW_KEY_TYPE_AH) { 2794 + field->lid = NPC_LID_LD; 2795 + field->ltype_match = NPC_LT_LD_AH; 2796 + field->hdr_offset = 4; 2797 + keyoff_marker = false; 2798 + } 2799 + break; 2793 2800 } 2794 2801 field->ena = 1; 2795 2802 2796 2803 /* Found a valid flow key type */ 2797 2804 if (valid_key) { 2805 + /* Use the key offset of TCP/UDP/SCTP fields 2806 + * for ESP/AH fields. 2807 + */ 2808 + if (key_type == NIX_FLOW_KEY_TYPE_ESP || 2809 + key_type == NIX_FLOW_KEY_TYPE_AH) 2810 + key_off = l4_key_offset; 2798 2811 field->key_offset = key_off; 2799 2812 memcpy(&alg[nr_field], field, sizeof(*field)); 2800 2813 max_key_off = max(max_key_off, field->bytesm1 + 1);
+36 -1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c
··· 448 448 nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 449 449 break; 450 450 case AH_ESP_V4_FLOW: 451 + case AH_ESP_V6_FLOW: 452 + if (rss->flowkey_cfg & NIX_FLOW_KEY_TYPE_ESP) 453 + nfc->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 454 + break; 451 455 case AH_V4_FLOW: 452 456 case ESP_V4_FLOW: 453 457 case IPV4_FLOW: 454 - case AH_ESP_V6_FLOW: 458 + break; 455 459 case AH_V6_FLOW: 456 460 case ESP_V6_FLOW: 457 461 case IPV6_FLOW: ··· 463 459 default: 464 460 return -EINVAL; 465 461 } 462 + 466 463 return 0; 467 464 } 468 465 ··· 527 522 break; 528 523 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 529 524 rss_cfg |= NIX_FLOW_KEY_TYPE_SCTP; 525 + break; 526 + default: 527 + return -EINVAL; 528 + } 529 + break; 530 + case AH_ESP_V4_FLOW: 531 + case AH_ESP_V6_FLOW: 532 + switch (nfc->data & rxh_l4) { 533 + case 0: 534 + rss_cfg &= ~(NIX_FLOW_KEY_TYPE_ESP | 535 + NIX_FLOW_KEY_TYPE_AH); 536 + rss_cfg |= NIX_FLOW_KEY_TYPE_VLAN | 537 + NIX_FLOW_KEY_TYPE_IPV4_PROTO; 538 + break; 539 + case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 540 + /* If VLAN hashing is also requested for ESP then do not 541 + * allow because of hardware 40 bytes flow key limit. 542 + */ 543 + if (rss_cfg & NIX_FLOW_KEY_TYPE_VLAN) { 544 + netdev_err(pfvf->netdev, 545 + "RSS hash of ESP or AH with VLAN is not supported\n"); 546 + return -EOPNOTSUPP; 547 + } 548 + 549 + rss_cfg |= NIX_FLOW_KEY_TYPE_ESP | NIX_FLOW_KEY_TYPE_AH; 550 + /* Disable IPv4 proto hashing since IPv6 SA+DA(32 bytes) 551 + * and ESP SPI+sequence(8 bytes) uses hardware maximum 552 + * limit of 40 byte flow key. 553 + */ 554 + rss_cfg &= ~NIX_FLOW_KEY_TYPE_IPV4_PROTO; 530 555 break; 531 556 default: 532 557 return -EINVAL;