tjh.dev / kernel
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drm/amdgpu: Generalize is_multi_chiplet with a common helper v2

It is not necessary to be ip generation specific

v2: rename the helper to is_multi_aid (Lijo)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Hawking Zhang and committed by
Alex Deucher b9c58f4e c9df2dcf

+14 -14
+5
drivers/gpu/drm/amd/amdgpu/amdgpu.h
··· 1334 1334 return container_of(bdev, struct amdgpu_device, mman.bdev); 1335 1335 } 1336 1336 1337 + static inline bool amdgpu_is_multi_aid(struct amdgpu_device *adev) 1338 + { 1339 + return !!adev->aid_mask; 1340 + } 1341 + 1337 1342 int amdgpu_device_init(struct amdgpu_device *adev, 1338 1343 uint32_t flags); 1339 1344 void amdgpu_device_fini_hw(struct amdgpu_device *adev);
+9 -14
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
··· 409 409 (0x001d43e0 + 0x00001800), 410 410 }; 411 411 412 - static inline bool gmc_v9_0_is_multi_chiplet(struct amdgpu_device *adev) 413 - { 414 - return !!adev->aid_mask; 415 - } 416 - 417 412 static int gmc_v9_0_ecc_interrupt_state(struct amdgpu_device *adev, 418 413 struct amdgpu_irq_src *src, 419 414 unsigned int type, ··· 645 650 addr, entry->client_id, 646 651 soc15_ih_clientid_name[entry->client_id]); 647 652 648 - if (gmc_v9_0_is_multi_chiplet(adev)) 653 + if (amdgpu_is_multi_aid(adev)) 649 654 dev_err(adev->dev, " cookie node_id %d fault from die %s%d%s\n", 650 655 node_id, node_id % 4 == 3 ? "RSV" : "AID", node_id / 4, 651 656 node_id % 4 == 1 ? ".XCD0" : node_id % 4 == 2 ? ".XCD1" : ""); ··· 794 799 uint32_t vmhub) 795 800 { 796 801 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) || 797 - gmc_v9_0_is_multi_chiplet(adev)) 802 + amdgpu_is_multi_aid(adev)) 798 803 return false; 799 804 800 805 return ((vmhub == AMDGPU_MMHUB0(0) || ··· 1506 1511 1507 1512 static void gmc_v9_0_set_gfxhub_funcs(struct amdgpu_device *adev) 1508 1513 { 1509 - if (gmc_v9_0_is_multi_chiplet(adev)) 1514 + if (amdgpu_is_multi_aid(adev)) 1510 1515 adev->gfxhub.funcs = &gfxhub_v1_2_funcs; 1511 1516 else 1512 1517 adev->gfxhub.funcs = &gfxhub_v1_0_funcs; ··· 1588 1593 */ 1589 1594 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 0) || 1590 1595 amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 1) || 1591 - gmc_v9_0_is_multi_chiplet(adev)) 1596 + amdgpu_is_multi_aid(adev)) 1592 1597 adev->gmc.xgmi.supported = true; 1593 1598 1594 1599 if (amdgpu_ip_version(adev, XGMI_HWIP, 0) == IP_VERSION(6, 1, 0)) { ··· 2041 2046 2042 2047 spin_lock_init(&adev->gmc.invalidate_lock); 2043 2048 2044 - if (gmc_v9_0_is_multi_chiplet(adev)) { 2049 + if (amdgpu_is_multi_aid(adev)) { 2045 2050 gmc_v9_4_3_init_vram_info(adev); 2046 2051 } else if (!adev->bios) { 2047 2052 if (adev->flags & AMD_IS_APU) { ··· 2191 2196 2192 2197 amdgpu_gmc_get_vbios_allocations(adev); 2193 2198 2194 - if (gmc_v9_0_is_multi_chiplet(adev)) { 2199 + if (amdgpu_is_multi_aid(adev)) { 2195 2200 r = gmc_v9_0_init_mem_ranges(adev); 2196 2201 if (r) 2197 2202 return r; ··· 2220 2225 adev->vm_manager.first_kfd_vmid = 2221 2226 (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 1) || 2222 2227 amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) || 2223 - gmc_v9_0_is_multi_chiplet(adev)) ? 2228 + amdgpu_is_multi_aid(adev)) ? 2224 2229 3 : 2225 2230 8; 2226 2231 ··· 2232 2237 if (r) 2233 2238 return r; 2234 2239 2235 - if (gmc_v9_0_is_multi_chiplet(adev)) 2240 + if (amdgpu_is_multi_aid(adev)) 2236 2241 amdgpu_gmc_sysfs_init(adev); 2237 2242 2238 2243 return 0; ··· 2242 2247 { 2243 2248 struct amdgpu_device *adev = ip_block->adev; 2244 2249 2245 - if (gmc_v9_0_is_multi_chiplet(adev)) 2250 + if (amdgpu_is_multi_aid(adev)) 2246 2251 amdgpu_gmc_sysfs_fini(adev); 2247 2252 2248 2253 amdgpu_gmc_ras_fini(adev);