Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'timers-urgent-2020-09-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner:
"A set of clocksource/clockevents updates:
- Reset the TI/DM timer before enabling it instead of doing it the
other way round.
- Initialize the reload value for the GX6605s timer correctly so the
hardware counter starts at 0 again after overrun.
- Make error return value negative in the h8300 timer init function"
* tag 'timers-urgent-2020-09-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
clocksource/drivers/timer-gx6605s: Fixup counter reload
clocksource/drivers/timer-ti-dm: Do reset before enable
clocksource/drivers/h8300_timer8: Fix wrong return value in h8300_8timer_init()
+25
-22
+1
-1
drivers/clocksource/h8300_timer8.c
+1
-1
drivers/clocksource/h8300_timer8.c
+1
drivers/clocksource/timer-gx6605s.c
+1
drivers/clocksource/timer-gx6605s.c
+23
-21
drivers/clocksource/timer-ti-dm-systimer.c
+23
-21
drivers/clocksource/timer-ti-dm-systimer.c
···
69
69
return !(tidr >> 16);
70
70
}
71
71
72
+
static void dmtimer_systimer_enable(struct dmtimer_systimer *t)
73
+
{
74
+
u32 val;
75
+
76
+
if (dmtimer_systimer_revision1(t))
77
+
val = DMTIMER_TYPE1_ENABLE;
78
+
else
79
+
val = DMTIMER_TYPE2_ENABLE;
80
+
81
+
writel_relaxed(val, t->base + t->sysc);
82
+
}
83
+
84
+
static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
85
+
{
86
+
if (!dmtimer_systimer_revision1(t))
87
+
return;
88
+
89
+
writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
90
+
}
91
+
72
92
static int __init dmtimer_systimer_type1_reset(struct dmtimer_systimer *t)
73
93
{
74
94
void __iomem *syss = t->base + OMAP_TIMER_V1_SYS_STAT_OFFSET;
75
95
int ret;
76
96
u32 l;
77
97
98
+
dmtimer_systimer_enable(t);
78
99
writel_relaxed(BIT(1) | BIT(2), t->base + t->ifctrl);
79
100
ret = readl_poll_timeout_atomic(syss, l, l & BIT(0), 100,
80
101
DMTIMER_RESET_WAIT);
···
109
88
void __iomem *sysc = t->base + t->sysc;
110
89
u32 l;
111
90
91
+
dmtimer_systimer_enable(t);
112
92
l = readl_relaxed(sysc);
113
93
l |= BIT(0);
114
94
writel_relaxed(l, sysc);
···
358
336
return 0;
359
337
}
360
338
361
-
static void dmtimer_systimer_enable(struct dmtimer_systimer *t)
362
-
{
363
-
u32 val;
364
-
365
-
if (dmtimer_systimer_revision1(t))
366
-
val = DMTIMER_TYPE1_ENABLE;
367
-
else
368
-
val = DMTIMER_TYPE2_ENABLE;
369
-
370
-
writel_relaxed(val, t->base + t->sysc);
371
-
}
372
-
373
-
static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
374
-
{
375
-
if (!dmtimer_systimer_revision1(t))
376
-
return;
377
-
378
-
writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
379
-
}
380
-
381
339
static int __init dmtimer_systimer_setup(struct device_node *np,
382
340
struct dmtimer_systimer *t)
383
341
{
···
411
409
t->wakeup = regbase + _OMAP_TIMER_WAKEUP_EN_OFFSET;
412
410
t->ifctrl = regbase + _OMAP_TIMER_IF_CTRL_OFFSET;
413
411
414
-
dmtimer_systimer_enable(t);
415
412
dmtimer_systimer_reset(t);
413
+
dmtimer_systimer_enable(t);
416
414
pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(t->base),
417
415
readl_relaxed(t->base + t->sysc));
418
416