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drm/i915: Revive combination mode for backlight control

This reverts commit 951f3512dba5bd44cda3e5ee22b4b522e4bb09fb

drm/i915: Do not handle backlight combination mode specially

since this commit introduced other regressions due to untouched LBPC
register, e.g. the backlight dimmed after resume.

In addition to the revert, this patch includes a fix for the original
issue (weird backlight levels) by removing the wrong bit shift for
computing the current backlight level.
Also, including typo fixes (lpbc -> lbpc).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34524
Acked-by: Indan Zupancic <indan@nul.nu>
Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: <stable@kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Takashi Iwai and committed by
Linus Torvalds ba3820ad 35d34df7

+46
+10
drivers/gpu/drm/i915/i915_reg.h
··· 1553 1553 1554 1554 /* Backlight control */ 1555 1555 #define BLC_PWM_CTL 0x61254 1556 + #define BACKLIGHT_MODULATION_FREQ_SHIFT (17) 1556 1557 #define BLC_PWM_CTL2 0x61250 /* 965+ only */ 1558 + #define BLM_COMBINATION_MODE (1 << 30) 1559 + /* 1560 + * This is the most significant 15 bits of the number of backlight cycles in a 1561 + * complete cycle of the modulated backlight control. 1562 + * 1563 + * The actual value is this field multiplied by two. 1564 + */ 1565 + #define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) 1566 + #define BLM_LEGACY_MODE (1 << 16) 1557 1567 /* 1558 1568 * This is the number of cycles out of the backlight modulation cycle for which 1559 1569 * the backlight is on.
+36
drivers/gpu/drm/i915/intel_panel.c
··· 30 30 31 31 #include "intel_drv.h" 32 32 33 + #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ 34 + 33 35 void 34 36 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 35 37 struct drm_display_mode *adjusted_mode) ··· 112 110 dev_priv->pch_pf_size = (width << 16) | height; 113 111 } 114 112 113 + static int is_backlight_combination_mode(struct drm_device *dev) 114 + { 115 + struct drm_i915_private *dev_priv = dev->dev_private; 116 + 117 + if (INTEL_INFO(dev)->gen >= 4) 118 + return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; 119 + 120 + if (IS_GEN2(dev)) 121 + return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; 122 + 123 + return 0; 124 + } 125 + 115 126 static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) 116 127 { 117 128 u32 val; ··· 181 166 if (INTEL_INFO(dev)->gen < 4) 182 167 max &= ~1; 183 168 } 169 + 170 + if (is_backlight_combination_mode(dev)) 171 + max *= 0xff; 184 172 } 185 173 186 174 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); ··· 201 183 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 202 184 if (IS_PINEVIEW(dev)) 203 185 val >>= 1; 186 + 187 + if (is_backlight_combination_mode(dev)){ 188 + u8 lbpc; 189 + 190 + val &= ~1; 191 + pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); 192 + val *= lbpc; 193 + } 204 194 } 205 195 206 196 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); ··· 231 205 232 206 if (HAS_PCH_SPLIT(dev)) 233 207 return intel_pch_panel_set_backlight(dev, level); 208 + 209 + if (is_backlight_combination_mode(dev)){ 210 + u32 max = intel_panel_get_max_backlight(dev); 211 + u8 lbpc; 212 + 213 + lbpc = level * 0xfe / max + 1; 214 + level /= lbpc; 215 + pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); 216 + } 217 + 234 218 tmp = I915_READ(BLC_PWM_CTL); 235 219 if (IS_PINEVIEW(dev)) { 236 220 tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);