tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'mlx5-fixes-2023-05-22' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux

Saeed Mahameed says:

====================
mlx5-fixes-2023-05-22

This series provides bug fixes for the mlx5 driver.
Please pull and let me know if there is any problem.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

David S. Miller ba46c96d 04910d8c

+176 -59
+2 -1
drivers/net/ethernet/mellanox/mlx5/core/cmd.c
··· 1920 1920 static void cmd_status_log(struct mlx5_core_dev *dev, u16 opcode, u8 status, 1921 1921 u32 syndrome, int err) 1922 1922 { 1923 + const char *namep = mlx5_command_str(opcode); 1923 1924 struct mlx5_cmd_stats *stats; 1924 1925 1925 - if (!err) 1926 + if (!err || !(strcmp(namep, "unknown command opcode"))) 1926 1927 return; 1927 1928 1928 1929 stats = &dev->cmd.stats[opcode];
+2
drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c
··· 175 175 /* ensure cq space is freed before enabling more cqes */ 176 176 wmb(); 177 177 178 + mlx5e_txqsq_wake(&ptpsq->txqsq); 179 + 178 180 return work_done == budget; 179 181 } 180 182
+3 -1
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c
··· 1369 1369 struct mlx5e_tc_flow *flow; 1370 1370 1371 1371 list_for_each_entry(flow, encap_flows, tmp_list) { 1372 - struct mlx5_flow_attr *attr = flow->attr; 1373 1372 struct mlx5_esw_flow_attr *esw_attr; 1373 + struct mlx5_flow_attr *attr; 1374 1374 1375 1375 if (!mlx5e_is_offloaded_flow(flow)) 1376 1376 continue; 1377 + 1378 + attr = mlx5e_tc_get_encap_attr(flow); 1377 1379 esw_attr = attr->esw_attr; 1378 1380 1379 1381 if (flow_flag_test(flow, SLOW))
+2
drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
··· 193 193 return pi; 194 194 } 195 195 196 + void mlx5e_txqsq_wake(struct mlx5e_txqsq *sq); 197 + 196 198 static inline u16 mlx5e_shampo_get_cqe_header_index(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe) 197 199 { 198 200 return be16_to_cpu(cqe->shampo.header_entry_index) & (rq->mpwqe.shampo->hd_per_wq - 1);
+40 -17
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
··· 1665 1665 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev, u16 *vport) 1666 1666 { 1667 1667 struct mlx5e_priv *out_priv, *route_priv; 1668 - struct mlx5_devcom *devcom = NULL; 1669 1668 struct mlx5_core_dev *route_mdev; 1670 1669 struct mlx5_eswitch *esw; 1671 1670 u16 vhca_id; 1672 - int err; 1673 1671 1674 1672 out_priv = netdev_priv(out_dev); 1675 1673 esw = out_priv->mdev->priv.eswitch; ··· 1676 1678 1677 1679 vhca_id = MLX5_CAP_GEN(route_mdev, vhca_id); 1678 1680 if (mlx5_lag_is_active(out_priv->mdev)) { 1681 + struct mlx5_devcom *devcom; 1682 + int err; 1683 + 1679 1684 /* In lag case we may get devices from different eswitch instances. 1680 1685 * If we failed to get vport num, it means, mostly, that we on the wrong 1681 1686 * eswitch. ··· 1687 1686 if (err != -ENOENT) 1688 1687 return err; 1689 1688 1689 + rcu_read_lock(); 1690 1690 devcom = out_priv->mdev->priv.devcom; 1691 - esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS); 1692 - if (!esw) 1693 - return -ENODEV; 1691 + esw = mlx5_devcom_get_peer_data_rcu(devcom, MLX5_DEVCOM_ESW_OFFLOADS); 1692 + err = esw ? mlx5_eswitch_vhca_id_to_vport(esw, vhca_id, vport) : -ENODEV; 1693 + rcu_read_unlock(); 1694 + 1695 + return err; 1694 1696 } 1695 1697 1696 - err = mlx5_eswitch_vhca_id_to_vport(esw, vhca_id, vport); 1697 - if (devcom) 1698 - mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS); 1699 - return err; 1698 + return mlx5_eswitch_vhca_id_to_vport(esw, vhca_id, vport); 1700 1699 } 1701 1700 1702 1701 static int ··· 5302 5301 goto err_action_counter; 5303 5302 } 5304 5303 5304 + mlx5_esw_offloads_devcom_init(esw); 5305 + 5305 5306 return 0; 5306 5307 5307 5308 err_action_counter: ··· 5332 5329 priv = netdev_priv(rpriv->netdev); 5333 5330 esw = priv->mdev->priv.eswitch; 5334 5331 5335 - mlx5e_tc_clean_fdb_peer_flows(esw); 5332 + mlx5_esw_offloads_devcom_cleanup(esw); 5336 5333 5337 5334 mlx5e_tc_tun_cleanup(uplink_priv->encap); 5338 5335 ··· 5646 5643 0, NULL); 5647 5644 } 5648 5645 5646 + static struct mapping_ctx * 5647 + mlx5e_get_priv_obj_mapping(struct mlx5e_priv *priv) 5648 + { 5649 + struct mlx5e_tc_table *tc; 5650 + struct mlx5_eswitch *esw; 5651 + struct mapping_ctx *ctx; 5652 + 5653 + if (is_mdev_switchdev_mode(priv->mdev)) { 5654 + esw = priv->mdev->priv.eswitch; 5655 + ctx = esw->offloads.reg_c0_obj_pool; 5656 + } else { 5657 + tc = mlx5e_fs_get_tc(priv->fs); 5658 + ctx = tc->mapping; 5659 + } 5660 + 5661 + return ctx; 5662 + } 5663 + 5649 5664 int mlx5e_tc_action_miss_mapping_get(struct mlx5e_priv *priv, struct mlx5_flow_attr *attr, 5650 5665 u64 act_miss_cookie, u32 *act_miss_mapping) 5651 5666 { 5652 - struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; 5653 5667 struct mlx5_mapped_obj mapped_obj = {}; 5668 + struct mlx5_eswitch *esw; 5654 5669 struct mapping_ctx *ctx; 5655 5670 int err; 5656 5671 5657 - ctx = esw->offloads.reg_c0_obj_pool; 5658 - 5672 + ctx = mlx5e_get_priv_obj_mapping(priv); 5659 5673 mapped_obj.type = MLX5_MAPPED_OBJ_ACT_MISS; 5660 5674 mapped_obj.act_miss_cookie = act_miss_cookie; 5661 5675 err = mapping_add(ctx, &mapped_obj, act_miss_mapping); 5662 5676 if (err) 5663 5677 return err; 5664 5678 5679 + if (!is_mdev_switchdev_mode(priv->mdev)) 5680 + return 0; 5681 + 5682 + esw = priv->mdev->priv.eswitch; 5665 5683 attr->act_id_restore_rule = esw_add_restore_rule(esw, *act_miss_mapping); 5666 5684 if (IS_ERR(attr->act_id_restore_rule)) 5667 5685 goto err_rule; ··· 5697 5673 void mlx5e_tc_action_miss_mapping_put(struct mlx5e_priv *priv, struct mlx5_flow_attr *attr, 5698 5674 u32 act_miss_mapping) 5699 5675 { 5700 - struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; 5701 - struct mapping_ctx *ctx; 5676 + struct mapping_ctx *ctx = mlx5e_get_priv_obj_mapping(priv); 5702 5677 5703 - ctx = esw->offloads.reg_c0_obj_pool; 5704 - mlx5_del_flow_rules(attr->act_id_restore_rule); 5678 + if (is_mdev_switchdev_mode(priv->mdev)) 5679 + mlx5_del_flow_rules(attr->act_id_restore_rule); 5705 5680 mapping_remove(ctx, act_miss_mapping); 5706 5681 }
+12 -7
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
··· 762 762 } 763 763 } 764 764 765 + void mlx5e_txqsq_wake(struct mlx5e_txqsq *sq) 766 + { 767 + if (netif_tx_queue_stopped(sq->txq) && 768 + mlx5e_wqc_has_room_for(&sq->wq, sq->cc, sq->pc, sq->stop_room) && 769 + mlx5e_ptpsq_fifo_has_room(sq) && 770 + !test_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state)) { 771 + netif_tx_wake_queue(sq->txq); 772 + sq->stats->wake++; 773 + } 774 + } 775 + 765 776 bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget) 766 777 { 767 778 struct mlx5e_sq_stats *stats; ··· 872 861 873 862 netdev_tx_completed_queue(sq->txq, npkts, nbytes); 874 863 875 - if (netif_tx_queue_stopped(sq->txq) && 876 - mlx5e_wqc_has_room_for(&sq->wq, sq->cc, sq->pc, sq->stop_room) && 877 - mlx5e_ptpsq_fifo_has_room(sq) && 878 - !test_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state)) { 879 - netif_tx_wake_queue(sq->txq); 880 - stats->wake++; 881 - } 864 + mlx5e_txqsq_wake(sq); 882 865 883 866 return (i == MLX5E_TX_CQ_POLL_BUDGET); 884 867 }
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/eq.c
··· 1104 1104 struct mlx5_eq_table *table = dev->priv.eq_table; 1105 1105 1106 1106 mutex_lock(&table->lock); /* sync with create/destroy_async_eq */ 1107 - mlx5_irq_table_destroy(dev); 1107 + mlx5_irq_table_free_irqs(dev); 1108 1108 mutex_unlock(&table->lock); 1109 1109 } 1110 1110
+5
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
··· 342 342 u32 large_group_num; 343 343 } params; 344 344 struct blocking_notifier_head n_head; 345 + bool paired[MLX5_MAX_PORTS]; 345 346 }; 346 347 347 348 void esw_offloads_disable(struct mlx5_eswitch *esw); ··· 370 369 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf); 371 370 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw); 372 371 void mlx5_eswitch_disable(struct mlx5_eswitch *esw); 372 + void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw); 373 + void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw); 373 374 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw, 374 375 u16 vport, const u8 *mac); 375 376 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, ··· 770 767 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; } 771 768 static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf) {} 772 769 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw) {} 770 + static inline void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw) {} 771 + static inline void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw) {} 773 772 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; } 774 773 static inline 775 774 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
+10 -6
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
··· 2742 2742 mlx5_eswitch_vport_match_metadata_enabled(peer_esw)) 2743 2743 break; 2744 2744 2745 + if (esw->paired[mlx5_get_dev_index(peer_esw->dev)]) 2746 + break; 2747 + 2745 2748 err = mlx5_esw_offloads_set_ns_peer(esw, peer_esw, true); 2746 2749 if (err) 2747 2750 goto err_out; ··· 2756 2753 if (err) 2757 2754 goto err_pair; 2758 2755 2756 + esw->paired[mlx5_get_dev_index(peer_esw->dev)] = true; 2757 + peer_esw->paired[mlx5_get_dev_index(esw->dev)] = true; 2759 2758 mlx5_devcom_set_paired(devcom, MLX5_DEVCOM_ESW_OFFLOADS, true); 2760 2759 break; 2761 2760 2762 2761 case ESW_OFFLOADS_DEVCOM_UNPAIR: 2763 - if (!mlx5_devcom_is_paired(devcom, MLX5_DEVCOM_ESW_OFFLOADS)) 2762 + if (!esw->paired[mlx5_get_dev_index(peer_esw->dev)]) 2764 2763 break; 2765 2764 2766 2765 mlx5_devcom_set_paired(devcom, MLX5_DEVCOM_ESW_OFFLOADS, false); 2766 + esw->paired[mlx5_get_dev_index(peer_esw->dev)] = false; 2767 + peer_esw->paired[mlx5_get_dev_index(esw->dev)] = false; 2767 2768 mlx5_esw_offloads_unpair(peer_esw); 2768 2769 mlx5_esw_offloads_unpair(esw); 2769 2770 mlx5_esw_offloads_set_ns_peer(esw, peer_esw, false); ··· 2786 2779 return err; 2787 2780 } 2788 2781 2789 - static void esw_offloads_devcom_init(struct mlx5_eswitch *esw) 2782 + void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw) 2790 2783 { 2791 2784 struct mlx5_devcom *devcom = esw->dev->priv.devcom; 2792 2785 ··· 2809 2802 ESW_OFFLOADS_DEVCOM_PAIR, esw); 2810 2803 } 2811 2804 2812 - static void esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw) 2805 + void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw) 2813 2806 { 2814 2807 struct mlx5_devcom *devcom = esw->dev->priv.devcom; 2815 2808 ··· 3257 3250 if (err) 3258 3251 goto err_vports; 3259 3252 3260 - esw_offloads_devcom_init(esw); 3261 - 3262 3253 return 0; 3263 3254 3264 3255 err_vports: ··· 3297 3292 3298 3293 void esw_offloads_disable(struct mlx5_eswitch *esw) 3299 3294 { 3300 - esw_offloads_devcom_cleanup(esw); 3301 3295 mlx5_eswitch_disable_pf_vf_vports(esw); 3302 3296 esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK); 3303 3297 esw_set_passing_vport_metadata(esw, false);
+53 -17
drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c
··· 3 3 4 4 #include <linux/mlx5/vport.h> 5 5 #include "lib/devcom.h" 6 + #include "mlx5_core.h" 6 7 7 8 static LIST_HEAD(devcom_list); 8 9 ··· 14 13 15 14 struct mlx5_devcom_component { 16 15 struct { 17 - void *data; 16 + void __rcu *data; 18 17 } device[MLX5_DEVCOM_PORTS_SUPPORTED]; 19 18 20 19 mlx5_devcom_event_handler_t handler; ··· 78 77 if (MLX5_CAP_GEN(dev, num_lag_ports) != MLX5_DEVCOM_PORTS_SUPPORTED) 79 78 return NULL; 80 79 80 + mlx5_dev_list_lock(); 81 81 sguid0 = mlx5_query_nic_system_image_guid(dev); 82 82 list_for_each_entry(iter, &devcom_list, list) { 83 83 struct mlx5_core_dev *tmp_dev = NULL; ··· 104 102 105 103 if (!priv) { 106 104 priv = mlx5_devcom_list_alloc(); 107 - if (!priv) 108 - return ERR_PTR(-ENOMEM); 105 + if (!priv) { 106 + devcom = ERR_PTR(-ENOMEM); 107 + goto out; 108 + } 109 109 110 110 idx = 0; 111 111 new_priv = true; ··· 116 112 priv->devs[idx] = dev; 117 113 devcom = mlx5_devcom_alloc(priv, idx); 118 114 if (!devcom) { 119 - kfree(priv); 120 - return ERR_PTR(-ENOMEM); 115 + if (new_priv) 116 + kfree(priv); 117 + devcom = ERR_PTR(-ENOMEM); 118 + goto out; 121 119 } 122 120 123 121 if (new_priv) 124 122 list_add(&priv->list, &devcom_list); 125 - 123 + out: 124 + mlx5_dev_list_unlock(); 126 125 return devcom; 127 126 } 128 127 ··· 138 131 if (IS_ERR_OR_NULL(devcom)) 139 132 return; 140 133 134 + mlx5_dev_list_lock(); 141 135 priv = devcom->priv; 142 136 priv->devs[devcom->idx] = NULL; 143 137 ··· 149 141 break; 150 142 151 143 if (i != MLX5_DEVCOM_PORTS_SUPPORTED) 152 - return; 144 + goto out; 153 145 154 146 list_del(&priv->list); 155 147 kfree(priv); 148 + out: 149 + mlx5_dev_list_unlock(); 156 150 } 157 151 158 152 void mlx5_devcom_register_component(struct mlx5_devcom *devcom, ··· 172 162 comp = &devcom->priv->components[id]; 173 163 down_write(&comp->sem); 174 164 comp->handler = handler; 175 - comp->device[devcom->idx].data = data; 165 + rcu_assign_pointer(comp->device[devcom->idx].data, data); 176 166 up_write(&comp->sem); 177 167 } 178 168 ··· 186 176 187 177 comp = &devcom->priv->components[id]; 188 178 down_write(&comp->sem); 189 - comp->device[devcom->idx].data = NULL; 179 + RCU_INIT_POINTER(comp->device[devcom->idx].data, NULL); 190 180 up_write(&comp->sem); 181 + synchronize_rcu(); 191 182 } 192 183 193 184 int mlx5_devcom_send_event(struct mlx5_devcom *devcom, ··· 204 193 205 194 comp = &devcom->priv->components[id]; 206 195 down_write(&comp->sem); 207 - for (i = 0; i < MLX5_DEVCOM_PORTS_SUPPORTED; i++) 208 - if (i != devcom->idx && comp->device[i].data) { 209 - err = comp->handler(event, comp->device[i].data, 210 - event_data); 196 + for (i = 0; i < MLX5_DEVCOM_PORTS_SUPPORTED; i++) { 197 + void *data = rcu_dereference_protected(comp->device[i].data, 198 + lockdep_is_held(&comp->sem)); 199 + 200 + if (i != devcom->idx && data) { 201 + err = comp->handler(event, data, event_data); 211 202 break; 212 203 } 204 + } 213 205 214 206 up_write(&comp->sem); 215 207 return err; ··· 227 213 comp = &devcom->priv->components[id]; 228 214 WARN_ON(!rwsem_is_locked(&comp->sem)); 229 215 230 - comp->paired = paired; 216 + WRITE_ONCE(comp->paired, paired); 231 217 } 232 218 233 219 bool mlx5_devcom_is_paired(struct mlx5_devcom *devcom, ··· 236 222 if (IS_ERR_OR_NULL(devcom)) 237 223 return false; 238 224 239 - return devcom->priv->components[id].paired; 225 + return READ_ONCE(devcom->priv->components[id].paired); 240 226 } 241 227 242 228 void *mlx5_devcom_get_peer_data(struct mlx5_devcom *devcom, ··· 250 236 251 237 comp = &devcom->priv->components[id]; 252 238 down_read(&comp->sem); 253 - if (!comp->paired) { 239 + if (!READ_ONCE(comp->paired)) { 254 240 up_read(&comp->sem); 255 241 return NULL; 256 242 } ··· 259 245 if (i != devcom->idx) 260 246 break; 261 247 262 - return comp->device[i].data; 248 + return rcu_dereference_protected(comp->device[i].data, lockdep_is_held(&comp->sem)); 249 + } 250 + 251 + void *mlx5_devcom_get_peer_data_rcu(struct mlx5_devcom *devcom, enum mlx5_devcom_components id) 252 + { 253 + struct mlx5_devcom_component *comp; 254 + int i; 255 + 256 + if (IS_ERR_OR_NULL(devcom)) 257 + return NULL; 258 + 259 + for (i = 0; i < MLX5_DEVCOM_PORTS_SUPPORTED; i++) 260 + if (i != devcom->idx) 261 + break; 262 + 263 + comp = &devcom->priv->components[id]; 264 + /* This can change concurrently, however 'data' pointer will remain 265 + * valid for the duration of RCU read section. 266 + */ 267 + if (!READ_ONCE(comp->paired)) 268 + return NULL; 269 + 270 + return rcu_dereference(comp->device[i].data); 263 271 } 264 272 265 273 void mlx5_devcom_release_peer_data(struct mlx5_devcom *devcom,
+1
drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h
··· 41 41 42 42 void *mlx5_devcom_get_peer_data(struct mlx5_devcom *devcom, 43 43 enum mlx5_devcom_components id); 44 + void *mlx5_devcom_get_peer_data_rcu(struct mlx5_devcom *devcom, enum mlx5_devcom_components id); 44 45 void mlx5_devcom_release_peer_data(struct mlx5_devcom *devcom, 45 46 enum mlx5_devcom_components id); 46 47
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/main.c
··· 1049 1049 1050 1050 dev->dm = mlx5_dm_create(dev); 1051 1051 if (IS_ERR(dev->dm)) 1052 - mlx5_core_warn(dev, "Failed to init device memory%d\n", err); 1052 + mlx5_core_warn(dev, "Failed to init device memory %ld\n", PTR_ERR(dev->dm)); 1053 1053 1054 1054 dev->tracer = mlx5_fw_tracer_create(dev); 1055 1055 dev->hv_vhca = mlx5_hv_vhca_create(dev);
+1
drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h
··· 15 15 void mlx5_irq_table_cleanup(struct mlx5_core_dev *dev); 16 16 int mlx5_irq_table_create(struct mlx5_core_dev *dev); 17 17 void mlx5_irq_table_destroy(struct mlx5_core_dev *dev); 18 + void mlx5_irq_table_free_irqs(struct mlx5_core_dev *dev); 18 19 int mlx5_irq_table_get_num_comp(struct mlx5_irq_table *table); 19 20 int mlx5_irq_table_get_sfs_vec(struct mlx5_irq_table *table); 20 21 struct mlx5_irq_table *mlx5_irq_table_get(struct mlx5_core_dev *dev);
+35 -5
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
··· 32 32 struct mlx5_irq_pool *pool; 33 33 int refcount; 34 34 struct msi_map map; 35 + u32 pool_index; 35 36 }; 36 37 37 38 struct mlx5_irq_table { ··· 133 132 struct cpu_rmap *rmap; 134 133 #endif 135 134 136 - xa_erase(&pool->irqs, irq->map.index); 135 + xa_erase(&pool->irqs, irq->pool_index); 137 136 /* free_irq requires that affinity_hint and rmap will be cleared before 138 137 * calling it. To satisfy this requirement, we call 139 138 * irq_cpu_rmap_remove() to remove the notifier ··· 277 276 } 278 277 irq->pool = pool; 279 278 irq->refcount = 1; 280 - irq->map.index = i; 281 - err = xa_err(xa_store(&pool->irqs, irq->map.index, irq, GFP_KERNEL)); 279 + irq->pool_index = i; 280 + err = xa_err(xa_store(&pool->irqs, irq->pool_index, irq, GFP_KERNEL)); 282 281 if (err) { 283 282 mlx5_core_err(dev, "Failed to alloc xa entry for irq(%u). err = %d\n", 284 - irq->map.index, err); 283 + irq->pool_index, err); 285 284 goto err_xa; 286 285 } 287 286 return irq; ··· 568 567 struct mlx5_irq *irq; 569 568 int i; 570 569 571 - af_desc.is_managed = 1; 570 + af_desc.is_managed = false; 572 571 for (i = 0; i < nirqs; i++) { 573 572 cpumask_set_cpu(cpus[i], &af_desc.mask); 574 573 irq = mlx5_irq_request(dev, i + 1, &af_desc, rmap); ··· 692 691 irq_pool_free(table->pcif_pool); 693 692 } 694 693 694 + static void mlx5_irq_pool_free_irqs(struct mlx5_irq_pool *pool) 695 + { 696 + struct mlx5_irq *irq; 697 + unsigned long index; 698 + 699 + xa_for_each(&pool->irqs, index, irq) 700 + free_irq(irq->map.virq, &irq->nh); 701 + } 702 + 703 + static void mlx5_irq_pools_free_irqs(struct mlx5_irq_table *table) 704 + { 705 + if (table->sf_ctrl_pool) { 706 + mlx5_irq_pool_free_irqs(table->sf_comp_pool); 707 + mlx5_irq_pool_free_irqs(table->sf_ctrl_pool); 708 + } 709 + mlx5_irq_pool_free_irqs(table->pcif_pool); 710 + } 711 + 695 712 /* irq_table API */ 696 713 697 714 int mlx5_irq_table_init(struct mlx5_core_dev *dev) ··· 790 771 * to here. Hence, making sure all the irqs are released. 791 772 */ 792 773 irq_pools_destroy(table); 774 + pci_free_irq_vectors(dev->pdev); 775 + } 776 + 777 + void mlx5_irq_table_free_irqs(struct mlx5_core_dev *dev) 778 + { 779 + struct mlx5_irq_table *table = dev->priv.irq_table; 780 + 781 + if (mlx5_core_is_sf(dev)) 782 + return; 783 + 784 + mlx5_irq_pools_free_irqs(table); 793 785 pci_free_irq_vectors(dev->pdev); 794 786 } 795 787
+3 -1
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c
··· 117 117 caps->gvmi = MLX5_CAP_GEN(mdev, vhca_id); 118 118 caps->flex_protocols = MLX5_CAP_GEN(mdev, flex_parser_protocols); 119 119 caps->sw_format_ver = MLX5_CAP_GEN(mdev, steering_format_version); 120 + caps->roce_caps.fl_rc_qp_when_roce_disabled = 121 + MLX5_CAP_GEN(mdev, fl_rc_qp_when_roce_disabled); 120 122 121 123 if (MLX5_CAP_GEN(mdev, roce)) { 122 124 err = dr_cmd_query_nic_vport_roce_en(mdev, 0, &roce_en); ··· 126 124 return err; 127 125 128 126 caps->roce_caps.roce_en = roce_en; 129 - caps->roce_caps.fl_rc_qp_when_roce_disabled = 127 + caps->roce_caps.fl_rc_qp_when_roce_disabled |= 130 128 MLX5_CAP_ROCE(mdev, fl_rc_qp_when_roce_disabled); 131 129 caps->roce_caps.fl_rc_qp_when_roce_enabled = 132 130 MLX5_CAP_ROCE(mdev, fl_rc_qp_when_roce_enabled);
+2 -1
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
··· 15 15 { 16 16 u32 crc = crc32(0, input_data, length); 17 17 18 - return (__force u32)htonl(crc); 18 + return (__force u32)((crc >> 24) & 0xff) | ((crc << 8) & 0xff0000) | 19 + ((crc >> 8) & 0xff00) | ((crc << 24) & 0xff000000); 19 20 } 20 21 21 22 bool mlx5dr_ste_supp_ttl_cs_recalc(struct mlx5dr_cmd_caps *caps)
+3 -1
include/linux/mlx5/mlx5_ifc.h
··· 1705 1705 u8 rc[0x1]; 1706 1706 1707 1707 u8 uar_4k[0x1]; 1708 - u8 reserved_at_241[0x9]; 1708 + u8 reserved_at_241[0x7]; 1709 + u8 fl_rc_qp_when_roce_disabled[0x1]; 1710 + u8 regexp_params[0x1]; 1709 1711 u8 uar_sz[0x6]; 1710 1712 u8 port_selection_cap[0x1]; 1711 1713 u8 reserved_at_248[0x1];