Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mmc-v5.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC fixes from Ulf Hansson:
- sdhci-acpi: Fixup build dependency for PCI
- sdhci-omap: Resolve Kconfig warnings on keystone
- sdhci-iproc: Propagate errors from DT parsing
- meson-gx: Fixup IRQ handling in release callback
- meson-gx: Use signal re-sampling to fixup tuning
- dw_mmc-bluefield: Fix the license information
* tag 'mmc-v5.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: dw_mmc-bluefield: : Fix the license information
mmc: meson-gx: enable signal re-sampling together with tuning
mmc: sdhci-iproc: handle mmc_of_parse() errors during probe
mmc: meson-gx: Free irq in release() callback
mmc: host: Fix Kconfig warnings on keystone_defconfig
mmc: sdhci-acpi: Make PCI dependency explicit
+26
-20
+2
-2
drivers/mmc/host/Kconfig
+2
-2
drivers/mmc/host/Kconfig
···
116
116
117
117
config MMC_SDHCI_ACPI
118
118
tristate "SDHCI support for ACPI enumerated SDHCI controllers"
119
-
depends on MMC_SDHCI && ACPI
119
+
depends on MMC_SDHCI && ACPI && PCI
120
120
select IOSF_MBI if X86
121
121
help
122
122
This selects support for ACPI enumerated SDHCI controllers,
···
978
978
tristate "TI SDHCI Controller Support"
979
979
depends on MMC_SDHCI_PLTFM && OF
980
980
select THERMAL
981
-
select TI_SOC_THERMAL
981
+
imply TI_SOC_THERMAL
982
982
help
983
983
This selects the Secure Digital Host Controller Interface (SDHCI)
984
984
support present in TI's DRA7 SOCs. The controller supports
-5
drivers/mmc/host/dw_mmc-bluefield.c
-5
drivers/mmc/host/dw_mmc-bluefield.c
···
1
1
// SPDX-License-Identifier: GPL-2.0
2
2
/*
3
3
* Copyright (C) 2018 Mellanox Technologies.
4
-
*
5
-
* This program is free software; you can redistribute it and/or modify
6
-
* it under the terms of the GNU General Public License as published by
7
-
* the Free Software Foundation; either version 2 of the License, or
8
-
* (at your option) any later version.
9
4
*/
10
5
11
6
#include <linux/bitfield.h>
+20
-12
drivers/mmc/host/meson-gx-mmc.c
+20
-12
drivers/mmc/host/meson-gx-mmc.c
···
179
179
struct sd_emmc_desc *descs;
180
180
dma_addr_t descs_dma_addr;
181
181
182
+
int irq;
183
+
182
184
bool vqmmc_enabled;
183
185
};
184
186
···
740
738
static int meson_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
741
739
{
742
740
struct meson_host *host = mmc_priv(mmc);
741
+
int adj = 0;
742
+
743
+
/* enable signal resampling w/o delay */
744
+
adj = ADJUST_ADJ_EN;
745
+
writel(adj, host->regs + host->data->adjust);
743
746
744
747
return meson_mmc_clk_phase_tuning(mmc, opcode, host->rx_clk);
745
748
}
···
774
767
case MMC_POWER_UP:
775
768
if (!IS_ERR(mmc->supply.vmmc))
776
769
mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);
770
+
771
+
/* disable signal resampling */
772
+
writel(0, host->regs + host->data->adjust);
777
773
778
774
/* Reset rx phase */
779
775
clk_set_phase(host->rx_clk, 0);
···
1176
1166
1177
1167
static void meson_mmc_cfg_init(struct meson_host *host)
1178
1168
{
1179
-
u32 cfg = 0, adj = 0;
1169
+
u32 cfg = 0;
1180
1170
1181
1171
cfg |= FIELD_PREP(CFG_RESP_TIMEOUT_MASK,
1182
1172
ilog2(SD_EMMC_CFG_RESP_TIMEOUT));
···
1187
1177
cfg |= CFG_ERR_ABORT;
1188
1178
1189
1179
writel(cfg, host->regs + SD_EMMC_CFG);
1190
-
1191
-
/* enable signal resampling w/o delay */
1192
-
adj = ADJUST_ADJ_EN;
1193
-
writel(adj, host->regs + host->data->adjust);
1194
1180
}
1195
1181
1196
1182
static int meson_mmc_card_busy(struct mmc_host *mmc)
···
1237
1231
struct resource *res;
1238
1232
struct meson_host *host;
1239
1233
struct mmc_host *mmc;
1240
-
int ret, irq;
1234
+
int ret;
1241
1235
1242
1236
mmc = mmc_alloc_host(sizeof(struct meson_host), &pdev->dev);
1243
1237
if (!mmc)
···
1282
1276
goto free_host;
1283
1277
}
1284
1278
1285
-
irq = platform_get_irq(pdev, 0);
1286
-
if (irq <= 0) {
1279
+
host->irq = platform_get_irq(pdev, 0);
1280
+
if (host->irq <= 0) {
1287
1281
dev_err(&pdev->dev, "failed to get interrupt resource.\n");
1288
1282
ret = -EINVAL;
1289
1283
goto free_host;
···
1337
1331
writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN,
1338
1332
host->regs + SD_EMMC_IRQ_EN);
1339
1333
1340
-
ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq,
1341
-
meson_mmc_irq_thread, IRQF_SHARED,
1342
-
NULL, host);
1334
+
ret = request_threaded_irq(host->irq, meson_mmc_irq,
1335
+
meson_mmc_irq_thread, IRQF_SHARED, NULL, host);
1343
1336
if (ret)
1344
1337
goto err_init_clk;
1345
1338
···
1356
1351
if (host->bounce_buf == NULL) {
1357
1352
dev_err(host->dev, "Unable to map allocate DMA bounce buffer.\n");
1358
1353
ret = -ENOMEM;
1359
-
goto err_init_clk;
1354
+
goto err_free_irq;
1360
1355
}
1361
1356
1362
1357
host->descs = dma_alloc_coherent(host->dev, SD_EMMC_DESC_BUF_LEN,
···
1375
1370
err_bounce_buf:
1376
1371
dma_free_coherent(host->dev, host->bounce_buf_size,
1377
1372
host->bounce_buf, host->bounce_dma_addr);
1373
+
err_free_irq:
1374
+
free_irq(host->irq, host);
1378
1375
err_init_clk:
1379
1376
clk_disable_unprepare(host->mmc_clk);
1380
1377
err_core_clk:
···
1394
1387
1395
1388
/* disable interrupts */
1396
1389
writel(0, host->regs + SD_EMMC_IRQ_EN);
1390
+
free_irq(host->irq, host);
1397
1391
1398
1392
dma_free_coherent(host->dev, SD_EMMC_DESC_BUF_LEN,
1399
1393
host->descs, host->descs_dma_addr);