tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf tooling fixes from Thomas Gleixner:
"Another small set of perf tooling fixes and updates:

- Revert "perf pmu: Fix pmu events parsing rule", as it broke Intel
PT event description parsing (Arnaldo Carvalho de Melo)

- Sync x86's cpufeatures.h and kvm UAPI headers with the kernel
sources, suppressing the ABI drift warnings (Arnaldo Carvalho de
Melo)

- Remove duplicated entry for westmereep-dp in Intel's mapfile.csv
(William Cohen)

- Fix typo in 'perf bench numa' options description (Yisheng Xie)"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
Revert "perf pmu: Fix pmu events parsing rule"
tools headers kvm: Sync ARM UAPI headers with the kernel sources
tools headers kvm: Sync uapi/linux/kvm.h with the kernel sources
tools headers: Sync x86 cpufeatures.h with the kernel sources
perf vendor events intel: Remove duplicated entry for westmereep-dp in mapfile.csv
perf bench numa: Fix typo in options

Linus Torvalds baeda713 0503fd65

+25 -6
+6
tools/arch/arm/include/uapi/asm/kvm.h
··· 195 195 #define KVM_REG_ARM_VFP_FPINST 0x1009 196 196 #define KVM_REG_ARM_VFP_FPINST2 0x100A 197 197 198 + /* KVM-as-firmware specific pseudo-registers */ 199 + #define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT) 200 + #define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM | KVM_REG_SIZE_U64 | \ 201 + KVM_REG_ARM_FW | ((r) & 0xffff)) 202 + #define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) 203 + 198 204 /* Device Control API: ARM VGIC */ 199 205 #define KVM_DEV_ARM_VGIC_GRP_ADDR 0 200 206 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
+6
tools/arch/arm64/include/uapi/asm/kvm.h
··· 206 206 #define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2) 207 207 #define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2) 208 208 209 + /* KVM-as-firmware specific pseudo-registers */ 210 + #define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT) 211 + #define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ 212 + KVM_REG_ARM_FW | ((r) & 0xffff)) 213 + #define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0) 214 + 209 215 /* Device Control API: ARM VGIC */ 210 216 #define KVM_DEV_ARM_VGIC_GRP_ADDR 0 211 217 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
+1
tools/arch/x86/include/asm/cpufeatures.h
··· 320 320 #define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */ 321 321 #define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */ 322 322 #define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */ 323 + #define X86_FEATURE_CLDEMOTE (16*32+25) /* CLDEMOTE instruction */ 323 324 324 325 /* AMD-defined CPU features, CPUID level 0x80000007 (EBX), word 17 */ 325 326 #define X86_FEATURE_OVERFLOW_RECOV (17*32+ 0) /* MCA overflow recovery support */
+7
tools/include/uapi/linux/kvm.h
··· 676 676 __u8 pad[36]; 677 677 }; 678 678 679 + #define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0) 680 + #define KVM_X86_DISABLE_EXITS_HTL (1 << 1) 681 + #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) 682 + #define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \ 683 + KVM_X86_DISABLE_EXITS_HTL | \ 684 + KVM_X86_DISABLE_EXITS_PAUSE) 685 + 679 686 /* for KVM_ENABLE_CAP */ 680 687 struct kvm_enable_cap { 681 688 /* in */
+1 -1
tools/perf/bench/numa.c
··· 175 175 OPT_UINTEGER('s', "nr_secs" , &p0.nr_secs, "max number of seconds to run (default: 5 secs)"), 176 176 OPT_UINTEGER('u', "usleep" , &p0.sleep_usecs, "usecs to sleep per loop iteration"), 177 177 178 - OPT_BOOLEAN('R', "data_reads" , &p0.data_reads, "access the data via writes (can be mixed with -W)"), 178 + OPT_BOOLEAN('R', "data_reads" , &p0.data_reads, "access the data via reads (can be mixed with -W)"), 179 179 OPT_BOOLEAN('W', "data_writes" , &p0.data_writes, "access the data via writes (can be mixed with -R)"), 180 180 OPT_BOOLEAN('B', "data_backwards", &p0.data_backwards, "access the data backwards as well"), 181 181 OPT_BOOLEAN('Z', "data_zero_memset", &p0.data_zero_memset,"access the data via glibc bzero only"),
-1
tools/perf/pmu-events/arch/x86/mapfile.csv
··· 29 29 GenuineIntel-6-4C,v13,silvermont,core 30 30 GenuineIntel-6-2A,v15,sandybridge,core 31 31 GenuineIntel-6-2C,v2,westmereep-dp,core 32 - GenuineIntel-6-2C,v2,westmereep-dp,core 33 32 GenuineIntel-6-25,v2,westmereep-sp,core 34 33 GenuineIntel-6-2F,v2,westmereex,core 35 34 GenuineIntel-6-55,v1,skylakex,core
+4 -4
tools/perf/util/parse-events.y
··· 224 224 event_bpf_file 225 225 226 226 event_pmu: 227 - PE_NAME '/' event_config '/' 227 + PE_NAME opt_event_config 228 228 { 229 229 struct list_head *list, *orig_terms, *terms; 230 230 231 - if (parse_events_copy_term_list($3, &orig_terms)) 231 + if (parse_events_copy_term_list($2, &orig_terms)) 232 232 YYABORT; 233 233 234 234 ALLOC_LIST(list); 235 - if (parse_events_add_pmu(_parse_state, list, $1, $3, false)) { 235 + if (parse_events_add_pmu(_parse_state, list, $1, $2, false)) { 236 236 struct perf_pmu *pmu = NULL; 237 237 int ok = 0; 238 238 char *pattern; ··· 262 262 if (!ok) 263 263 YYABORT; 264 264 } 265 - parse_events_terms__delete($3); 265 + parse_events_terms__delete($2); 266 266 parse_events_terms__delete(orig_terms); 267 267 $$ = list; 268 268 }