Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking fixes from David Miller:
1) All users of AF_PACKET's fanout feature want a symmetric packet
header hash for load balancing purposes, so give it to them.
2) Fix vlan state synchronization in e1000e, from Jarod Wilson.
3) Use correct socket pointer in ip_skb_dst_mtu(), from Shmulik
Ladkani.
4) mlx5 bug fixes from Mohamad Haj Yahia, Daniel Jurgens, Matthew
Finlay, Rana Shahout, and Shaker Daibes. Mostly to do with
operation timeouts and PCI error handling.
5) Fix checksum handling in mirred packet action, from WANG Cong.
6) Set skb->dev correctly when transmitting in !protect_frames case of
macsec driver, from Daniel Borkmann.
7) Fix MTU calculation in geneve driver, from Haishuang Yan.
8) Missing netif_napi_del() in unregister path of qeth driver, from
Ursula Braun.
9) Handle malformed route netlink messages in decnet properly, from
Vergard Nossum.
10) Memory leak of percpu data in ipv6 routing code, from Martin KaFai
Lau.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (41 commits)
ipv6: Fix mem leak in rt6i_pcpu
net: fix decnet rtnexthop parsing
cxgb4: update latest firmware version supported
net/mlx5: Avoid setting unused var when modifying vport node GUID
bonding: fix enslavement slave link notifications
r8152: fix runtime function for RTL8152
qeth: delete napi struct when removing a qeth device
Revert "fsl/fman: fix error handling"
fsl/fman: fix error handling
cdc_ncm: workaround for EM7455 "silent" data interface
RDS: fix rds_tcp_init() error path
geneve: fix max_mtu setting
net: phy: dp83867: Fix initialization of PHYCR register
enc28j60: Fix race condition in enc28j60 driver
net: stmmac: Fix null-function call in ISR on stmmac1000
tipc: fix nl compat regression for link statistics
net: bcmsysport: Device stats are unsigned long
macsec: set actual real device for xmit when !protect_frames
net_sched: fix mirrored packets checksum
packet: Use symmetric hash for PACKET_FANOUT_HASH.
...
+526
-211
+7
-4
drivers/net/bonding/bond_3ad.c
+7
-4
drivers/net/bonding/bond_3ad.c
···
101
101
#define MAC_ADDRESS_EQUAL(A, B) \
102
102
ether_addr_equal_64bits((const u8 *)A, (const u8 *)B)
103
103
104
-
static struct mac_addr null_mac_addr = { { 0, 0, 0, 0, 0, 0 } };
104
+
static const u8 null_mac_addr[ETH_ALEN + 2] __long_aligned = {
105
+
0, 0, 0, 0, 0, 0
106
+
};
105
107
static u16 ad_ticks_per_sec;
106
108
static const int ad_delta_in_ticks = (AD_TIMER_INTERVAL * HZ) / 1000;
107
109
108
-
static const u8 lacpdu_mcast_addr[ETH_ALEN] = MULTICAST_LACPDU_ADDR;
110
+
static const u8 lacpdu_mcast_addr[ETH_ALEN + 2] __long_aligned =
111
+
MULTICAST_LACPDU_ADDR;
109
112
110
113
/* ================= main 802.3ad protocol functions ================== */
111
114
static int ad_lacpdu_send(struct port *port);
···
1742
1739
aggregator->is_individual = false;
1743
1740
aggregator->actor_admin_aggregator_key = 0;
1744
1741
aggregator->actor_oper_aggregator_key = 0;
1745
-
aggregator->partner_system = null_mac_addr;
1742
+
eth_zero_addr(aggregator->partner_system.mac_addr_value);
1746
1743
aggregator->partner_system_priority = 0;
1747
1744
aggregator->partner_oper_aggregator_key = 0;
1748
1745
aggregator->receive_state = 0;
···
1764
1761
if (aggregator) {
1765
1762
ad_clear_agg(aggregator);
1766
1763
1767
-
aggregator->aggregator_mac_address = null_mac_addr;
1764
+
eth_zero_addr(aggregator->aggregator_mac_address.mac_addr_value);
1768
1765
aggregator->aggregator_identifier = 0;
1769
1766
aggregator->slave = NULL;
1770
1767
}
+2
-5
drivers/net/bonding/bond_alb.c
+2
-5
drivers/net/bonding/bond_alb.c
···
42
42
43
43
44
44
45
-
#ifndef __long_aligned
46
-
#define __long_aligned __attribute__((aligned((sizeof(long)))))
47
-
#endif
48
-
static const u8 mac_bcast[ETH_ALEN] __long_aligned = {
45
+
static const u8 mac_bcast[ETH_ALEN + 2] __long_aligned = {
49
46
0xff, 0xff, 0xff, 0xff, 0xff, 0xff
50
47
};
51
-
static const u8 mac_v6_allmcast[ETH_ALEN] __long_aligned = {
48
+
static const u8 mac_v6_allmcast[ETH_ALEN + 2] __long_aligned = {
52
49
0x33, 0x33, 0x00, 0x00, 0x00, 0x01
53
50
};
54
51
static const int alb_delta_in_ticks = HZ / ALB_TIMER_TICKS_PER_SEC;
+1
drivers/net/bonding/bond_main.c
+1
drivers/net/bonding/bond_main.c
+1
-1
drivers/net/ethernet/broadcom/bcmsysport.c
+1
-1
drivers/net/ethernet/broadcom/bcmsysport.c
+6
-6
drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h
+6
-6
drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h
···
36
36
#define __T4FW_VERSION_H__
37
37
38
38
#define T4FW_VERSION_MAJOR 0x01
39
-
#define T4FW_VERSION_MINOR 0x0E
40
-
#define T4FW_VERSION_MICRO 0x04
39
+
#define T4FW_VERSION_MINOR 0x0F
40
+
#define T4FW_VERSION_MICRO 0x25
41
41
#define T4FW_VERSION_BUILD 0x00
42
42
43
43
#define T4FW_MIN_VERSION_MAJOR 0x01
···
45
45
#define T4FW_MIN_VERSION_MICRO 0x00
46
46
47
47
#define T5FW_VERSION_MAJOR 0x01
48
-
#define T5FW_VERSION_MINOR 0x0E
49
-
#define T5FW_VERSION_MICRO 0x04
48
+
#define T5FW_VERSION_MINOR 0x0F
49
+
#define T5FW_VERSION_MICRO 0x25
50
50
#define T5FW_VERSION_BUILD 0x00
51
51
52
52
#define T5FW_MIN_VERSION_MAJOR 0x00
···
54
54
#define T5FW_MIN_VERSION_MICRO 0x00
55
55
56
56
#define T6FW_VERSION_MAJOR 0x01
57
-
#define T6FW_VERSION_MINOR 0x0E
58
-
#define T6FW_VERSION_MICRO 0x04
57
+
#define T6FW_VERSION_MINOR 0x0F
58
+
#define T6FW_VERSION_MICRO 0x25
59
59
#define T6FW_VERSION_BUILD 0x00
60
60
61
61
#define T6FW_MIN_VERSION_MAJOR 0x00
+9
-12
drivers/net/ethernet/intel/e1000e/netdev.c
+9
-12
drivers/net/ethernet/intel/e1000e/netdev.c
···
154
154
writel(val, hw->hw_addr + reg);
155
155
}
156
156
157
-
static bool e1000e_vlan_used(struct e1000_adapter *adapter)
158
-
{
159
-
u16 vid;
160
-
161
-
for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
162
-
return true;
163
-
164
-
return false;
165
-
}
166
-
167
157
/**
168
158
* e1000_regdump - register printout routine
169
159
* @hw: pointer to the HW structure
···
3443
3453
3444
3454
ew32(RCTL, rctl);
3445
3455
3446
-
if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX ||
3447
-
e1000e_vlan_used(adapter))
3456
+
if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3448
3457
e1000e_vlan_strip_enable(adapter);
3449
3458
else
3450
3459
e1000e_vlan_strip_disable(adapter);
···
6914
6925
/* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6915
6926
if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6916
6927
features &= ~NETIF_F_RXFCS;
6928
+
6929
+
/* Since there is no support for separate Rx/Tx vlan accel
6930
+
* enable/disable make sure Tx flag is always in same state as Rx.
6931
+
*/
6932
+
if (features & NETIF_F_HW_VLAN_CTAG_RX)
6933
+
features |= NETIF_F_HW_VLAN_CTAG_TX;
6934
+
else
6935
+
features &= ~NETIF_F_HW_VLAN_CTAG_TX;
6917
6936
6918
6937
return features;
6919
6938
}
+2
-2
drivers/net/ethernet/intel/ixgbevf/mbx.c
+2
-2
drivers/net/ethernet/intel/ixgbevf/mbx.c
···
85
85
static s32 ixgbevf_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size)
86
86
{
87
87
struct ixgbe_mbx_info *mbx = &hw->mbx;
88
-
s32 ret_val = -IXGBE_ERR_MBX;
88
+
s32 ret_val = IXGBE_ERR_MBX;
89
89
90
90
if (!mbx->ops.read)
91
91
goto out;
···
111
111
static s32 ixgbevf_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size)
112
112
{
113
113
struct ixgbe_mbx_info *mbx = &hw->mbx;
114
-
s32 ret_val = -IXGBE_ERR_MBX;
114
+
s32 ret_val = IXGBE_ERR_MBX;
115
115
116
116
/* exit if either we can't write or there isn't a defined timeout */
117
117
if (!mbx->ops.write || !mbx->timeout)
+2
drivers/net/ethernet/marvell/mvneta.c
+2
drivers/net/ethernet/marvell/mvneta.c
+71
-56
drivers/net/ethernet/mellanox/mlx5/core/cmd.c
+71
-56
drivers/net/ethernet/mellanox/mlx5/core/cmd.c
···
295
295
case MLX5_CMD_OP_DESTROY_FLOW_GROUP:
296
296
case MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY:
297
297
case MLX5_CMD_OP_DEALLOC_FLOW_COUNTER:
298
+
case MLX5_CMD_OP_2ERR_QP:
299
+
case MLX5_CMD_OP_2RST_QP:
300
+
case MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT:
301
+
case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
302
+
case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
303
+
case MLX5_CMD_OP_SET_FLOW_TABLE_ROOT:
298
304
return MLX5_CMD_STAT_OK;
299
305
300
306
case MLX5_CMD_OP_QUERY_HCA_CAP:
···
327
321
case MLX5_CMD_OP_RTR2RTS_QP:
328
322
case MLX5_CMD_OP_RTS2RTS_QP:
329
323
case MLX5_CMD_OP_SQERR2RTS_QP:
330
-
case MLX5_CMD_OP_2ERR_QP:
331
-
case MLX5_CMD_OP_2RST_QP:
332
324
case MLX5_CMD_OP_QUERY_QP:
333
325
case MLX5_CMD_OP_SQD_RTS_QP:
334
326
case MLX5_CMD_OP_INIT2INIT_QP:
···
346
342
case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
347
343
case MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT:
348
344
case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
349
-
case MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT:
350
345
case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
351
346
case MLX5_CMD_OP_SET_ROCE_ADDRESS:
352
347
case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
···
393
390
case MLX5_CMD_OP_CREATE_RQT:
394
391
case MLX5_CMD_OP_MODIFY_RQT:
395
392
case MLX5_CMD_OP_QUERY_RQT:
393
+
396
394
case MLX5_CMD_OP_CREATE_FLOW_TABLE:
397
395
case MLX5_CMD_OP_QUERY_FLOW_TABLE:
398
396
case MLX5_CMD_OP_CREATE_FLOW_GROUP:
399
397
case MLX5_CMD_OP_QUERY_FLOW_GROUP:
400
-
case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
398
+
401
399
case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
402
400
case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
403
401
case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
···
606
602
pr_debug("\n");
607
603
}
608
604
605
+
static u16 msg_to_opcode(struct mlx5_cmd_msg *in)
606
+
{
607
+
struct mlx5_inbox_hdr *hdr = (struct mlx5_inbox_hdr *)(in->first.data);
608
+
609
+
return be16_to_cpu(hdr->opcode);
610
+
}
611
+
612
+
static void cb_timeout_handler(struct work_struct *work)
613
+
{
614
+
struct delayed_work *dwork = container_of(work, struct delayed_work,
615
+
work);
616
+
struct mlx5_cmd_work_ent *ent = container_of(dwork,
617
+
struct mlx5_cmd_work_ent,
618
+
cb_timeout_work);
619
+
struct mlx5_core_dev *dev = container_of(ent->cmd, struct mlx5_core_dev,
620
+
cmd);
621
+
622
+
ent->ret = -ETIMEDOUT;
623
+
mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
624
+
mlx5_command_str(msg_to_opcode(ent->in)),
625
+
msg_to_opcode(ent->in));
626
+
mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
627
+
}
628
+
609
629
static void cmd_work_handler(struct work_struct *work)
610
630
{
611
631
struct mlx5_cmd_work_ent *ent = container_of(work, struct mlx5_cmd_work_ent, work);
612
632
struct mlx5_cmd *cmd = ent->cmd;
613
633
struct mlx5_core_dev *dev = container_of(cmd, struct mlx5_core_dev, cmd);
634
+
unsigned long cb_timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
614
635
struct mlx5_cmd_layout *lay;
615
636
struct semaphore *sem;
616
637
unsigned long flags;
···
675
646
set_signature(ent, !cmd->checksum_disabled);
676
647
dump_command(dev, ent, 1);
677
648
ent->ts1 = ktime_get_ns();
649
+
650
+
if (ent->callback)
651
+
schedule_delayed_work(&ent->cb_timeout_work, cb_timeout);
678
652
679
653
/* ring doorbell after the descriptor is valid */
680
654
mlx5_core_dbg(dev, "writing 0x%x to command doorbell\n", 1 << ent->idx);
···
723
691
}
724
692
}
725
693
726
-
static u16 msg_to_opcode(struct mlx5_cmd_msg *in)
727
-
{
728
-
struct mlx5_inbox_hdr *hdr = (struct mlx5_inbox_hdr *)(in->first.data);
729
-
730
-
return be16_to_cpu(hdr->opcode);
731
-
}
732
-
733
694
static int wait_func(struct mlx5_core_dev *dev, struct mlx5_cmd_work_ent *ent)
734
695
{
735
696
unsigned long timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
···
731
706
732
707
if (cmd->mode == CMD_MODE_POLLING) {
733
708
wait_for_completion(&ent->done);
734
-
err = ent->ret;
735
-
} else {
736
-
if (!wait_for_completion_timeout(&ent->done, timeout))
737
-
err = -ETIMEDOUT;
738
-
else
739
-
err = 0;
709
+
} else if (!wait_for_completion_timeout(&ent->done, timeout)) {
710
+
ent->ret = -ETIMEDOUT;
711
+
mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
740
712
}
713
+
714
+
err = ent->ret;
715
+
741
716
if (err == -ETIMEDOUT) {
742
717
mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
743
718
mlx5_command_str(msg_to_opcode(ent->in)),
···
786
761
if (!callback)
787
762
init_completion(&ent->done);
788
763
764
+
INIT_DELAYED_WORK(&ent->cb_timeout_work, cb_timeout_handler);
789
765
INIT_WORK(&ent->work, cmd_work_handler);
790
766
if (page_queue) {
791
767
cmd_work_handler(&ent->work);
···
796
770
goto out_free;
797
771
}
798
772
799
-
if (!callback) {
800
-
err = wait_func(dev, ent);
801
-
if (err == -ETIMEDOUT)
802
-
goto out;
773
+
if (callback)
774
+
goto out;
803
775
804
-
ds = ent->ts2 - ent->ts1;
805
-
op = be16_to_cpu(((struct mlx5_inbox_hdr *)in->first.data)->opcode);
806
-
if (op < ARRAY_SIZE(cmd->stats)) {
807
-
stats = &cmd->stats[op];
808
-
spin_lock_irq(&stats->lock);
809
-
stats->sum += ds;
810
-
++stats->n;
811
-
spin_unlock_irq(&stats->lock);
812
-
}
813
-
mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_TIME,
814
-
"fw exec time for %s is %lld nsec\n",
815
-
mlx5_command_str(op), ds);
816
-
*status = ent->status;
817
-
free_cmd(ent);
776
+
err = wait_func(dev, ent);
777
+
if (err == -ETIMEDOUT)
778
+
goto out_free;
779
+
780
+
ds = ent->ts2 - ent->ts1;
781
+
op = be16_to_cpu(((struct mlx5_inbox_hdr *)in->first.data)->opcode);
782
+
if (op < ARRAY_SIZE(cmd->stats)) {
783
+
stats = &cmd->stats[op];
784
+
spin_lock_irq(&stats->lock);
785
+
stats->sum += ds;
786
+
++stats->n;
787
+
spin_unlock_irq(&stats->lock);
818
788
}
819
-
820
-
return err;
789
+
mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_TIME,
790
+
"fw exec time for %s is %lld nsec\n",
791
+
mlx5_command_str(op), ds);
792
+
*status = ent->status;
821
793
822
794
out_free:
823
795
free_cmd(ent);
···
1205
1181
return err;
1206
1182
}
1207
1183
1208
-
void mlx5_cmd_use_events(struct mlx5_core_dev *dev)
1184
+
static void mlx5_cmd_change_mod(struct mlx5_core_dev *dev, int mode)
1209
1185
{
1210
1186
struct mlx5_cmd *cmd = &dev->cmd;
1211
1187
int i;
1212
1188
1213
1189
for (i = 0; i < cmd->max_reg_cmds; i++)
1214
1190
down(&cmd->sem);
1215
-
1216
1191
down(&cmd->pages_sem);
1217
1192
1218
-
flush_workqueue(cmd->wq);
1219
-
1220
-
cmd->mode = CMD_MODE_EVENTS;
1193
+
cmd->mode = mode;
1221
1194
1222
1195
up(&cmd->pages_sem);
1223
1196
for (i = 0; i < cmd->max_reg_cmds; i++)
1224
1197
up(&cmd->sem);
1225
1198
}
1226
1199
1200
+
void mlx5_cmd_use_events(struct mlx5_core_dev *dev)
1201
+
{
1202
+
mlx5_cmd_change_mod(dev, CMD_MODE_EVENTS);
1203
+
}
1204
+
1227
1205
void mlx5_cmd_use_polling(struct mlx5_core_dev *dev)
1228
1206
{
1229
-
struct mlx5_cmd *cmd = &dev->cmd;
1230
-
int i;
1231
-
1232
-
for (i = 0; i < cmd->max_reg_cmds; i++)
1233
-
down(&cmd->sem);
1234
-
1235
-
down(&cmd->pages_sem);
1236
-
1237
-
flush_workqueue(cmd->wq);
1238
-
cmd->mode = CMD_MODE_POLLING;
1239
-
1240
-
up(&cmd->pages_sem);
1241
-
for (i = 0; i < cmd->max_reg_cmds; i++)
1242
-
up(&cmd->sem);
1207
+
mlx5_cmd_change_mod(dev, CMD_MODE_POLLING);
1243
1208
}
1244
1209
1245
1210
static void free_msg(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *msg)
···
1264
1251
struct semaphore *sem;
1265
1252
1266
1253
ent = cmd->ent_arr[i];
1254
+
if (ent->callback)
1255
+
cancel_delayed_work(&ent->cb_timeout_work);
1267
1256
if (ent->page_queue)
1268
1257
sem = &cmd->pages_sem;
1269
1258
else
+10
-1
drivers/net/ethernet/mellanox/mlx5/core/en.h
+10
-1
drivers/net/ethernet/mellanox/mlx5/core/en.h
···
145
145
146
146
#ifdef CONFIG_MLX5_CORE_EN_DCB
147
147
#define MLX5E_MAX_BW_ALLOC 100 /* Max percentage of BW allocation */
148
-
#define MLX5E_MIN_BW_ALLOC 1 /* Min percentage of BW allocation */
149
148
#endif
150
149
151
150
struct mlx5e_params {
···
190
191
enum {
191
192
MLX5E_RQ_STATE_POST_WQES_ENABLE,
192
193
MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS,
194
+
MLX5E_RQ_STATE_FLUSH_TIMEOUT,
193
195
};
194
196
195
197
struct mlx5e_cq {
···
220
220
typedef int (*mlx5e_fp_alloc_wqe)(struct mlx5e_rq *rq, struct mlx5e_rx_wqe *wqe,
221
221
u16 ix);
222
222
223
+
typedef void (*mlx5e_fp_dealloc_wqe)(struct mlx5e_rq *rq, u16 ix);
224
+
223
225
struct mlx5e_dma_info {
224
226
struct page *page;
225
227
dma_addr_t addr;
···
243
241
struct mlx5e_cq cq;
244
242
mlx5e_fp_handle_rx_cqe handle_rx_cqe;
245
243
mlx5e_fp_alloc_wqe alloc_wqe;
244
+
mlx5e_fp_dealloc_wqe dealloc_wqe;
246
245
247
246
unsigned long state;
248
247
int ix;
···
308
305
enum {
309
306
MLX5E_SQ_STATE_WAKE_TXQ_ENABLE,
310
307
MLX5E_SQ_STATE_BF_ENABLE,
308
+
MLX5E_SQ_STATE_TX_TIMEOUT,
311
309
};
312
310
313
311
struct mlx5e_ico_wqe_info {
···
542
538
struct workqueue_struct *wq;
543
539
struct work_struct update_carrier_work;
544
540
struct work_struct set_rx_mode_work;
541
+
struct work_struct tx_timeout_work;
545
542
struct delayed_work update_stats_work;
546
543
547
544
struct mlx5_core_dev *mdev;
···
594
589
int mlx5e_napi_poll(struct napi_struct *napi, int budget);
595
590
bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget);
596
591
int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget);
592
+
void mlx5e_free_tx_descs(struct mlx5e_sq *sq);
593
+
void mlx5e_free_rx_descs(struct mlx5e_rq *rq);
597
594
598
595
void mlx5e_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe);
599
596
void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe);
600
597
bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq);
601
598
int mlx5e_alloc_rx_wqe(struct mlx5e_rq *rq, struct mlx5e_rx_wqe *wqe, u16 ix);
602
599
int mlx5e_alloc_rx_mpwqe(struct mlx5e_rq *rq, struct mlx5e_rx_wqe *wqe, u16 ix);
600
+
void mlx5e_dealloc_rx_wqe(struct mlx5e_rq *rq, u16 ix);
601
+
void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix);
603
602
void mlx5e_post_rx_fragmented_mpwqe(struct mlx5e_rq *rq);
604
603
void mlx5e_complete_rx_linear_mpwqe(struct mlx5e_rq *rq,
605
604
struct mlx5_cqe64 *cqe,
+6
-2
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
+6
-2
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c
···
96
96
tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
97
97
break;
98
98
case IEEE_8021QAZ_TSA_ETS:
99
-
tc_tx_bw[i] = ets->tc_tx_bw[i] ?: MLX5E_MIN_BW_ALLOC;
99
+
tc_tx_bw[i] = ets->tc_tx_bw[i];
100
100
break;
101
101
}
102
102
}
···
140
140
141
141
/* Validate Bandwidth Sum */
142
142
for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
143
-
if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS)
143
+
if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS) {
144
+
if (!ets->tc_tx_bw[i])
145
+
return -EINVAL;
146
+
144
147
bw_sum += ets->tc_tx_bw[i];
148
+
}
145
149
}
146
150
147
151
if (bw_sum != 0 && bw_sum != 100)
+90
-9
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+90
-9
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
···
39
39
#include "eswitch.h"
40
40
#include "vxlan.h"
41
41
42
+
enum {
43
+
MLX5_EN_QP_FLUSH_TIMEOUT_MS = 5000,
44
+
MLX5_EN_QP_FLUSH_MSLEEP_QUANT = 20,
45
+
MLX5_EN_QP_FLUSH_MAX_ITER = MLX5_EN_QP_FLUSH_TIMEOUT_MS /
46
+
MLX5_EN_QP_FLUSH_MSLEEP_QUANT,
47
+
};
48
+
42
49
struct mlx5e_rq_param {
43
50
u32 rqc[MLX5_ST_SZ_DW(rqc)];
44
51
struct mlx5_wq_param wq;
···
81
74
port_state = mlx5_query_vport_state(mdev,
82
75
MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT, 0);
83
76
84
-
if (port_state == VPORT_STATE_UP)
77
+
if (port_state == VPORT_STATE_UP) {
78
+
netdev_info(priv->netdev, "Link up\n");
85
79
netif_carrier_on(priv->netdev);
86
-
else
80
+
} else {
81
+
netdev_info(priv->netdev, "Link down\n");
87
82
netif_carrier_off(priv->netdev);
83
+
}
88
84
}
89
85
90
86
static void mlx5e_update_carrier_work(struct work_struct *work)
···
99
89
if (test_bit(MLX5E_STATE_OPENED, &priv->state))
100
90
mlx5e_update_carrier(priv);
101
91
mutex_unlock(&priv->state_lock);
92
+
}
93
+
94
+
static void mlx5e_tx_timeout_work(struct work_struct *work)
95
+
{
96
+
struct mlx5e_priv *priv = container_of(work, struct mlx5e_priv,
97
+
tx_timeout_work);
98
+
int err;
99
+
100
+
rtnl_lock();
101
+
mutex_lock(&priv->state_lock);
102
+
if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
103
+
goto unlock;
104
+
mlx5e_close_locked(priv->netdev);
105
+
err = mlx5e_open_locked(priv->netdev);
106
+
if (err)
107
+
netdev_err(priv->netdev, "mlx5e_open_locked failed recovering from a tx_timeout, err(%d).\n",
108
+
err);
109
+
unlock:
110
+
mutex_unlock(&priv->state_lock);
111
+
rtnl_unlock();
102
112
}
103
113
104
114
static void mlx5e_update_sw_counters(struct mlx5e_priv *priv)
···
335
305
}
336
306
rq->handle_rx_cqe = mlx5e_handle_rx_cqe_mpwrq;
337
307
rq->alloc_wqe = mlx5e_alloc_rx_mpwqe;
308
+
rq->dealloc_wqe = mlx5e_dealloc_rx_mpwqe;
338
309
339
310
rq->mpwqe_stride_sz = BIT(priv->params.mpwqe_log_stride_sz);
340
311
rq->mpwqe_num_strides = BIT(priv->params.mpwqe_log_num_strides);
···
351
320
}
352
321
rq->handle_rx_cqe = mlx5e_handle_rx_cqe;
353
322
rq->alloc_wqe = mlx5e_alloc_rx_wqe;
323
+
rq->dealloc_wqe = mlx5e_dealloc_rx_wqe;
354
324
355
325
rq->wqe_sz = (priv->params.lro_en) ?
356
326
priv->params.lro_wqe_sz :
···
557
525
558
526
static void mlx5e_close_rq(struct mlx5e_rq *rq)
559
527
{
528
+
int tout = 0;
529
+
int err;
530
+
560
531
clear_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state);
561
532
napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */
562
533
563
-
mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RDY, MLX5_RQC_STATE_ERR);
564
-
while (!mlx5_wq_ll_is_empty(&rq->wq))
565
-
msleep(20);
534
+
err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RDY, MLX5_RQC_STATE_ERR);
535
+
while (!mlx5_wq_ll_is_empty(&rq->wq) && !err &&
536
+
tout++ < MLX5_EN_QP_FLUSH_MAX_ITER)
537
+
msleep(MLX5_EN_QP_FLUSH_MSLEEP_QUANT);
538
+
539
+
if (err || tout == MLX5_EN_QP_FLUSH_MAX_ITER)
540
+
set_bit(MLX5E_RQ_STATE_FLUSH_TIMEOUT, &rq->state);
566
541
567
542
/* avoid destroying rq before mlx5e_poll_rx_cq() is done with it */
568
543
napi_synchronize(&rq->channel->napi);
569
544
570
545
mlx5e_disable_rq(rq);
546
+
mlx5e_free_rx_descs(rq);
571
547
mlx5e_destroy_rq(rq);
572
548
}
573
549
···
822
782
823
783
static void mlx5e_close_sq(struct mlx5e_sq *sq)
824
784
{
785
+
int tout = 0;
786
+
int err;
787
+
825
788
if (sq->txq) {
826
789
clear_bit(MLX5E_SQ_STATE_WAKE_TXQ_ENABLE, &sq->state);
827
790
/* prevent netif_tx_wake_queue */
···
835
792
if (mlx5e_sq_has_room_for(sq, 1))
836
793
mlx5e_send_nop(sq, true);
837
794
838
-
mlx5e_modify_sq(sq, MLX5_SQC_STATE_RDY, MLX5_SQC_STATE_ERR);
795
+
err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RDY,
796
+
MLX5_SQC_STATE_ERR);
797
+
if (err)
798
+
set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state);
839
799
}
840
800
841
-
while (sq->cc != sq->pc) /* wait till sq is empty */
842
-
msleep(20);
801
+
/* wait till sq is empty, unless a TX timeout occurred on this SQ */
802
+
while (sq->cc != sq->pc &&
803
+
!test_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state)) {
804
+
msleep(MLX5_EN_QP_FLUSH_MSLEEP_QUANT);
805
+
if (tout++ > MLX5_EN_QP_FLUSH_MAX_ITER)
806
+
set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state);
807
+
}
843
808
844
809
/* avoid destroying sq before mlx5e_poll_tx_cq() is done with it */
845
810
napi_synchronize(&sq->channel->napi);
846
811
812
+
mlx5e_free_tx_descs(sq);
847
813
mlx5e_disable_sq(sq);
848
814
mlx5e_destroy_sq(sq);
849
815
}
···
1710
1658
1711
1659
netdev_set_num_tc(netdev, ntc);
1712
1660
1661
+
/* Map netdev TCs to offset 0
1662
+
* We have our own UP to TXQ mapping for QoS
1663
+
*/
1713
1664
for (tc = 0; tc < ntc; tc++)
1714
-
netdev_set_tc_queue(netdev, tc, nch, tc * nch);
1665
+
netdev_set_tc_queue(netdev, tc, nch, 0);
1715
1666
}
1716
1667
1717
1668
int mlx5e_open_locked(struct net_device *netdev)
···
2645
2590
return features;
2646
2591
}
2647
2592
2593
+
static void mlx5e_tx_timeout(struct net_device *dev)
2594
+
{
2595
+
struct mlx5e_priv *priv = netdev_priv(dev);
2596
+
bool sched_work = false;
2597
+
int i;
2598
+
2599
+
netdev_err(dev, "TX timeout detected\n");
2600
+
2601
+
for (i = 0; i < priv->params.num_channels * priv->params.num_tc; i++) {
2602
+
struct mlx5e_sq *sq = priv->txq_to_sq_map[i];
2603
+
2604
+
if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
2605
+
continue;
2606
+
sched_work = true;
2607
+
set_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state);
2608
+
netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n",
2609
+
i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc);
2610
+
}
2611
+
2612
+
if (sched_work && test_bit(MLX5E_STATE_OPENED, &priv->state))
2613
+
schedule_work(&priv->tx_timeout_work);
2614
+
}
2615
+
2648
2616
static const struct net_device_ops mlx5e_netdev_ops_basic = {
2649
2617
.ndo_open = mlx5e_open,
2650
2618
.ndo_stop = mlx5e_close,
···
2685
2607
#ifdef CONFIG_RFS_ACCEL
2686
2608
.ndo_rx_flow_steer = mlx5e_rx_flow_steer,
2687
2609
#endif
2610
+
.ndo_tx_timeout = mlx5e_tx_timeout,
2688
2611
};
2689
2612
2690
2613
static const struct net_device_ops mlx5e_netdev_ops_sriov = {
···
2715
2636
.ndo_get_vf_config = mlx5e_get_vf_config,
2716
2637
.ndo_set_vf_link_state = mlx5e_set_vf_link_state,
2717
2638
.ndo_get_vf_stats = mlx5e_get_vf_stats,
2639
+
.ndo_tx_timeout = mlx5e_tx_timeout,
2718
2640
};
2719
2641
2720
2642
static int mlx5e_check_required_hca_cap(struct mlx5_core_dev *mdev)
···
2918
2838
2919
2839
INIT_WORK(&priv->update_carrier_work, mlx5e_update_carrier_work);
2920
2840
INIT_WORK(&priv->set_rx_mode_work, mlx5e_set_rx_mode_work);
2841
+
INIT_WORK(&priv->tx_timeout_work, mlx5e_tx_timeout_work);
2921
2842
INIT_DELAYED_WORK(&priv->update_stats_work, mlx5e_update_stats_work);
2922
2843
}
2923
2844
+41
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
+41
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
···
212
212
return -ENOMEM;
213
213
}
214
214
215
+
void mlx5e_dealloc_rx_wqe(struct mlx5e_rq *rq, u16 ix)
216
+
{
217
+
struct sk_buff *skb = rq->skb[ix];
218
+
219
+
if (skb) {
220
+
rq->skb[ix] = NULL;
221
+
dma_unmap_single(rq->pdev,
222
+
*((dma_addr_t *)skb->cb),
223
+
rq->wqe_sz,
224
+
DMA_FROM_DEVICE);
225
+
dev_kfree_skb(skb);
226
+
}
227
+
}
228
+
215
229
static inline int mlx5e_mpwqe_strides_per_page(struct mlx5e_rq *rq)
216
230
{
217
231
return rq->mpwqe_num_strides >> MLX5_MPWRQ_WQE_PAGE_ORDER;
···
588
574
return 0;
589
575
}
590
576
577
+
void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)
578
+
{
579
+
struct mlx5e_mpw_info *wi = &rq->wqe_info[ix];
580
+
581
+
wi->free_wqe(rq, wi);
582
+
}
583
+
584
+
void mlx5e_free_rx_descs(struct mlx5e_rq *rq)
585
+
{
586
+
struct mlx5_wq_ll *wq = &rq->wq;
587
+
struct mlx5e_rx_wqe *wqe;
588
+
__be16 wqe_ix_be;
589
+
u16 wqe_ix;
590
+
591
+
while (!mlx5_wq_ll_is_empty(wq)) {
592
+
wqe_ix_be = *wq->tail_next;
593
+
wqe_ix = be16_to_cpu(wqe_ix_be);
594
+
wqe = mlx5_wq_ll_get_wqe(&rq->wq, wqe_ix);
595
+
rq->dealloc_wqe(rq, wqe_ix);
596
+
mlx5_wq_ll_pop(&rq->wq, wqe_ix_be,
597
+
&wqe->next.next_wqe_index);
598
+
}
599
+
}
600
+
591
601
#define RQ_CANNOT_POST(rq) \
592
602
(!test_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state) || \
593
603
test_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state))
···
915
877
{
916
878
struct mlx5e_rq *rq = container_of(cq, struct mlx5e_rq, cq);
917
879
int work_done = 0;
880
+
881
+
if (unlikely(test_bit(MLX5E_RQ_STATE_FLUSH_TIMEOUT, &rq->state)))
882
+
return 0;
918
883
919
884
if (cq->decmprs_left)
920
885
work_done += mlx5e_decompress_cqes_cont(rq, cq, 0, budget);
+48
-4
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
+48
-4
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
···
110
110
{
111
111
struct mlx5e_priv *priv = netdev_priv(dev);
112
112
int channel_ix = fallback(dev, skb);
113
-
int up = (netdev_get_num_tc(dev) && skb_vlan_tag_present(skb)) ?
114
-
skb->vlan_tci >> VLAN_PRIO_SHIFT : 0;
113
+
int up = 0;
114
+
115
+
if (!netdev_get_num_tc(dev))
116
+
return channel_ix;
117
+
118
+
if (skb_vlan_tag_present(skb))
119
+
up = skb->vlan_tci >> VLAN_PRIO_SHIFT;
120
+
121
+
/* channel_ix can be larger than num_channels since
122
+
* dev->num_real_tx_queues = num_channels * num_tc
123
+
*/
124
+
if (channel_ix >= priv->params.num_channels)
125
+
channel_ix = reciprocal_scale(channel_ix,
126
+
priv->params.num_channels);
115
127
116
128
return priv->channeltc_to_txq_map[channel_ix][up];
117
129
}
···
135
123
* headers and occur before the data gather.
136
124
* Therefore these headers must be copied into the WQE
137
125
*/
138
-
#define MLX5E_MIN_INLINE ETH_HLEN
126
+
#define MLX5E_MIN_INLINE (ETH_HLEN + VLAN_HLEN)
139
127
140
128
if (bf) {
141
129
u16 ihs = skb_headlen(skb);
···
147
135
return skb_headlen(skb);
148
136
}
149
137
150
-
return MLX5E_MIN_INLINE;
138
+
return max(skb_network_offset(skb), MLX5E_MIN_INLINE);
151
139
}
152
140
153
141
static inline void mlx5e_tx_skb_pull_inline(unsigned char **skb_data,
···
353
341
return mlx5e_sq_xmit(sq, skb);
354
342
}
355
343
344
+
void mlx5e_free_tx_descs(struct mlx5e_sq *sq)
345
+
{
346
+
struct mlx5e_tx_wqe_info *wi;
347
+
struct sk_buff *skb;
348
+
u16 ci;
349
+
int i;
350
+
351
+
while (sq->cc != sq->pc) {
352
+
ci = sq->cc & sq->wq.sz_m1;
353
+
skb = sq->skb[ci];
354
+
wi = &sq->wqe_info[ci];
355
+
356
+
if (!skb) { /* nop */
357
+
sq->cc++;
358
+
continue;
359
+
}
360
+
361
+
for (i = 0; i < wi->num_dma; i++) {
362
+
struct mlx5e_sq_dma *dma =
363
+
mlx5e_dma_get(sq, sq->dma_fifo_cc++);
364
+
365
+
mlx5e_tx_dma_unmap(sq->pdev, dma);
366
+
}
367
+
368
+
dev_kfree_skb_any(skb);
369
+
sq->cc += wi->num_wqebbs;
370
+
}
371
+
}
372
+
356
373
bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget)
357
374
{
358
375
struct mlx5e_sq *sq;
···
392
351
int i;
393
352
394
353
sq = container_of(cq, struct mlx5e_sq, cq);
354
+
355
+
if (unlikely(test_bit(MLX5E_SQ_STATE_TX_TIMEOUT, &sq->state)))
356
+
return false;
395
357
396
358
npkts = 0;
397
359
nbytes = 0;
+8
-3
drivers/net/ethernet/mellanox/mlx5/core/health.c
+8
-3
drivers/net/ethernet/mellanox/mlx5/core/health.c
···
108
108
109
109
void mlx5_enter_error_state(struct mlx5_core_dev *dev)
110
110
{
111
+
mutex_lock(&dev->intf_state_mutex);
111
112
if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
112
-
return;
113
+
goto unlock;
113
114
114
115
mlx5_core_err(dev, "start\n");
115
-
if (pci_channel_offline(dev->pdev) || in_fatal(dev))
116
+
if (pci_channel_offline(dev->pdev) || in_fatal(dev)) {
116
117
dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
118
+
trigger_cmd_completions(dev);
119
+
}
117
120
118
121
mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 0);
119
122
mlx5_core_err(dev, "end\n");
123
+
124
+
unlock:
125
+
mutex_unlock(&dev->intf_state_mutex);
120
126
}
121
127
122
128
static void mlx5_handle_bad_state(struct mlx5_core_dev *dev)
···
251
245
u32 count;
252
246
253
247
if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
254
-
trigger_cmd_completions(dev);
255
248
mod_timer(&health->timer, get_next_poll_jiffies());
256
249
return;
257
250
}
+15
-26
drivers/net/ethernet/mellanox/mlx5/core/main.c
+15
-26
drivers/net/ethernet/mellanox/mlx5/core/main.c
···
1422
1422
mlx5_pci_err_detected(dev->pdev, 0);
1423
1423
}
1424
1424
1425
-
/* wait for the device to show vital signs. For now we check
1426
-
* that we can read the device ID and that the health buffer
1427
-
* shows a non zero value which is different than 0xffffffff
1425
+
/* wait for the device to show vital signs by waiting
1426
+
* for the health counter to start counting.
1428
1427
*/
1429
-
static void wait_vital(struct pci_dev *pdev)
1428
+
static int wait_vital(struct pci_dev *pdev)
1430
1429
{
1431
1430
struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
1432
1431
struct mlx5_core_health *health = &dev->priv.health;
1433
1432
const int niter = 100;
1433
+
u32 last_count = 0;
1434
1434
u32 count;
1435
-
u16 did;
1436
1435
int i;
1437
-
1438
-
/* Wait for firmware to be ready after reset */
1439
-
msleep(1000);
1440
-
for (i = 0; i < niter; i++) {
1441
-
if (pci_read_config_word(pdev, 2, &did)) {
1442
-
dev_warn(&pdev->dev, "failed reading config word\n");
1443
-
break;
1444
-
}
1445
-
if (did == pdev->device) {
1446
-
dev_info(&pdev->dev, "device ID correctly read after %d iterations\n", i);
1447
-
break;
1448
-
}
1449
-
msleep(50);
1450
-
}
1451
-
if (i == niter)
1452
-
dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__);
1453
1436
1454
1437
for (i = 0; i < niter; i++) {
1455
1438
count = ioread32be(health->health_counter);
1456
1439
if (count && count != 0xffffffff) {
1457
-
dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i);
1458
-
break;
1440
+
if (last_count && last_count != count) {
1441
+
dev_info(&pdev->dev, "Counter value 0x%x after %d iterations\n", count, i);
1442
+
return 0;
1443
+
}
1444
+
last_count = count;
1459
1445
}
1460
1446
msleep(50);
1461
1447
}
1462
1448
1463
-
if (i == niter)
1464
-
dev_warn(&pdev->dev, "%s-%d: could not read device ID\n", __func__, __LINE__);
1449
+
return -ETIMEDOUT;
1465
1450
}
1466
1451
1467
1452
static void mlx5_pci_resume(struct pci_dev *pdev)
···
1458
1473
dev_info(&pdev->dev, "%s was called\n", __func__);
1459
1474
1460
1475
pci_save_state(pdev);
1461
-
wait_vital(pdev);
1476
+
err = wait_vital(pdev);
1477
+
if (err) {
1478
+
dev_err(&pdev->dev, "%s: wait_vital timed out\n", __func__);
1479
+
return;
1480
+
}
1462
1481
1463
1482
err = mlx5_load_one(dev, priv);
1464
1483
if (err)
+44
-19
drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c
+44
-19
drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c
···
345
345
func_id, npages, err);
346
346
goto out_4k;
347
347
}
348
-
dev->priv.fw_pages += npages;
349
348
350
349
err = mlx5_cmd_status_to_err(&out.hdr);
351
350
if (err) {
···
372
373
return err;
373
374
}
374
375
376
+
static int reclaim_pages_cmd(struct mlx5_core_dev *dev,
377
+
struct mlx5_manage_pages_inbox *in, int in_size,
378
+
struct mlx5_manage_pages_outbox *out, int out_size)
379
+
{
380
+
struct fw_page *fwp;
381
+
struct rb_node *p;
382
+
u32 npages;
383
+
u32 i = 0;
384
+
385
+
if (dev->state != MLX5_DEVICE_STATE_INTERNAL_ERROR)
386
+
return mlx5_cmd_exec_check_status(dev, (u32 *)in, in_size,
387
+
(u32 *)out, out_size);
388
+
389
+
npages = be32_to_cpu(in->num_entries);
390
+
391
+
p = rb_first(&dev->priv.page_root);
392
+
while (p && i < npages) {
393
+
fwp = rb_entry(p, struct fw_page, rb_node);
394
+
out->pas[i] = cpu_to_be64(fwp->addr);
395
+
p = rb_next(p);
396
+
i++;
397
+
}
398
+
399
+
out->num_entries = cpu_to_be32(i);
400
+
return 0;
401
+
}
402
+
375
403
static int reclaim_pages(struct mlx5_core_dev *dev, u32 func_id, int npages,
376
404
int *nclaimed)
377
405
{
···
424
398
in.func_id = cpu_to_be16(func_id);
425
399
in.num_entries = cpu_to_be32(npages);
426
400
mlx5_core_dbg(dev, "npages %d, outlen %d\n", npages, outlen);
427
-
err = mlx5_cmd_exec(dev, &in, sizeof(in), out, outlen);
401
+
err = reclaim_pages_cmd(dev, &in, sizeof(in), out, outlen);
428
402
if (err) {
429
-
mlx5_core_err(dev, "failed reclaiming pages\n");
430
-
goto out_free;
431
-
}
432
-
dev->priv.fw_pages -= npages;
433
-
434
-
if (out->hdr.status) {
435
-
err = mlx5_cmd_status_to_err(&out->hdr);
403
+
mlx5_core_err(dev, "failed reclaiming pages: err %d\n", err);
436
404
goto out_free;
437
405
}
438
406
···
437
417
err = -EINVAL;
438
418
goto out_free;
439
419
}
440
-
if (nclaimed)
441
-
*nclaimed = num_claimed;
442
420
443
421
for (i = 0; i < num_claimed; i++) {
444
422
addr = be64_to_cpu(out->pas[i]);
445
423
free_4k(dev, addr);
446
424
}
425
+
426
+
if (nclaimed)
427
+
*nclaimed = num_claimed;
428
+
447
429
dev->priv.fw_pages -= num_claimed;
448
430
if (func_id)
449
431
dev->priv.vfs_pages -= num_claimed;
···
536
514
p = rb_first(&dev->priv.page_root);
537
515
if (p) {
538
516
fwp = rb_entry(p, struct fw_page, rb_node);
539
-
if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
540
-
free_4k(dev, fwp->addr);
541
-
nclaimed = 1;
542
-
} else {
543
-
err = reclaim_pages(dev, fwp->func_id,
544
-
optimal_reclaimed_pages(),
545
-
&nclaimed);
546
-
}
517
+
err = reclaim_pages(dev, fwp->func_id,
518
+
optimal_reclaimed_pages(),
519
+
&nclaimed);
520
+
547
521
if (err) {
548
522
mlx5_core_warn(dev, "failed reclaiming pages (%d)\n",
549
523
err);
···
553
535
break;
554
536
}
555
537
} while (p);
538
+
539
+
WARN(dev->priv.fw_pages,
540
+
"FW pages counter is %d after reclaiming all pages\n",
541
+
dev->priv.fw_pages);
542
+
WARN(dev->priv.vfs_pages,
543
+
"VFs FW pages counter is %d after reclaiming all pages\n",
544
+
dev->priv.vfs_pages);
556
545
557
546
return 0;
558
547
}
-3
drivers/net/ethernet/mellanox/mlx5/core/vport.c
-3
drivers/net/ethernet/mellanox/mlx5/core/vport.c
···
513
513
{
514
514
int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
515
515
void *nic_vport_context;
516
-
u8 *guid;
517
516
void *in;
518
517
int err;
519
518
···
534
535
535
536
nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
536
537
in, nic_vport_context);
537
-
guid = MLX5_ADDR_OF(nic_vport_context, nic_vport_context,
538
-
node_guid);
539
538
MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
540
539
541
540
err = mlx5_modify_nic_vport_context(mdev, in, inlen);
+5
-2
drivers/net/ethernet/microchip/enc28j60.c
+5
-2
drivers/net/ethernet/microchip/enc28j60.c
···
1151
1151
enc28j60_phy_read(priv, PHIR);
1152
1152
}
1153
1153
/* TX complete handler */
1154
-
if ((intflags & EIR_TXIF) != 0) {
1154
+
if (((intflags & EIR_TXIF) != 0) &&
1155
+
((intflags & EIR_TXERIF) == 0)) {
1155
1156
bool err = false;
1156
1157
loop++;
1157
1158
if (netif_msg_intr(priv))
···
1204
1203
enc28j60_tx_clear(ndev, true);
1205
1204
} else
1206
1205
enc28j60_tx_clear(ndev, true);
1207
-
locked_reg_bfclr(priv, EIR, EIR_TXERIF);
1206
+
locked_reg_bfclr(priv, EIR, EIR_TXERIF | EIR_TXIF);
1208
1207
}
1209
1208
/* RX Error handler */
1210
1209
if ((intflags & EIR_RXERIF) != 0) {
···
1239
1238
*/
1240
1239
static void enc28j60_hw_tx(struct enc28j60_net *priv)
1241
1240
{
1241
+
BUG_ON(!priv->tx_skb);
1242
+
1242
1243
if (netif_msg_tx_queued(priv))
1243
1244
printk(KERN_DEBUG DRV_NAME
1244
1245
": Tx Packet Len:%d\n", priv->tx_skb->len);
+2
drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c
+2
drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c
+1
-1
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+1
-1
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
···
2804
2804
priv->tx_path_in_lpi_mode = true;
2805
2805
if (status & CORE_IRQ_TX_PATH_EXIT_LPI_MODE)
2806
2806
priv->tx_path_in_lpi_mode = false;
2807
-
if (status & CORE_IRQ_MTL_RX_OVERFLOW)
2807
+
if (status & CORE_IRQ_MTL_RX_OVERFLOW && priv->hw->dma->set_rx_tail_ptr)
2808
2808
priv->hw->dma->set_rx_tail_ptr(priv->ioaddr,
2809
2809
priv->rx_tail_addr,
2810
2810
STMMAC_CHAN0);
+7
-2
drivers/net/geneve.c
+7
-2
drivers/net/geneve.c
···
1072
1072
1073
1073
static int __geneve_change_mtu(struct net_device *dev, int new_mtu, bool strict)
1074
1074
{
1075
+
struct geneve_dev *geneve = netdev_priv(dev);
1075
1076
/* The max_mtu calculation does not take account of GENEVE
1076
1077
* options, to avoid excluding potentially valid
1077
1078
* configurations.
1078
1079
*/
1079
-
int max_mtu = IP_MAX_MTU - GENEVE_BASE_HLEN - sizeof(struct iphdr)
1080
-
- dev->hard_header_len;
1080
+
int max_mtu = IP_MAX_MTU - GENEVE_BASE_HLEN - dev->hard_header_len;
1081
+
1082
+
if (geneve->remote.sa.sa_family == AF_INET6)
1083
+
max_mtu -= sizeof(struct ipv6hdr);
1084
+
else
1085
+
max_mtu -= sizeof(struct iphdr);
1081
1086
1082
1087
if (new_mtu < 68)
1083
1088
return -EINVAL;
+1
drivers/net/macsec.c
+1
drivers/net/macsec.c
+9
-4
drivers/net/phy/dp83867.c
+9
-4
drivers/net/phy/dp83867.c
···
57
57
58
58
/* PHY CTRL bits */
59
59
#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14
60
+
#define DP83867_PHYCR_FIFO_DEPTH_MASK (3 << 14)
60
61
61
62
/* RGMIIDCTL bits */
62
63
#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
···
134
133
static int dp83867_config_init(struct phy_device *phydev)
135
134
{
136
135
struct dp83867_private *dp83867;
137
-
int ret;
138
-
u16 val, delay;
136
+
int ret, val;
137
+
u16 delay;
139
138
140
139
if (!phydev->priv) {
141
140
dp83867 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83867),
···
152
151
}
153
152
154
153
if (phy_interface_is_rgmii(phydev)) {
155
-
ret = phy_write(phydev, MII_DP83867_PHYCTRL,
156
-
(dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT));
154
+
val = phy_read(phydev, MII_DP83867_PHYCTRL);
155
+
if (val < 0)
156
+
return val;
157
+
val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK;
158
+
val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT);
159
+
ret = phy_write(phydev, MII_DP83867_PHYCTRL, val);
157
160
if (ret)
158
161
return ret;
159
162
}
+7
drivers/net/usb/cdc_ncm.c
+7
drivers/net/usb/cdc_ncm.c
···
854
854
if (cdc_ncm_init(dev))
855
855
goto error2;
856
856
857
+
/* Some firmwares need a pause here or they will silently fail
858
+
* to set up the interface properly. This value was decided
859
+
* empirically on a Sierra Wireless MC7455 running 02.08.02.00
860
+
* firmware.
861
+
*/
862
+
usleep_range(10000, 20000);
863
+
857
864
/* configure data interface */
858
865
temp = usb_set_interface(dev->udev, iface_no, data_altsetting);
859
866
if (temp) {
+28
-7
drivers/net/usb/r8152.c
+28
-7
drivers/net/usb/r8152.c
···
31
31
#define NETNEXT_VERSION "08"
32
32
33
33
/* Information for net */
34
-
#define NET_VERSION "4"
34
+
#define NET_VERSION "5"
35
35
36
36
#define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37
37
#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
···
624
624
int (*eee_get)(struct r8152 *, struct ethtool_eee *);
625
625
int (*eee_set)(struct r8152 *, struct ethtool_eee *);
626
626
bool (*in_nway)(struct r8152 *);
627
+
void (*autosuspend_en)(struct r8152 *tp, bool enable);
627
628
} rtl_ops;
628
629
629
630
int intr_interval;
···
2409
2408
if (enable) {
2410
2409
u32 ocp_data;
2411
2410
2412
-
r8153_u1u2en(tp, false);
2413
-
r8153_u2p3en(tp, false);
2414
-
2415
2411
__rtl_set_wol(tp, WAKE_ANY);
2416
2412
2417
2413
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
···
2419
2421
2420
2422
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2421
2423
} else {
2424
+
u32 ocp_data;
2425
+
2422
2426
__rtl_set_wol(tp, tp->saved_wolopts);
2427
+
2428
+
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2429
+
2430
+
ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2431
+
ocp_data &= ~LINK_OFF_WAKE_EN;
2432
+
ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2433
+
2434
+
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2435
+
}
2436
+
}
2437
+
2438
+
static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2439
+
{
2440
+
rtl_runtime_suspend_enable(tp, enable);
2441
+
2442
+
if (enable) {
2443
+
r8153_u1u2en(tp, false);
2444
+
r8153_u2p3en(tp, false);
2445
+
} else {
2423
2446
r8153_u2p3en(tp, true);
2424
2447
r8153_u1u2en(tp, true);
2425
2448
}
···
3531
3512
napi_disable(&tp->napi);
3532
3513
if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3533
3514
rtl_stop_rx(tp);
3534
-
rtl_runtime_suspend_enable(tp, true);
3515
+
tp->rtl_ops.autosuspend_en(tp, true);
3535
3516
} else {
3536
3517
cancel_delayed_work_sync(&tp->schedule);
3537
3518
tp->rtl_ops.down(tp);
···
3557
3538
3558
3539
if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3559
3540
if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3560
-
rtl_runtime_suspend_enable(tp, false);
3541
+
tp->rtl_ops.autosuspend_en(tp, false);
3561
3542
clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3562
3543
napi_disable(&tp->napi);
3563
3544
set_bit(WORK_ENABLE, &tp->flags);
···
3576
3557
usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3577
3558
} else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3578
3559
if (tp->netdev->flags & IFF_UP)
3579
-
rtl_runtime_suspend_enable(tp, false);
3560
+
tp->rtl_ops.autosuspend_en(tp, false);
3580
3561
clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3581
3562
}
3582
3563
···
4156
4137
ops->eee_get = r8152_get_eee;
4157
4138
ops->eee_set = r8152_set_eee;
4158
4139
ops->in_nway = rtl8152_in_nway;
4140
+
ops->autosuspend_en = rtl_runtime_suspend_enable;
4159
4141
break;
4160
4142
4161
4143
case RTL_VER_03:
···
4172
4152
ops->eee_get = r8153_get_eee;
4173
4153
ops->eee_set = r8153_set_eee;
4174
4154
ops->in_nway = rtl8153_in_nway;
4155
+
ops->autosuspend_en = rtl8153_runtime_enable;
4175
4156
break;
4176
4157
4177
4158
default:
+7
-3
drivers/net/usb/usbnet.c
+7
-3
drivers/net/usb/usbnet.c
···
395
395
dev->hard_mtu = net->mtu + net->hard_header_len;
396
396
if (dev->rx_urb_size == old_hard_mtu) {
397
397
dev->rx_urb_size = dev->hard_mtu;
398
-
if (dev->rx_urb_size > old_rx_urb_size)
398
+
if (dev->rx_urb_size > old_rx_urb_size) {
399
+
usbnet_pause_rx(dev);
399
400
usbnet_unlink_rx_urbs(dev);
401
+
usbnet_resume_rx(dev);
402
+
}
400
403
}
401
404
402
405
/* max qlen depend on hard_mtu and rx_urb_size */
···
1511
1508
} else if (netif_running (dev->net) &&
1512
1509
netif_device_present (dev->net) &&
1513
1510
netif_carrier_ok(dev->net) &&
1514
-
!timer_pending (&dev->delay) &&
1515
-
!test_bit (EVENT_RX_HALT, &dev->flags)) {
1511
+
!timer_pending(&dev->delay) &&
1512
+
!test_bit(EVENT_RX_PAUSED, &dev->flags) &&
1513
+
!test_bit(EVENT_RX_HALT, &dev->flags)) {
1516
1514
int temp = dev->rxq.qlen;
1517
1515
1518
1516
if (temp < RX_QLEN(dev)) {
+1
drivers/s390/net/qeth_l2_main.c
+1
drivers/s390/net/qeth_l2_main.c
+1
drivers/s390/net/qeth_l3_main.c
+1
drivers/s390/net/qeth_l3_main.c
+1
include/linux/mlx5/driver.h
+1
include/linux/mlx5/driver.h
+20
include/linux/skbuff.h
+20
include/linux/skbuff.h
···
1062
1062
}
1063
1063
1064
1064
void __skb_get_hash(struct sk_buff *skb);
1065
+
u32 __skb_get_hash_symmetric(struct sk_buff *skb);
1065
1066
u32 skb_get_poff(const struct sk_buff *skb);
1066
1067
u32 __skb_get_poff(const struct sk_buff *skb, void *data,
1067
1068
const struct flow_keys *keys, int hlen);
···
2868
2867
*/
2869
2868
if (skb->ip_summed == CHECKSUM_COMPLETE)
2870
2869
skb->csum = csum_partial(start, len, skb->csum);
2870
+
}
2871
+
2872
+
/**
2873
+
* skb_push_rcsum - push skb and update receive checksum
2874
+
* @skb: buffer to update
2875
+
* @len: length of data pulled
2876
+
*
2877
+
* This function performs an skb_push on the packet and updates
2878
+
* the CHECKSUM_COMPLETE checksum. It should be used on
2879
+
* receive path processing instead of skb_push unless you know
2880
+
* that the checksum difference is zero (e.g., a valid IP header)
2881
+
* or you are setting ip_summed to CHECKSUM_NONE.
2882
+
*/
2883
+
static inline unsigned char *skb_push_rcsum(struct sk_buff *skb,
2884
+
unsigned int len)
2885
+
{
2886
+
skb_push(skb, len);
2887
+
skb_postpush_rcsum(skb, skb->data, len);
2888
+
return skb->data;
2871
2889
}
2872
2890
2873
2891
/**
+6
-1
include/net/bonding.h
+6
-1
include/net/bonding.h
···
34
34
35
35
#define BOND_DEFAULT_MIIMON 100
36
36
37
+
#ifndef __long_aligned
38
+
#define __long_aligned __attribute__((aligned((sizeof(long)))))
39
+
#endif
37
40
/*
38
41
* Less bad way to call ioctl from within the kernel; this needs to be
39
42
* done some other way to get the call out of interrupt context.
···
141
138
struct reciprocal_value reciprocal_packets_per_slave;
142
139
u16 ad_actor_sys_prio;
143
140
u16 ad_user_port_key;
144
-
u8 ad_actor_system[ETH_ALEN];
141
+
142
+
/* 2 bytes of padding : see ether_addr_equal_64bits() */
143
+
u8 ad_actor_system[ETH_ALEN + 2];
145
144
};
146
145
147
146
struct bond_parm_tbl {
+2
-3
include/net/ip.h
+2
-3
include/net/ip.h
···
313
313
return min(dst->dev->mtu, IP_MAX_MTU);
314
314
}
315
315
316
-
static inline unsigned int ip_skb_dst_mtu(const struct sk_buff *skb)
316
+
static inline unsigned int ip_skb_dst_mtu(struct sock *sk,
317
+
const struct sk_buff *skb)
317
318
{
318
-
struct sock *sk = skb->sk;
319
-
320
319
if (!sk || !sk_fullsock(sk) || ip_sk_use_pmtu(sk)) {
321
320
bool forwarding = IPCB(skb)->flags & IPSKB_FORWARDED;
322
321
+1
-1
net/bridge/br_netfilter_hooks.c
+1
-1
net/bridge/br_netfilter_hooks.c
···
700
700
br_nf_ip_fragment(struct net *net, struct sock *sk, struct sk_buff *skb,
701
701
int (*output)(struct net *, struct sock *, struct sk_buff *))
702
702
{
703
-
unsigned int mtu = ip_skb_dst_mtu(skb);
703
+
unsigned int mtu = ip_skb_dst_mtu(sk, skb);
704
704
struct iphdr *iph = ip_hdr(skb);
705
705
706
706
if (unlikely(((iph->frag_off & htons(IP_DF)) && !skb->ignore_df) ||
+43
net/core/flow_dissector.c
+43
net/core/flow_dissector.c
···
651
651
}
652
652
EXPORT_SYMBOL(make_flow_keys_digest);
653
653
654
+
static struct flow_dissector flow_keys_dissector_symmetric __read_mostly;
655
+
656
+
u32 __skb_get_hash_symmetric(struct sk_buff *skb)
657
+
{
658
+
struct flow_keys keys;
659
+
660
+
__flow_hash_secret_init();
661
+
662
+
memset(&keys, 0, sizeof(keys));
663
+
__skb_flow_dissect(skb, &flow_keys_dissector_symmetric, &keys,
664
+
NULL, 0, 0, 0,
665
+
FLOW_DISSECTOR_F_STOP_AT_FLOW_LABEL);
666
+
667
+
return __flow_hash_from_keys(&keys, hashrnd);
668
+
}
669
+
EXPORT_SYMBOL_GPL(__skb_get_hash_symmetric);
670
+
654
671
/**
655
672
* __skb_get_hash: calculate a flow hash
656
673
* @skb: sk_buff to calculate flow hash from
···
885
868
},
886
869
};
887
870
871
+
static const struct flow_dissector_key flow_keys_dissector_symmetric_keys[] = {
872
+
{
873
+
.key_id = FLOW_DISSECTOR_KEY_CONTROL,
874
+
.offset = offsetof(struct flow_keys, control),
875
+
},
876
+
{
877
+
.key_id = FLOW_DISSECTOR_KEY_BASIC,
878
+
.offset = offsetof(struct flow_keys, basic),
879
+
},
880
+
{
881
+
.key_id = FLOW_DISSECTOR_KEY_IPV4_ADDRS,
882
+
.offset = offsetof(struct flow_keys, addrs.v4addrs),
883
+
},
884
+
{
885
+
.key_id = FLOW_DISSECTOR_KEY_IPV6_ADDRS,
886
+
.offset = offsetof(struct flow_keys, addrs.v6addrs),
887
+
},
888
+
{
889
+
.key_id = FLOW_DISSECTOR_KEY_PORTS,
890
+
.offset = offsetof(struct flow_keys, ports),
891
+
},
892
+
};
893
+
888
894
static const struct flow_dissector_key flow_keys_buf_dissector_keys[] = {
889
895
{
890
896
.key_id = FLOW_DISSECTOR_KEY_CONTROL,
···
929
889
skb_flow_dissector_init(&flow_keys_dissector,
930
890
flow_keys_dissector_keys,
931
891
ARRAY_SIZE(flow_keys_dissector_keys));
892
+
skb_flow_dissector_init(&flow_keys_dissector_symmetric,
893
+
flow_keys_dissector_symmetric_keys,
894
+
ARRAY_SIZE(flow_keys_dissector_symmetric_keys));
932
895
skb_flow_dissector_init(&flow_keys_buf_dissector,
933
896
flow_keys_buf_dissector_keys,
934
897
ARRAY_SIZE(flow_keys_buf_dissector_keys));
-18
net/core/skbuff.c
-18
net/core/skbuff.c
···
3016
3016
EXPORT_SYMBOL_GPL(skb_append_pagefrags);
3017
3017
3018
3018
/**
3019
-
* skb_push_rcsum - push skb and update receive checksum
3020
-
* @skb: buffer to update
3021
-
* @len: length of data pulled
3022
-
*
3023
-
* This function performs an skb_push on the packet and updates
3024
-
* the CHECKSUM_COMPLETE checksum. It should be used on
3025
-
* receive path processing instead of skb_push unless you know
3026
-
* that the checksum difference is zero (e.g., a valid IP header)
3027
-
* or you are setting ip_summed to CHECKSUM_NONE.
3028
-
*/
3029
-
static unsigned char *skb_push_rcsum(struct sk_buff *skb, unsigned len)
3030
-
{
3031
-
skb_push(skb, len);
3032
-
skb_postpush_rcsum(skb, skb->data, len);
3033
-
return skb->data;
3034
-
}
3035
-
3036
-
/**
3037
3019
* skb_pull_rcsum - pull skb and update receive checksum
3038
3020
* @skb: buffer to update
3039
3021
* @len: length of data pulled
+12
-9
net/decnet/dn_fib.c
+12
-9
net/decnet/dn_fib.c
···
41
41
#include <net/dn_fib.h>
42
42
#include <net/dn_neigh.h>
43
43
#include <net/dn_dev.h>
44
+
#include <net/nexthop.h>
44
45
45
46
#define RT_MIN_TABLE 1
46
47
···
151
150
struct rtnexthop *nhp = nla_data(attr);
152
151
int nhs = 0, nhlen = nla_len(attr);
153
152
154
-
while(nhlen >= (int)sizeof(struct rtnexthop)) {
155
-
if ((nhlen -= nhp->rtnh_len) < 0)
156
-
return 0;
153
+
while (rtnh_ok(nhp, nhlen)) {
157
154
nhs++;
158
-
nhp = RTNH_NEXT(nhp);
155
+
nhp = rtnh_next(nhp, &nhlen);
159
156
}
160
157
161
-
return nhs;
158
+
/* leftover implies invalid nexthop configuration, discard it */
159
+
return nhlen > 0 ? 0 : nhs;
162
160
}
163
161
164
162
static int dn_fib_get_nhs(struct dn_fib_info *fi, const struct nlattr *attr,
···
167
167
int nhlen = nla_len(attr);
168
168
169
169
change_nexthops(fi) {
170
-
int attrlen = nhlen - sizeof(struct rtnexthop);
171
-
if (attrlen < 0 || (nhlen -= nhp->rtnh_len) < 0)
170
+
int attrlen;
171
+
172
+
if (!rtnh_ok(nhp, nhlen))
172
173
return -EINVAL;
173
174
174
175
nh->nh_flags = (r->rtm_flags&~0xFF) | nhp->rtnh_flags;
175
176
nh->nh_oif = nhp->rtnh_ifindex;
176
177
nh->nh_weight = nhp->rtnh_hops + 1;
177
178
178
-
if (attrlen) {
179
+
attrlen = rtnh_attrlen(nhp);
180
+
if (attrlen > 0) {
179
181
struct nlattr *gw_attr;
180
182
181
183
gw_attr = nla_find((struct nlattr *) (nhp + 1), attrlen, RTA_GATEWAY);
182
184
nh->nh_gw = gw_attr ? nla_get_le16(gw_attr) : 0;
183
185
}
184
-
nhp = RTNH_NEXT(nhp);
186
+
187
+
nhp = rtnh_next(nhp, &nhlen);
185
188
} endfor_nexthops(fi);
186
189
187
190
return 0;
+2
-2
net/ipv4/ip_output.c
+2
-2
net/ipv4/ip_output.c
···
271
271
return dst_output(net, sk, skb);
272
272
}
273
273
#endif
274
-
mtu = ip_skb_dst_mtu(skb);
274
+
mtu = ip_skb_dst_mtu(sk, skb);
275
275
if (skb_is_gso(skb))
276
276
return ip_finish_output_gso(net, sk, skb, mtu);
277
277
···
541
541
542
542
iph = ip_hdr(skb);
543
543
544
-
mtu = ip_skb_dst_mtu(skb);
544
+
mtu = ip_skb_dst_mtu(sk, skb);
545
545
if (IPCB(skb)->frag_max_size && IPCB(skb)->frag_max_size < mtu)
546
546
mtu = IPCB(skb)->frag_max_size;
547
547
+1
net/ipv6/ip6_fib.c
+1
net/ipv6/ip6_fib.c
+1
-1
net/packet/af_packet.c
+1
-1
net/packet/af_packet.c
+3
-2
net/rds/tcp.c
+3
-2
net/rds/tcp.c
···
616
616
617
617
ret = rds_tcp_recv_init();
618
618
if (ret)
619
-
goto out_slab;
619
+
goto out_pernet;
620
620
621
621
ret = rds_trans_register(&rds_tcp_transport);
622
622
if (ret)
···
628
628
629
629
out_recv:
630
630
rds_tcp_recv_exit();
631
-
out_slab:
631
+
out_pernet:
632
632
unregister_pernet_subsys(&rds_tcp_net_ops);
633
+
out_slab:
633
634
kmem_cache_destroy(rds_tcp_conn_slab);
634
635
out:
635
636
return ret;
+1
-1
net/sched/act_mirred.c
+1
-1
net/sched/act_mirred.c
+1
-1
net/tipc/netlink_compat.c
+1
-1
net/tipc/netlink_compat.c
···
604
604
605
605
link_info.dest = nla_get_flag(link[TIPC_NLA_LINK_DEST]);
606
606
link_info.up = htonl(nla_get_flag(link[TIPC_NLA_LINK_UP]));
607
-
nla_strlcpy(link_info.str, nla_data(link[TIPC_NLA_LINK_NAME]),
607
+
nla_strlcpy(link_info.str, link[TIPC_NLA_LINK_NAME],
608
608
TIPC_MAX_LINK_NAME);
609
609
610
610
return tipc_add_tlv(msg->rep, TIPC_TLV_LINK_INFO,