Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'sound-5.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"It might feel like deja vu to receive a bulk of changes at rc5, and it
happens again; we've got a collection of fixes for ASoC. Most of fixes
are targeted for the newly merged SOF (Sound Open Firmware) stuff and
the relevant fixes for Intel platforms.
Other than that, there are a few regression fixes for the recent ASoC
core changes and HD-audio quirk, as well as a couple of FireWire fixes
and for other ASoC codecs"
* tag 'sound-5.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (54 commits)
Revert "ALSA: hda/realtek - Improve the headset mic for Acer Aspire laptops"
ALSA: ice1712: Check correct return value to snd_i2c_sendbytes (EWS/DMX 6Fire)
ALSA: oxfw: allow PCM capture for Stanton SCS.1m
ALSA: firewire-motu: fix destruction of data for isochronous resources
ASoC: Intel: sst: fix kmalloc call with wrong flags
ASoC: core: Fix deadlock in snd_soc_instantiate_card()
SoC: rt274: Fix internal jack assignment in set_jack callback
ALSA: hdac: fix memory release for SST and SOF drivers
ASoC: SOF: Intel: hda: use the defined ppcap functions
ASoC: core: move DAI pre-links initiation to snd_soc_instantiate_card
ASoC: Intel: cht_bsw_rt5672: fix kernel oops with platform_name override
ASoC: Intel: cht_bsw_nau8824: fix kernel oops with platform_name override
ASoC: Intel: bytcht_es8316: fix kernel oops with platform_name override
ASoC: Intel: cht_bsw_max98090: fix kernel oops with platform_name override
ASoC: sun4i-i2s: Add offset to RX channel select
ASoC: sun4i-i2s: Fix sun8i tx channel offset mask
ASoC: max98090: remove 24-bit format support if RJ is 0
ASoC: da7219: Fix build error without CONFIG_I2C
ASoC: SOF: Intel: hda: Fix COMPILE_TEST build error
ASoC: SOF: fix DSP oops definitions in FW ABI
...
+468
-262
+1
include/sound/sof/dai.h
+1
include/sound/sof/dai.h
+23
include/sound/sof/header.h
+23
include/sound/sof/header.h
···
48
48
#define SOF_IPC_FW_READY SOF_GLB_TYPE(0x7U)
49
49
#define SOF_IPC_GLB_DAI_MSG SOF_GLB_TYPE(0x8U)
50
50
#define SOF_IPC_GLB_TRACE_MSG SOF_GLB_TYPE(0x9U)
51
+
#define SOF_IPC_GLB_GDB_DEBUG SOF_GLB_TYPE(0xAU)
51
52
52
53
/*
53
54
* DSP Command Message Types
···
79
78
#define SOF_IPC_COMP_GET_VALUE SOF_CMD_TYPE(0x002)
80
79
#define SOF_IPC_COMP_SET_DATA SOF_CMD_TYPE(0x003)
81
80
#define SOF_IPC_COMP_GET_DATA SOF_CMD_TYPE(0x004)
81
+
#define SOF_IPC_COMP_NOTIFICATION SOF_CMD_TYPE(0x005)
82
82
83
83
/* DAI messages */
84
84
#define SOF_IPC_DAI_CONFIG SOF_CMD_TYPE(0x001)
···
153
151
struct sof_ipc_compound_hdr {
154
152
struct sof_ipc_cmd_hdr hdr;
155
153
uint32_t count; /**< count of 0 means end of compound sequence */
154
+
} __packed;
155
+
156
+
/**
157
+
* OOPS header architecture specific data.
158
+
*/
159
+
struct sof_ipc_dsp_oops_arch_hdr {
160
+
uint32_t arch; /* Identifier of architecture */
161
+
uint32_t totalsize; /* Total size of oops message */
162
+
} __packed;
163
+
164
+
/**
165
+
* OOPS header platform specific data.
166
+
*/
167
+
struct sof_ipc_dsp_oops_plat_hdr {
168
+
uint32_t configidhi; /* ConfigID hi 32bits */
169
+
uint32_t configidlo; /* ConfigID lo 32bits */
170
+
uint32_t numaregs; /* Special regs num */
171
+
uint32_t stackoffset; /* Offset to stack pointer from beginning of
172
+
* oops message
173
+
*/
174
+
uint32_t stackptr; /* Stack ptr */
156
175
} __packed;
157
176
158
177
/** @}*/
+10
-10
include/sound/sof/info.h
+10
-10
include/sound/sof/info.h
···
18
18
19
19
#define SOF_IPC_MAX_ELEMS 16
20
20
21
+
/*
22
+
* Firmware boot info flag bits (64-bit)
23
+
*/
24
+
#define SOF_IPC_INFO_BUILD BIT(0)
25
+
#define SOF_IPC_INFO_LOCKS BIT(1)
26
+
#define SOF_IPC_INFO_LOCKSV BIT(2)
27
+
#define SOF_IPC_INFO_GDB BIT(3)
28
+
21
29
/* extended data types that can be appended onto end of sof_ipc_fw_ready */
22
30
enum sof_ipc_ext_data {
23
31
SOF_IPC_EXT_DMA_BUFFER = 0,
···
57
49
uint32_t hostbox_size;
58
50
struct sof_ipc_fw_version version;
59
51
60
-
/* Miscellaneous debug flags showing build/debug features enabled */
61
-
union {
62
-
uint64_t reserved;
63
-
struct {
64
-
uint64_t build:1;
65
-
uint64_t locks:1;
66
-
uint64_t locks_verbose:1;
67
-
uint64_t gdb:1;
68
-
} bits;
69
-
} debug;
52
+
/* Miscellaneous flags */
53
+
uint64_t flags;
70
54
71
55
/* reserved for future use */
72
56
uint32_t reserved[4];
+7
-2
include/sound/sof/xtensa.h
+7
-2
include/sound/sof/xtensa.h
···
17
17
18
18
/* Xtensa Firmware Oops data */
19
19
struct sof_ipc_dsp_oops_xtensa {
20
-
struct sof_ipc_hdr hdr;
20
+
struct sof_ipc_dsp_oops_arch_hdr arch_hdr;
21
+
struct sof_ipc_dsp_oops_plat_hdr plat_hdr;
21
22
uint32_t exccause;
22
23
uint32_t excvaddr;
23
24
uint32_t ps;
···
39
38
uint32_t intenable;
40
39
uint32_t interrupt;
41
40
uint32_t sar;
42
-
uint32_t stack;
41
+
uint32_t debugcause;
42
+
uint32_t windowbase;
43
+
uint32_t windowstart;
44
+
uint32_t excsave1;
45
+
uint32_t ar[];
43
46
} __packed;
44
47
45
48
#endif
+1
-1
include/uapi/sound/sof/abi.h
+1
-1
include/uapi/sound/sof/abi.h
+1
-1
sound/firewire/motu/motu-stream.c
+1
-1
sound/firewire/motu/motu-stream.c
-3
sound/firewire/oxfw/oxfw.c
-3
sound/firewire/oxfw/oxfw.c
-1
sound/hda/ext/hdac_ext_bus.c
-1
sound/hda/ext/hdac_ext_bus.c
+8
-1
sound/pci/hda/hda_codec.c
+8
-1
sound/pci/hda/hda_codec.c
···
826
826
if (codec->core.type == HDA_DEV_LEGACY)
827
827
snd_hdac_device_unregister(&codec->core);
828
828
codec_display_power(codec, false);
829
-
put_device(hda_codec_dev(codec));
829
+
830
+
/*
831
+
* In the case of ASoC HD-audio bus, the device refcount is released in
832
+
* snd_hdac_ext_bus_device_remove() explicitly.
833
+
*/
834
+
if (codec->core.type == HDA_DEV_LEGACY)
835
+
put_device(hda_codec_dev(codec));
836
+
830
837
return 0;
831
838
}
832
839
+66
-27
sound/pci/hda/patch_realtek.c
+66
-27
sound/pci/hda/patch_realtek.c
···
4120
4120
static void alc_headset_mode_unplugged(struct hda_codec *codec)
4121
4121
{
4122
4122
static struct coef_fw coef0255[] = {
4123
+
WRITE_COEF(0x1b, 0x0c0b), /* LDO and MISC control */
4123
4124
WRITE_COEF(0x45, 0xd089), /* UAJ function set to menual mode */
4124
4125
UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
4125
4126
WRITE_COEF(0x06, 0x6104), /* Set MIC2 Vref gate with HP */
4126
4127
WRITE_COEFEX(0x57, 0x03, 0x8aa6), /* Direct Drive HP Amp control */
4127
4128
{}
4128
4129
};
4129
-
static struct coef_fw coef0255_1[] = {
4130
-
WRITE_COEF(0x1b, 0x0c0b), /* LDO and MISC control */
4131
-
{}
4132
-
};
4133
4130
static struct coef_fw coef0256[] = {
4134
4131
WRITE_COEF(0x1b, 0x0c4b), /* LDO and MISC control */
4132
+
WRITE_COEF(0x45, 0xd089), /* UAJ function set to menual mode */
4133
+
WRITE_COEF(0x06, 0x6104), /* Set MIC2 Vref gate with HP */
4134
+
WRITE_COEFEX(0x57, 0x03, 0x09a3), /* Direct Drive HP Amp control */
4135
+
UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
4135
4136
{}
4136
4137
};
4137
4138
static struct coef_fw coef0233[] = {
···
4195
4194
4196
4195
switch (codec->core.vendor_id) {
4197
4196
case 0x10ec0255:
4198
-
alc_process_coef_fw(codec, coef0255_1);
4199
4197
alc_process_coef_fw(codec, coef0255);
4200
4198
break;
4201
4199
case 0x10ec0236:
4202
4200
case 0x10ec0256:
4203
4201
alc_process_coef_fw(codec, coef0256);
4204
-
alc_process_coef_fw(codec, coef0255);
4205
4202
break;
4206
4203
case 0x10ec0234:
4207
4204
case 0x10ec0274:
···
4252
4253
WRITE_COEF(0x06, 0x6100), /* Set MIC2 Vref gate to normal */
4253
4254
{}
4254
4255
};
4256
+
static struct coef_fw coef0256[] = {
4257
+
UPDATE_COEFEX(0x57, 0x05, 1<<14, 1<<14), /* Direct Drive HP Amp control(Set to verb control)*/
4258
+
WRITE_COEFEX(0x57, 0x03, 0x09a3),
4259
+
WRITE_COEF(0x06, 0x6100), /* Set MIC2 Vref gate to normal */
4260
+
{}
4261
+
};
4255
4262
static struct coef_fw coef0233[] = {
4256
4263
UPDATE_COEF(0x35, 0, 1<<14),
4257
4264
WRITE_COEF(0x06, 0x2100),
···
4305
4300
};
4306
4301
4307
4302
switch (codec->core.vendor_id) {
4308
-
case 0x10ec0236:
4309
4303
case 0x10ec0255:
4310
-
case 0x10ec0256:
4311
4304
alc_write_coef_idx(codec, 0x45, 0xc489);
4312
4305
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
4313
4306
alc_process_coef_fw(codec, coef0255);
4307
+
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
4308
+
break;
4309
+
case 0x10ec0236:
4310
+
case 0x10ec0256:
4311
+
alc_write_coef_idx(codec, 0x45, 0xc489);
4312
+
snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
4313
+
alc_process_coef_fw(codec, coef0256);
4314
4314
snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
4315
4315
break;
4316
4316
case 0x10ec0234:
···
4399
4389
WRITE_COEF(0x49, 0x0049),
4400
4390
{}
4401
4391
};
4392
+
static struct coef_fw coef0256[] = {
4393
+
WRITE_COEF(0x45, 0xc489),
4394
+
WRITE_COEFEX(0x57, 0x03, 0x0da3),
4395
+
WRITE_COEF(0x49, 0x0049),
4396
+
UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
4397
+
WRITE_COEF(0x06, 0x6100),
4398
+
{}
4399
+
};
4402
4400
static struct coef_fw coef0233[] = {
4403
4401
WRITE_COEF(0x06, 0x2100),
4404
4402
WRITE_COEF(0x32, 0x4ea3),
···
4457
4439
alc_process_coef_fw(codec, alc225_pre_hsmode);
4458
4440
alc_process_coef_fw(codec, coef0225);
4459
4441
break;
4460
-
case 0x10ec0236:
4461
4442
case 0x10ec0255:
4462
-
case 0x10ec0256:
4463
4443
alc_process_coef_fw(codec, coef0255);
4444
+
break;
4445
+
case 0x10ec0236:
4446
+
case 0x10ec0256:
4447
+
alc_write_coef_idx(codec, 0x1b, 0x0e4b);
4448
+
alc_write_coef_idx(codec, 0x45, 0xc089);
4449
+
msleep(50);
4450
+
alc_process_coef_fw(codec, coef0256);
4464
4451
break;
4465
4452
case 0x10ec0234:
4466
4453
case 0x10ec0274:
···
4510
4487
};
4511
4488
static struct coef_fw coef0256[] = {
4512
4489
WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */
4513
-
WRITE_COEF(0x1b, 0x0c6b),
4514
-
WRITE_COEFEX(0x57, 0x03, 0x8ea6),
4490
+
WRITE_COEF(0x1b, 0x0e6b),
4515
4491
{}
4516
4492
};
4517
4493
static struct coef_fw coef0233[] = {
···
4628
4606
};
4629
4607
static struct coef_fw coef0256[] = {
4630
4608
WRITE_COEF(0x45, 0xe489), /* Set to OMTP Type */
4631
-
WRITE_COEF(0x1b, 0x0c6b),
4632
-
WRITE_COEFEX(0x57, 0x03, 0x8ea6),
4609
+
WRITE_COEF(0x1b, 0x0e6b),
4633
4610
{}
4634
4611
};
4635
4612
static struct coef_fw coef0233[] = {
···
4760
4739
};
4761
4740
4762
4741
switch (codec->core.vendor_id) {
4763
-
case 0x10ec0236:
4764
4742
case 0x10ec0255:
4765
-
case 0x10ec0256:
4766
4743
alc_process_coef_fw(codec, coef0255);
4767
4744
msleep(300);
4768
4745
val = alc_read_coef_idx(codec, 0x46);
4769
4746
is_ctia = (val & 0x0070) == 0x0070;
4747
+
break;
4748
+
case 0x10ec0236:
4749
+
case 0x10ec0256:
4750
+
alc_write_coef_idx(codec, 0x1b, 0x0e4b);
4751
+
alc_write_coef_idx(codec, 0x06, 0x6104);
4752
+
alc_write_coefex_idx(codec, 0x57, 0x3, 0x09a3);
4753
+
4754
+
snd_hda_codec_write(codec, 0x21, 0,
4755
+
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
4756
+
msleep(80);
4757
+
snd_hda_codec_write(codec, 0x21, 0,
4758
+
AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
4759
+
4760
+
alc_process_coef_fw(codec, coef0255);
4761
+
msleep(300);
4762
+
val = alc_read_coef_idx(codec, 0x46);
4763
+
is_ctia = (val & 0x0070) == 0x0070;
4764
+
4765
+
alc_write_coefex_idx(codec, 0x57, 0x3, 0x0da3);
4766
+
alc_update_coefex_idx(codec, 0x57, 0x5, 1<<14, 0);
4767
+
4768
+
snd_hda_codec_write(codec, 0x21, 0,
4769
+
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
4770
+
msleep(80);
4771
+
snd_hda_codec_write(codec, 0x21, 0,
4772
+
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
4770
4773
break;
4771
4774
case 0x10ec0234:
4772
4775
case 0x10ec0274:
···
6255
6210
.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
6256
6211
},
6257
6212
[ALC255_FIXUP_ACER_MIC_NO_PRESENCE] = {
6258
-
.type = HDA_FIXUP_VERBS,
6259
-
.v.verbs = (const struct hda_verb[]) {
6260
-
/* Enable the Mic */
6261
-
{ 0x20, AC_VERB_SET_COEF_INDEX, 0x45 },
6262
-
{ 0x20, AC_VERB_SET_PROC_COEF, 0x5089 },
6263
-
{}
6213
+
.type = HDA_FIXUP_PINS,
6214
+
.v.pins = (const struct hda_pintbl[]) {
6215
+
{ 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */
6216
+
{ }
6264
6217
},
6265
6218
.chained = true,
6266
-
.chain_id = ALC269_FIXUP_LIFEBOOK_EXTMIC
6219
+
.chain_id = ALC255_FIXUP_HEADSET_MODE
6267
6220
},
6268
6221
[ALC255_FIXUP_ASUS_MIC_NO_PRESENCE] = {
6269
6222
.type = HDA_FIXUP_PINS,
···
7305
7262
{0x18, 0x02a11030},
7306
7263
{0x19, 0x0181303F},
7307
7264
{0x21, 0x0221102f}),
7308
-
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1025, "Acer", ALC255_FIXUP_ACER_MIC_NO_PRESENCE,
7309
-
{0x12, 0x90a60140},
7310
-
{0x14, 0x90170120},
7311
-
{0x21, 0x02211030}),
7312
7265
SND_HDA_PIN_QUIRK(0x10ec0255, 0x1025, "Acer", ALC255_FIXUP_ACER_MIC_NO_PRESENCE,
7313
7266
{0x12, 0x90a601c0},
7314
7267
{0x14, 0x90171120},
+1
-1
sound/pci/ice1712/ews.c
+1
-1
sound/pci/ice1712/ews.c
···
812
812
813
813
snd_i2c_lock(ice->i2c);
814
814
byte = reg;
815
-
if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_6FIRE], &byte, 1)) {
815
+
if (snd_i2c_sendbytes(spec->i2cdevs[EWS_I2C_6FIRE], &byte, 1) != 1) {
816
816
snd_i2c_unlock(ice->i2c);
817
817
dev_err(ice->card->dev, "cannot send pca\n");
818
818
return -EIO;
+11
-7
sound/soc/codecs/ak4458.c
+11
-7
sound/soc/codecs/ak4458.c
···
304
304
AK4458_00_CONTROL1,
305
305
AK4458_RSTN_MASK,
306
306
0x0);
307
-
return ret;
307
+
if (ret < 0)
308
+
return ret;
309
+
310
+
return 0;
308
311
}
309
312
310
313
static int ak4458_hw_params(struct snd_pcm_substream *substream,
···
539
536
}
540
537
}
541
538
542
-
static void ak4458_init(struct snd_soc_component *component)
539
+
static int ak4458_init(struct snd_soc_component *component)
543
540
{
544
541
struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
542
+
int ret;
545
543
546
544
/* External Mute ON */
547
545
if (ak4458->mute_gpiod)
···
550
546
551
547
ak4458_power_on(ak4458);
552
548
553
-
snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
549
+
ret = snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
554
550
0x80, 0x80); /* ACKS bit = 1; 10000000 */
551
+
if (ret < 0)
552
+
return ret;
555
553
556
-
ak4458_rstn_control(component, 1);
554
+
return ak4458_rstn_control(component, 1);
557
555
}
558
556
559
557
static int ak4458_probe(struct snd_soc_component *component)
560
558
{
561
559
struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
562
560
563
-
ak4458_init(component);
564
-
565
561
ak4458->fs = 48000;
566
562
567
-
return 0;
563
+
return ak4458_init(component);
568
564
}
569
565
570
566
static void ak4458_remove(struct snd_soc_component *component)
+1
-1
sound/soc/codecs/cs4265.c
+1
-1
sound/soc/codecs/cs4265.c
+1
sound/soc/codecs/cs42xx8.c
+1
sound/soc/codecs/cs42xx8.c
+16
sound/soc/codecs/max98090.c
+16
sound/soc/codecs/max98090.c
···
1909
1909
return 0;
1910
1910
}
1911
1911
1912
+
static int max98090_dai_startup(struct snd_pcm_substream *substream,
1913
+
struct snd_soc_dai *dai)
1914
+
{
1915
+
struct snd_soc_component *component = dai->component;
1916
+
struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component);
1917
+
unsigned int fmt = max98090->dai_fmt;
1918
+
1919
+
/* Remove 24-bit format support if it is not in right justified mode. */
1920
+
if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_RIGHT_J) {
1921
+
substream->runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE;
1922
+
snd_pcm_hw_constraint_msbits(substream->runtime, 0, 16, 16);
1923
+
}
1924
+
return 0;
1925
+
}
1926
+
1912
1927
static int max98090_dai_hw_params(struct snd_pcm_substream *substream,
1913
1928
struct snd_pcm_hw_params *params,
1914
1929
struct snd_soc_dai *dai)
···
2331
2316
#define MAX98090_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
2332
2317
2333
2318
static const struct snd_soc_dai_ops max98090_dai_ops = {
2319
+
.startup = max98090_dai_startup,
2334
2320
.set_sysclk = max98090_dai_set_sysclk,
2335
2321
.set_fmt = max98090_dai_set_fmt,
2336
2322
.set_tdm_slot = max98090_set_tdm_slot,
+2
-1
sound/soc/codecs/rt274.c
+2
-1
sound/soc/codecs/rt274.c
···
405
405
{
406
406
struct rt274_priv *rt274 = snd_soc_component_get_drvdata(component);
407
407
408
+
rt274->jack = jack;
409
+
408
410
if (jack == NULL) {
409
411
/* Disable jack detection */
410
412
regmap_update_bits(rt274->regmap, RT274_EAPD_GPIO_IRQ_CTRL,
···
414
412
415
413
return 0;
416
414
}
417
-
rt274->jack = jack;
418
415
419
416
regmap_update_bits(rt274->regmap, RT274_EAPD_GPIO_IRQ_CTRL,
420
417
RT274_IRQ_EN, RT274_IRQ_EN);
+12
sound/soc/codecs/rt5670.c
+12
sound/soc/codecs/rt5670.c
···
2882
2882
RT5670_DEV_GPIO |
2883
2883
RT5670_JD_MODE3),
2884
2884
},
2885
+
{
2886
+
.callback = rt5670_quirk_cb,
2887
+
.ident = "Aegex 10 tablet (RU2)",
2888
+
.matches = {
2889
+
DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"),
2890
+
DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"),
2891
+
},
2892
+
.driver_data = (unsigned long *)(RT5670_DMIC_EN |
2893
+
RT5670_DMIC2_INR |
2894
+
RT5670_DEV_GPIO |
2895
+
RT5670_JD_MODE3),
2896
+
},
2885
2897
{}
2886
2898
};
2887
2899
+3
-2
sound/soc/codecs/rt5677-spi.c
+3
-2
sound/soc/codecs/rt5677-spi.c
···
101
101
u32 word_size = min_t(u32, dstlen, 8);
102
102
103
103
for (w = 0; w < dstlen; w += word_size) {
104
-
for (i = 0; i < word_size; i++) {
104
+
for (i = 0; i < word_size && i + w < dstlen; i++) {
105
105
si = w + word_size - i - 1;
106
106
dst[w + i] = si < srclen ? src[si] : 0;
107
107
}
···
152
152
status |= spi_sync(g_spi, &m);
153
153
mutex_unlock(&spi_mutex);
154
154
155
+
155
156
/* Copy data back to caller buffer */
156
-
rt5677_spi_reverse(cb + offset, t[1].len, body, t[1].len);
157
+
rt5677_spi_reverse(cb + offset, len - offset, body, t[1].len);
157
158
}
158
159
return status;
159
160
}
+2
-2
sound/soc/fsl/fsl_asrc.c
+2
-2
sound/soc/fsl/fsl_asrc.c
···
282
282
return -EINVAL;
283
283
}
284
284
285
-
if ((outrate > 8000 && outrate < 30000) &&
286
-
(outrate/inrate > 24 || inrate/outrate > 8)) {
285
+
if ((outrate >= 8000 && outrate <= 30000) &&
286
+
(outrate > 24 * inrate || inrate > 8 * outrate)) {
287
287
pair_err("exceed supported ratio range [1/24, 8] for \
288
288
inrate/outrate: %d/%d\n", inrate, outrate);
289
289
return -EINVAL;
+2
-2
sound/soc/intel/atom/sst/sst_pvt.c
+2
-2
sound/soc/intel/atom/sst/sst_pvt.c
···
158
158
{
159
159
struct ipc_post *msg;
160
160
161
-
msg = kzalloc(sizeof(*msg), GFP_KERNEL);
161
+
msg = kzalloc(sizeof(*msg), GFP_ATOMIC);
162
162
if (!msg)
163
163
return -ENOMEM;
164
164
if (large) {
165
-
msg->mailbox_data = kzalloc(SST_MAILBOX_SIZE, GFP_KERNEL);
165
+
msg->mailbox_data = kzalloc(SST_MAILBOX_SIZE, GFP_ATOMIC);
166
166
if (!msg->mailbox_data) {
167
167
kfree(msg);
168
168
return -ENOMEM;
+1
-1
sound/soc/intel/boards/bytcht_es8316.c
+1
-1
sound/soc/intel/boards/bytcht_es8316.c
···
487
487
}
488
488
489
489
/* override plaform name, if required */
490
+
byt_cht_es8316_card.dev = dev;
490
491
platform_name = mach->mach_params.platform;
491
492
492
493
ret = snd_soc_fixup_dai_links_platform_name(&byt_cht_es8316_card,
···
568
567
(quirk & BYT_CHT_ES8316_MONO_SPEAKER) ? "mono" : "stereo",
569
568
mic_name[BYT_CHT_ES8316_MAP(quirk)]);
570
569
byt_cht_es8316_card.long_name = long_name;
571
-
byt_cht_es8316_card.dev = dev;
572
570
snd_soc_card_set_drvdata(&byt_cht_es8316_card, priv);
573
571
574
572
ret = devm_snd_soc_register_card(dev, &byt_cht_es8316_card);
+1
-1
sound/soc/intel/boards/cht_bsw_max98090_ti.c
+1
-1
sound/soc/intel/boards/cht_bsw_max98090_ti.c
···
446
446
}
447
447
448
448
/* override plaform name, if required */
449
+
snd_soc_card_cht.dev = &pdev->dev;
449
450
mach = (&pdev->dev)->platform_data;
450
451
platform_name = mach->mach_params.platform;
451
452
···
456
455
return ret_val;
457
456
458
457
/* register the soc card */
459
-
snd_soc_card_cht.dev = &pdev->dev;
460
458
snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
461
459
462
460
if (drv->quirks & QUIRK_PMC_PLT_CLK_0)
+1
-1
sound/soc/intel/boards/cht_bsw_nau8824.c
+1
-1
sound/soc/intel/boards/cht_bsw_nau8824.c
···
249
249
snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
250
250
251
251
/* override plaform name, if required */
252
+
snd_soc_card_cht.dev = &pdev->dev;
252
253
mach = (&pdev->dev)->platform_data;
253
254
platform_name = mach->mach_params.platform;
254
255
···
259
258
return ret_val;
260
259
261
260
/* register the soc card */
262
-
snd_soc_card_cht.dev = &pdev->dev;
263
261
ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
264
262
if (ret_val) {
265
263
dev_err(&pdev->dev,
+1
-1
sound/soc/intel/boards/cht_bsw_rt5672.c
+1
-1
sound/soc/intel/boards/cht_bsw_rt5672.c
···
418
418
}
419
419
420
420
/* override plaform name, if required */
421
+
snd_soc_card_cht.dev = &pdev->dev;
421
422
platform_name = mach->mach_params.platform;
422
423
423
424
ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
···
436
435
snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
437
436
438
437
/* register the soc card */
439
-
snd_soc_card_cht.dev = &pdev->dev;
440
438
ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
441
439
if (ret_val) {
442
440
dev_err(&pdev->dev,
+6
-5
sound/soc/intel/boards/sof_rt5682.c
+6
-5
sound/soc/intel/boards/sof_rt5682.c
···
29
29
#define SOF_RT5682_MCLK_EN BIT(3)
30
30
#define SOF_RT5682_MCLK_24MHZ BIT(4)
31
31
#define SOF_SPEAKER_AMP_PRESENT BIT(5)
32
-
#define SOF_RT5682_SSP_AMP(quirk) ((quirk) & GENMASK(8, 6))
33
-
#define SOF_RT5682_SSP_AMP_MASK (GENMASK(8, 6))
34
32
#define SOF_RT5682_SSP_AMP_SHIFT 6
33
+
#define SOF_RT5682_SSP_AMP_MASK (GENMASK(8, 6))
34
+
#define SOF_RT5682_SSP_AMP(quirk) \
35
+
(((quirk) << SOF_RT5682_SSP_AMP_SHIFT) & SOF_RT5682_SSP_AMP_MASK)
35
36
36
37
/* Default: MCLK on, MCLK 19.2M, SSP0 */
37
38
static unsigned long sof_rt5682_quirk = SOF_RT5682_MCLK_EN |
···
145
144
jack = &ctx->sof_headset;
146
145
147
146
snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
148
-
snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
149
-
snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
150
-
snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOICECOMMAND);
147
+
snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
148
+
snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
149
+
snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
151
150
ret = snd_soc_component_set_jack(component, jack, NULL);
152
151
153
152
if (ret) {
+17
sound/soc/intel/common/soc-acpi-intel-byt-match.c
+17
sound/soc/intel/common/soc-acpi-intel-byt-match.c
···
13
13
14
14
#define BYT_THINKPAD_10 1
15
15
#define BYT_POV_P1006W 2
16
+
#define BYT_AEGEX_10 3
16
17
17
18
static int byt_thinkpad10_quirk_cb(const struct dmi_system_id *id)
18
19
{
···
24
23
static int byt_pov_p1006w_quirk_cb(const struct dmi_system_id *id)
25
24
{
26
25
byt_machine_id = BYT_POV_P1006W;
26
+
return 1;
27
+
}
28
+
29
+
static int byt_aegex10_quirk_cb(const struct dmi_system_id *id)
30
+
{
31
+
byt_machine_id = BYT_AEGEX_10;
27
32
return 1;
28
33
}
29
34
···
73
66
DMI_EXACT_MATCH(DMI_BOARD_NAME, "0E57"),
74
67
},
75
68
},
69
+
{
70
+
/* Aegex 10 tablet (RU2) */
71
+
.callback = byt_aegex10_quirk_cb,
72
+
.matches = {
73
+
DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"),
74
+
DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"),
75
+
},
76
+
},
76
77
{ }
77
78
};
78
79
80
+
/* The Thinkapd 10 and Aegex 10 tablets have the same ID problem */
79
81
static struct snd_soc_acpi_mach byt_thinkpad_10 = {
80
82
.id = "10EC5640",
81
83
.drv_name = "cht-bsw-rt5672",
···
111
95
112
96
switch (byt_machine_id) {
113
97
case BYT_THINKPAD_10:
98
+
case BYT_AEGEX_10:
114
99
return &byt_thinkpad_10;
115
100
case BYT_POV_P1006W:
116
101
return &byt_pov_p1006w;
+6
-6
sound/soc/intel/common/soc-acpi-intel-cnl-match.c
+6
-6
sound/soc/intel/common/soc-acpi-intel-cnl-match.c
···
29
29
.sof_tplg_filename = "sof-cnl-rt274.tplg",
30
30
},
31
31
{
32
-
.id = "10EC5682",
33
-
.drv_name = "sof_rt5682",
34
-
.sof_fw_filename = "sof-cnl.ri",
35
-
.sof_tplg_filename = "sof-cml-rt5682.tplg",
36
-
},
37
-
{
38
32
.id = "MX98357A",
39
33
.drv_name = "sof_rt5682",
40
34
.quirk_data = &cml_codecs,
41
35
.sof_fw_filename = "sof-cnl.ri",
42
36
.sof_tplg_filename = "sof-cml-rt5682-max98357a.tplg",
37
+
},
38
+
{
39
+
.id = "10EC5682",
40
+
.drv_name = "sof_rt5682",
41
+
.sof_fw_filename = "sof-cnl.ri",
42
+
.sof_tplg_filename = "sof-cml-rt5682.tplg",
43
43
},
44
44
45
45
{},
+1
-1
sound/soc/mediatek/Kconfig
+1
-1
sound/soc/mediatek/Kconfig
+18
-18
sound/soc/soc-core.c
+18
-18
sound/soc/soc-core.c
···
228
228
229
229
static void soc_cleanup_card_debugfs(struct snd_soc_card *card)
230
230
{
231
+
if (!card->debugfs_card_root)
232
+
return;
231
233
debugfs_remove_recursive(card->debugfs_card_root);
234
+
card->debugfs_card_root = NULL;
232
235
}
233
236
234
237
static void snd_soc_debugfs_init(void)
···
2040
2037
static int soc_cleanup_card_resources(struct snd_soc_card *card)
2041
2038
{
2042
2039
/* free the ALSA card at first; this syncs with pending operations */
2043
-
if (card->snd_card)
2040
+
if (card->snd_card) {
2044
2041
snd_card_free(card->snd_card);
2042
+
card->snd_card = NULL;
2043
+
}
2045
2044
2046
2045
/* remove and free each DAI */
2047
2046
soc_remove_dai_links(card);
···
2070
2065
int ret, i, order;
2071
2066
2072
2067
mutex_lock(&client_mutex);
2068
+
for_each_card_prelinks(card, i, dai_link) {
2069
+
ret = soc_init_dai_link(card, dai_link);
2070
+
if (ret) {
2071
+
soc_cleanup_platform(card);
2072
+
dev_err(card->dev, "ASoC: failed to init link %s: %d\n",
2073
+
dai_link->name, ret);
2074
+
mutex_unlock(&client_mutex);
2075
+
return ret;
2076
+
}
2077
+
}
2073
2078
mutex_lock_nested(&card->mutex, SND_SOC_CARD_CLASS_INIT);
2074
2079
2075
2080
card->dapm.bias_level = SND_SOC_BIAS_OFF;
···
2804
2789
*/
2805
2790
int snd_soc_register_card(struct snd_soc_card *card)
2806
2791
{
2807
-
int i, ret;
2808
-
struct snd_soc_dai_link *link;
2809
-
2810
2792
if (!card->name || !card->dev)
2811
2793
return -EINVAL;
2812
-
2813
-
mutex_lock(&client_mutex);
2814
-
for_each_card_prelinks(card, i, link) {
2815
-
2816
-
ret = soc_init_dai_link(card, link);
2817
-
if (ret) {
2818
-
soc_cleanup_platform(card);
2819
-
dev_err(card->dev, "ASoC: failed to init link %s\n",
2820
-
link->name);
2821
-
mutex_unlock(&client_mutex);
2822
-
return ret;
2823
-
}
2824
-
}
2825
-
mutex_unlock(&client_mutex);
2826
2794
2827
2795
dev_set_drvdata(card->dev, card);
2828
2796
···
2837
2839
snd_soc_dapm_shutdown(card);
2838
2840
snd_soc_flush_all_delayed_work(card);
2839
2841
2842
+
mutex_lock(&client_mutex);
2840
2843
/* remove all components used by DAI links on this card */
2841
2844
for_each_comp_order(order) {
2842
2845
for_each_card_rtds(card, rtd) {
2843
2846
soc_remove_link_components(card, rtd, order);
2844
2847
}
2845
2848
}
2849
+
mutex_unlock(&client_mutex);
2846
2850
2847
2851
soc_cleanup_card_resources(card);
2848
2852
if (!unregister)
+5
-2
sound/soc/soc-dapm.c
+5
-2
sound/soc/soc-dapm.c
···
2193
2193
2194
2194
static void dapm_debugfs_cleanup(struct snd_soc_dapm_context *dapm)
2195
2195
{
2196
+
if (!dapm->debugfs_dapm)
2197
+
return;
2196
2198
debugfs_remove_recursive(dapm->debugfs_dapm);
2199
+
dapm->debugfs_dapm = NULL;
2197
2200
}
2198
2201
2199
2202
#else
···
3834
3831
ret);
3835
3832
goto out;
3836
3833
}
3837
-
source->active++;
3838
3834
}
3835
+
source->active++;
3839
3836
ret = soc_dai_hw_params(&substream, params, source);
3840
3837
if (ret < 0)
3841
3838
goto out;
···
3856
3853
ret);
3857
3854
goto out;
3858
3855
}
3859
-
sink->active++;
3860
3856
}
3857
+
sink->active++;
3861
3858
ret = soc_dai_hw_params(&substream, params, sink);
3862
3859
if (ret < 0)
3863
3860
goto out;
+2
-1
sound/soc/soc-pcm.c
+2
-1
sound/soc/soc-pcm.c
···
2479
2479
2480
2480
if ((be->dpcm[stream].state != SND_SOC_DPCM_STATE_HW_PARAMS) &&
2481
2481
(be->dpcm[stream].state != SND_SOC_DPCM_STATE_STOP) &&
2482
-
(be->dpcm[stream].state != SND_SOC_DPCM_STATE_SUSPEND))
2482
+
(be->dpcm[stream].state != SND_SOC_DPCM_STATE_SUSPEND) &&
2483
+
(be->dpcm[stream].state != SND_SOC_DPCM_STATE_PAUSED))
2483
2484
continue;
2484
2485
2485
2486
dev_dbg(be->dev, "ASoC: prepare BE %s\n",
+6
-2
sound/soc/sof/Kconfig
+6
-2
sound/soc/sof/Kconfig
···
45
45
if SND_SOC_SOF_OPTIONS
46
46
47
47
config SND_SOC_SOF_NOCODEC
48
-
tristate "SOF nocodec mode Support"
48
+
tristate
49
+
50
+
config SND_SOC_SOF_NOCODEC_SUPPORT
51
+
bool "SOF nocodec mode support"
49
52
help
50
53
This adds support for a dummy/nocodec machine driver fallback
51
54
option if no known codec is detected. This is typically only
···
84
81
85
82
config SND_SOC_SOF_FORCE_NOCODEC_MODE
86
83
bool "SOF force nocodec Mode"
87
-
depends on SND_SOC_SOF_NOCODEC
84
+
depends on SND_SOC_SOF_NOCODEC_SUPPORT
88
85
help
89
86
This forces SOF to use dummy/nocodec as machine driver, even
90
87
though there is a codec detected on the real platform. This is
···
139
136
config SND_SOC_SOF
140
137
tristate
141
138
select SND_SOC_TOPOLOGY
139
+
select SND_SOC_SOF_NOCODEC if SND_SOC_SOF_NOCODEC_SUPPORT
142
140
help
143
141
This option is not user-selectable but automagically handled by
144
142
'select' statements at a higher level
+5
-4
sound/soc/sof/control.c
+5
-4
sound/soc/sof/control.c
···
349
349
struct snd_sof_dev *sdev = scontrol->sdev;
350
350
struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
351
351
struct sof_abi_hdr *data = cdata->data;
352
+
size_t size = data->size + sizeof(*data);
352
353
int ret, err;
353
354
354
355
if (be->max > sizeof(ucontrol->value.bytes.data)) {
···
359
358
return -EINVAL;
360
359
}
361
360
362
-
if (data->size > be->max) {
361
+
if (size > be->max) {
363
362
dev_err_ratelimited(sdev->dev,
364
-
"error: size too big %d bytes max is %d\n",
365
-
data->size, be->max);
363
+
"error: size too big %zu bytes max is %d\n",
364
+
size, be->max);
366
365
return -EINVAL;
367
366
}
368
367
···
376
375
}
377
376
378
377
/* copy from kcontrol */
379
-
memcpy(data, ucontrol->value.bytes.data, data->size);
378
+
memcpy(data, ucontrol->value.bytes.data, size);
380
379
381
380
/* notify DSP of byte control updates */
382
381
snd_sof_ipc_set_get_comp_data(sdev->ipc, scontrol,
+25
-4
sound/soc/sof/core.c
+25
-4
sound/soc/sof/core.c
···
382
382
383
383
if (IS_ERR(plat_data->pdev_mach)) {
384
384
ret = PTR_ERR(plat_data->pdev_mach);
385
-
goto comp_err;
385
+
goto fw_run_err;
386
386
}
387
387
388
388
dev_dbg(sdev->dev, "created machine %s\n",
···
393
393
394
394
return 0;
395
395
396
-
comp_err:
397
-
snd_soc_unregister_component(sdev->dev);
396
+
#if !IS_ENABLED(CONFIG_SND_SOC_SOF_PROBE_WORK_QUEUE)
398
397
fw_run_err:
399
398
snd_sof_fw_unload(sdev);
400
399
fw_load_err:
···
402
403
snd_sof_free_debug(sdev);
403
404
dbg_err:
404
405
snd_sof_remove(sdev);
406
+
#else
407
+
408
+
/*
409
+
* when the probe_continue is handled in a work queue, the
410
+
* probe does not fail so we don't release resources here.
411
+
* They will be released with an explicit call to
412
+
* snd_sof_device_remove() when the PCI/ACPI device is removed
413
+
*/
414
+
415
+
fw_run_err:
416
+
fw_load_err:
417
+
ipc_err:
418
+
dbg_err:
419
+
420
+
#endif
405
421
406
422
return ret;
407
423
}
···
498
484
snd_sof_ipc_free(sdev);
499
485
snd_sof_free_debug(sdev);
500
486
snd_sof_free_trace(sdev);
501
-
snd_sof_remove(sdev);
502
487
503
488
/*
504
489
* Unregister machine driver. This will unbind the snd_card which
···
506
493
*/
507
494
if (!IS_ERR_OR_NULL(pdata->pdev_mach))
508
495
platform_device_unregister(pdata->pdev_mach);
496
+
497
+
/*
498
+
* Unregistering the machine driver results in unloading the topology.
499
+
* Some widgets, ex: scheduler, attempt to power down the core they are
500
+
* scheduled on, when they are unloaded. Therefore, the DSP must be
501
+
* removed only after the topology has been unloaded.
502
+
*/
503
+
snd_sof_remove(sdev);
509
504
510
505
/* release firmware */
511
506
release_firmware(pdata->fw);
+14
-12
sound/soc/sof/intel/bdw.c
+14
-12
sound/soc/sof/intel/bdw.c
···
220
220
struct sof_ipc_panic_info *panic_info,
221
221
u32 *stack, size_t stack_words)
222
222
{
223
-
/* first read regsisters */
224
-
sof_mailbox_read(sdev, sdev->dsp_oops_offset, xoops, sizeof(*xoops));
223
+
u32 offset = sdev->dsp_oops_offset;
224
+
225
+
/* first read registers */
226
+
sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
227
+
228
+
/* note: variable AR register array is not read */
225
229
226
230
/* then get panic info */
227
-
sof_mailbox_read(sdev, sdev->dsp_oops_offset + sizeof(*xoops),
228
-
panic_info, sizeof(*panic_info));
231
+
offset += xoops->arch_hdr.totalsize;
232
+
sof_mailbox_read(sdev, offset, panic_info, sizeof(*panic_info));
229
233
230
234
/* then get the stack */
231
-
sof_mailbox_read(sdev, sdev->dsp_oops_offset + sizeof(*xoops) +
232
-
sizeof(*panic_info), stack,
233
-
stack_words * sizeof(u32));
235
+
offset += sizeof(*panic_info);
236
+
sof_mailbox_read(sdev, offset, stack, stack_words * sizeof(u32));
234
237
}
235
238
236
239
static void bdw_dump(struct snd_sof_dev *sdev, u32 flags)
···
286
283
SHIM_IMRX, SHIM_IMRX_DONE,
287
284
SHIM_IMRX_DONE);
288
285
286
+
spin_lock_irq(&sdev->ipc_lock);
287
+
289
288
/*
290
289
* handle immediate reply from DSP core. If the msg is
291
290
* found, set done bit in cmd_done which is called at the
···
299
294
snd_sof_ipc_reply(sdev, ipcx);
300
295
301
296
bdw_dsp_done(sdev);
297
+
298
+
spin_unlock_irq(&sdev->ipc_lock);
302
299
}
303
300
304
301
ipcd = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCD);
···
492
485
{
493
486
struct snd_sof_ipc_msg *msg = sdev->msg;
494
487
struct sof_ipc_reply reply;
495
-
unsigned long flags;
496
488
int ret = 0;
497
489
498
490
/*
···
506
500
507
501
/* get reply */
508
502
sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply));
509
-
510
-
spin_lock_irqsave(&sdev->ipc_lock, flags);
511
503
512
504
if (reply.error < 0) {
513
505
memcpy(msg->reply_data, &reply, sizeof(reply));
···
525
521
}
526
522
527
523
msg->reply_error = ret;
528
-
529
-
spin_unlock_irqrestore(&sdev->ipc_lock, flags);
530
524
}
531
525
532
526
static void bdw_host_done(struct snd_sof_dev *sdev)
+14
-11
sound/soc/sof/intel/byt.c
+14
-11
sound/soc/sof/intel/byt.c
···
265
265
struct sof_ipc_panic_info *panic_info,
266
266
u32 *stack, size_t stack_words)
267
267
{
268
+
u32 offset = sdev->dsp_oops_offset;
269
+
268
270
/* first read regsisters */
269
-
sof_mailbox_read(sdev, sdev->dsp_oops_offset, xoops, sizeof(*xoops));
271
+
sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
272
+
273
+
/* note: variable AR register array is not read */
270
274
271
275
/* then get panic info */
272
-
sof_mailbox_read(sdev, sdev->dsp_oops_offset + sizeof(*xoops),
273
-
panic_info, sizeof(*panic_info));
276
+
offset += xoops->arch_hdr.totalsize;
277
+
sof_mailbox_read(sdev, offset, panic_info, sizeof(*panic_info));
274
278
275
279
/* then get the stack */
276
-
sof_mailbox_read(sdev, sdev->dsp_oops_offset + sizeof(*xoops) +
277
-
sizeof(*panic_info), stack,
278
-
stack_words * sizeof(u32));
280
+
offset += sizeof(*panic_info);
281
+
sof_mailbox_read(sdev, offset, stack, stack_words * sizeof(u32));
279
282
}
280
283
281
284
static void byt_dump(struct snd_sof_dev *sdev, u32 flags)
···
332
329
SHIM_IMRX,
333
330
SHIM_IMRX_DONE,
334
331
SHIM_IMRX_DONE);
332
+
333
+
spin_lock_irq(&sdev->ipc_lock);
334
+
335
335
/*
336
336
* handle immediate reply from DSP core. If the msg is
337
337
* found, set done bit in cmd_done which is called at the
···
346
340
snd_sof_ipc_reply(sdev, ipcx);
347
341
348
342
byt_dsp_done(sdev);
343
+
344
+
spin_unlock_irq(&sdev->ipc_lock);
349
345
}
350
346
351
347
/* new message from DSP */
···
391
383
{
392
384
struct snd_sof_ipc_msg *msg = sdev->msg;
393
385
struct sof_ipc_reply reply;
394
-
unsigned long flags;
395
386
int ret = 0;
396
387
397
388
/*
···
405
398
406
399
/* get reply */
407
400
sof_mailbox_read(sdev, sdev->host_box.offset, &reply, sizeof(reply));
408
-
409
-
spin_lock_irqsave(&sdev->ipc_lock, flags);
410
401
411
402
if (reply.error < 0) {
412
403
memcpy(msg->reply_data, &reply, sizeof(reply));
···
424
419
}
425
420
426
421
msg->reply_error = ret;
427
-
428
-
spin_unlock_irqrestore(&sdev->ipc_lock, flags);
429
422
}
430
423
431
424
static void byt_host_done(struct snd_sof_dev *sdev)
+4
sound/soc/sof/intel/cnl.c
+4
sound/soc/sof/intel/cnl.c
···
64
64
CNL_DSP_REG_HIPCCTL,
65
65
CNL_DSP_REG_HIPCCTL_DONE, 0);
66
66
67
+
spin_lock_irq(&sdev->ipc_lock);
68
+
67
69
/* handle immediate reply from DSP core */
68
70
hda_dsp_ipc_get_reply(sdev);
69
71
snd_sof_ipc_reply(sdev, msg);
···
76
74
}
77
75
78
76
cnl_ipc_dsp_done(sdev);
77
+
78
+
spin_unlock_irq(&sdev->ipc_lock);
79
79
80
80
ret = IRQ_HANDLED;
81
81
}
+93
-9
sound/soc/sof/intel/hda-ctrl.c
+93
-9
sound/soc/sof/intel/hda-ctrl.c
···
161
161
return 0;
162
162
}
163
163
164
-
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
165
-
/*
166
-
* While performing reset, controller may not come back properly and causing
167
-
* issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
168
-
* (init chip) and then again set CGCTL.MISCBDCGE to 1
169
-
*/
170
164
int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset)
171
165
{
172
166
struct hdac_bus *bus = sof_to_bus(sdev);
173
-
int ret;
167
+
struct hdac_stream *stream;
168
+
int sd_offset, ret = 0;
169
+
170
+
if (bus->chip_init)
171
+
return 0;
174
172
175
173
hda_dsp_ctrl_misc_clock_gating(sdev, false);
176
-
ret = snd_hdac_bus_init_chip(bus, full_reset);
174
+
175
+
if (full_reset) {
176
+
/* clear WAKESTS */
177
+
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS,
178
+
SOF_HDA_WAKESTS_INT_MASK,
179
+
SOF_HDA_WAKESTS_INT_MASK);
180
+
181
+
/* reset HDA controller */
182
+
ret = hda_dsp_ctrl_link_reset(sdev, true);
183
+
if (ret < 0) {
184
+
dev_err(sdev->dev, "error: failed to reset HDA controller\n");
185
+
return ret;
186
+
}
187
+
188
+
usleep_range(500, 1000);
189
+
190
+
/* exit HDA controller reset */
191
+
ret = hda_dsp_ctrl_link_reset(sdev, false);
192
+
if (ret < 0) {
193
+
dev_err(sdev->dev, "error: failed to exit HDA controller reset\n");
194
+
return ret;
195
+
}
196
+
197
+
usleep_range(1000, 1200);
198
+
}
199
+
200
+
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
201
+
/* check to see if controller is ready */
202
+
if (!snd_hdac_chip_readb(bus, GCTL)) {
203
+
dev_dbg(bus->dev, "controller not ready!\n");
204
+
return -EBUSY;
205
+
}
206
+
207
+
/* Accept unsolicited responses */
208
+
snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, AZX_GCTL_UNSOL);
209
+
210
+
/* detect codecs */
211
+
if (!bus->codec_mask) {
212
+
bus->codec_mask = snd_hdac_chip_readw(bus, STATESTS);
213
+
dev_dbg(bus->dev, "codec_mask = 0x%lx\n", bus->codec_mask);
214
+
}
215
+
#endif
216
+
217
+
/* clear stream status */
218
+
list_for_each_entry(stream, &bus->stream_list, list) {
219
+
sd_offset = SOF_STREAM_SD_OFFSET(stream);
220
+
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
221
+
sd_offset +
222
+
SOF_HDA_ADSP_REG_CL_SD_STS,
223
+
SOF_HDA_CL_DMA_SD_INT_MASK,
224
+
SOF_HDA_CL_DMA_SD_INT_MASK);
225
+
}
226
+
227
+
/* clear WAKESTS */
228
+
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS,
229
+
SOF_HDA_WAKESTS_INT_MASK,
230
+
SOF_HDA_WAKESTS_INT_MASK);
231
+
232
+
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
233
+
/* clear rirb status */
234
+
snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
235
+
#endif
236
+
237
+
/* clear interrupt status register */
238
+
snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS,
239
+
SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_ALL_STREAM);
240
+
241
+
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
242
+
/* initialize the codec command I/O */
243
+
snd_hdac_bus_init_cmd_io(bus);
244
+
#endif
245
+
246
+
/* enable CIE and GIE interrupts */
247
+
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
248
+
SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN,
249
+
SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN);
250
+
251
+
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
252
+
/* program the position buffer */
253
+
if (bus->use_posbuf && bus->posbuf.addr) {
254
+
snd_hdac_chip_writel(bus, DPLBASE, (u32)bus->posbuf.addr);
255
+
snd_hdac_chip_writel(bus, DPUBASE,
256
+
upper_32_bits(bus->posbuf.addr));
257
+
}
258
+
#endif
259
+
260
+
bus->chip_init = true;
261
+
177
262
hda_dsp_ctrl_misc_clock_gating(sdev, true);
178
263
179
264
return ret;
180
265
}
181
-
#endif
+14
-3
sound/soc/sof/intel/hda-ipc.c
+14
-3
sound/soc/sof/intel/hda-ipc.c
···
72
72
struct snd_sof_ipc_msg *msg = sdev->msg;
73
73
struct sof_ipc_reply reply;
74
74
struct sof_ipc_cmd_hdr *hdr;
75
-
unsigned long flags;
76
75
int ret = 0;
77
76
78
77
/*
···
83
84
dev_warn(sdev->dev, "unexpected ipc interrupt raised!\n");
84
85
return;
85
86
}
86
-
spin_lock_irqsave(&sdev->ipc_lock, flags);
87
87
88
88
hdr = msg->msg_data;
89
89
if (hdr->cmd == (SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CTX_SAVE)) {
···
121
123
out:
122
124
msg->reply_error = ret;
123
125
124
-
spin_unlock_irqrestore(&sdev->ipc_lock, flags);
125
126
}
126
127
127
128
static bool hda_dsp_ipc_is_sof(uint32_t msg)
···
169
172
HDA_DSP_REG_HIPCCTL,
170
173
HDA_DSP_REG_HIPCCTL_DONE, 0);
171
174
175
+
/*
176
+
* Make sure the interrupt thread cannot be preempted between
177
+
* waking up the sender and re-enabling the interrupt. Also
178
+
* protect against a theoretical race with sof_ipc_tx_message():
179
+
* if the DSP is fast enough to receive an IPC message, reply to
180
+
* it, and the host interrupt processing calls this function on
181
+
* a different core from the one, where the sending is taking
182
+
* place, the message might not yet be marked as expecting a
183
+
* reply.
184
+
*/
185
+
spin_lock_irq(&sdev->ipc_lock);
186
+
172
187
/* handle immediate reply from DSP core - ignore ROM messages */
173
188
if (hda_dsp_ipc_is_sof(msg)) {
174
189
hda_dsp_ipc_get_reply(sdev);
···
195
186
196
187
/* set the done bit */
197
188
hda_dsp_ipc_dsp_done(sdev);
189
+
190
+
spin_unlock_irq(&sdev->ipc_lock);
198
191
199
192
ret = IRQ_HANDLED;
200
193
}
+37
-94
sound/soc/sof/intel/hda.c
+37
-94
sound/soc/sof/intel/hda.c
···
108
108
struct sof_ipc_panic_info *panic_info,
109
109
u32 *stack, size_t stack_words)
110
110
{
111
+
u32 offset = sdev->dsp_oops_offset;
112
+
111
113
/* first read registers */
112
-
sof_block_read(sdev, sdev->mmio_bar, sdev->dsp_oops_offset, xoops,
113
-
sizeof(*xoops));
114
+
sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
115
+
116
+
/* note: variable AR register array is not read */
114
117
115
118
/* then get panic info */
116
-
sof_block_read(sdev, sdev->mmio_bar, sdev->dsp_oops_offset +
117
-
sizeof(*xoops), panic_info, sizeof(*panic_info));
119
+
offset += xoops->arch_hdr.totalsize;
120
+
sof_block_read(sdev, sdev->mmio_bar, offset,
121
+
panic_info, sizeof(*panic_info));
118
122
119
123
/* then get the stack */
120
-
sof_block_read(sdev, sdev->mmio_bar, sdev->dsp_oops_offset +
121
-
sizeof(*xoops) + sizeof(*panic_info), stack,
124
+
offset += sizeof(*panic_info);
125
+
sof_block_read(sdev, sdev->mmio_bar, offset, stack,
122
126
stack_words * sizeof(u32));
123
127
}
124
128
···
227
223
228
224
/* initialise hdac bus */
229
225
bus->addr = pci_resource_start(pci, 0);
226
+
#if IS_ENABLED(CONFIG_PCI)
230
227
bus->remap_addr = pci_ioremap_bar(pci, 0);
228
+
#endif
231
229
if (!bus->remap_addr) {
232
230
dev_err(bus->dev, "error: ioremap error\n");
233
231
return -ENXIO;
···
270
264
return tplg_filename;
271
265
}
272
266
267
+
#endif
268
+
273
269
static int hda_init_caps(struct snd_sof_dev *sdev)
274
270
{
275
271
struct hdac_bus *bus = sof_to_bus(sdev);
272
+
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
276
273
struct hdac_ext_link *hlink;
277
274
struct snd_soc_acpi_mach_params *mach_params;
278
275
struct snd_soc_acpi_mach *hda_mach;
···
283
274
struct snd_soc_acpi_mach *mach;
284
275
const char *tplg_filename;
285
276
int codec_num = 0;
286
-
int ret = 0;
287
277
int i;
278
+
#endif
279
+
int ret = 0;
288
280
289
281
device_disable_async_suspend(bus->dev);
290
282
···
293
283
if (bus->ppcap)
294
284
dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
295
285
286
+
ret = hda_dsp_ctrl_init_chip(sdev, true);
287
+
if (ret < 0) {
288
+
dev_err(bus->dev, "error: init chip failed with ret: %d\n",
289
+
ret);
290
+
return ret;
291
+
}
292
+
293
+
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
296
294
if (bus->mlcap)
297
295
snd_hdac_ext_bus_get_ml_capabilities(bus);
298
296
···
309
291
if (ret < 0) {
310
292
dev_err(sdev->dev, "error: no HDMI audio devices found\n");
311
293
return ret;
312
-
}
313
-
314
-
ret = hda_dsp_ctrl_init_chip(sdev, true);
315
-
if (ret < 0) {
316
-
dev_err(bus->dev, "error: init chip failed with ret: %d\n", ret);
317
-
goto out;
318
294
}
319
295
320
296
/* codec detection */
···
351
339
/* use local variable for readability */
352
340
tplg_filename = pdata->tplg_filename;
353
341
tplg_filename = fixup_tplg_name(sdev, tplg_filename);
354
-
if (!tplg_filename)
355
-
goto out;
342
+
if (!tplg_filename) {
343
+
hda_codec_i915_exit(sdev);
344
+
return ret;
345
+
}
356
346
pdata->tplg_filename = tplg_filename;
357
347
}
358
348
}
···
378
364
*/
379
365
list_for_each_entry(hlink, &bus->hlink_list, list)
380
366
snd_hdac_ext_bus_link_put(bus, hlink);
381
-
382
-
return 0;
383
-
384
-
out:
385
-
hda_codec_i915_exit(sdev);
386
-
return ret;
387
-
}
388
-
389
-
#else
390
-
391
-
static int hda_init_caps(struct snd_sof_dev *sdev)
392
-
{
393
-
/*
394
-
* set CGCTL.MISCBDCGE to 0 during reset and set back to 1
395
-
* when reset finished.
396
-
* TODO: maybe no need for init_caps?
397
-
*/
398
-
hda_dsp_ctrl_misc_clock_gating(sdev, 0);
399
-
400
-
/* clear WAKESTS */
401
-
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS,
402
-
SOF_HDA_WAKESTS_INT_MASK,
403
-
SOF_HDA_WAKESTS_INT_MASK);
404
-
405
-
return 0;
406
-
}
407
-
408
367
#endif
368
+
return 0;
369
+
}
409
370
410
371
static const struct sof_intel_dsp_desc
411
372
*get_chip_info(struct snd_sof_pdata *pdata)
···
398
409
struct pci_dev *pci = to_pci_dev(sdev->dev);
399
410
struct sof_intel_hda_dev *hdev;
400
411
struct hdac_bus *bus;
401
-
struct hdac_stream *stream;
402
412
const struct sof_intel_dsp_desc *chip;
403
-
int sd_offset, ret = 0;
413
+
int ret = 0;
404
414
405
415
/*
406
416
* detect DSP by checking class/subclass/prog-id information
···
456
468
goto hdac_bus_unmap;
457
469
458
470
/* DSP base */
471
+
#if IS_ENABLED(CONFIG_PCI)
459
472
sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
473
+
#endif
460
474
if (!sdev->bar[HDA_DSP_BAR]) {
461
475
dev_err(sdev->dev, "error: ioremap error\n");
462
476
ret = -ENXIO;
···
548
558
if (ret < 0)
549
559
goto free_ipc_irq;
550
560
551
-
/* reset HDA controller */
552
-
ret = hda_dsp_ctrl_link_reset(sdev, true);
553
-
if (ret < 0) {
554
-
dev_err(sdev->dev, "error: failed to reset HDA controller\n");
555
-
goto free_ipc_irq;
556
-
}
557
-
558
-
/* exit HDA controller reset */
559
-
ret = hda_dsp_ctrl_link_reset(sdev, false);
560
-
if (ret < 0) {
561
-
dev_err(sdev->dev, "error: failed to exit HDA controller reset\n");
562
-
goto free_ipc_irq;
563
-
}
564
-
565
-
/* clear stream status */
566
-
list_for_each_entry(stream, &bus->stream_list, list) {
567
-
sd_offset = SOF_STREAM_SD_OFFSET(stream);
568
-
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
569
-
sd_offset +
570
-
SOF_HDA_ADSP_REG_CL_SD_STS,
571
-
SOF_HDA_CL_DMA_SD_INT_MASK,
572
-
SOF_HDA_CL_DMA_SD_INT_MASK);
573
-
}
574
-
575
-
/* clear WAKESTS */
576
-
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS,
577
-
SOF_HDA_WAKESTS_INT_MASK,
578
-
SOF_HDA_WAKESTS_INT_MASK);
579
-
580
-
/* clear interrupt status register */
581
-
snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS,
582
-
SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_ALL_STREAM);
583
-
584
-
/* enable CIE and GIE interrupts */
585
-
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
586
-
SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN,
587
-
SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN);
588
-
589
-
/* re-enable CGCTL.MISCBDCGE after reset */
590
-
hda_dsp_ctrl_misc_clock_gating(sdev, true);
591
-
592
-
device_disable_async_suspend(&pci->dev);
593
-
594
-
/* enable DSP features */
595
-
snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
596
-
SOF_HDA_PPCTL_GPROCEN, SOF_HDA_PPCTL_GPROCEN);
597
-
598
-
/* enable DSP IRQ */
599
-
snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
600
-
SOF_HDA_PPCTL_PIE, SOF_HDA_PPCTL_PIE);
561
+
/* enable ppcap interrupt */
562
+
hda_dsp_ctrl_ppcap_enable(sdev, true);
563
+
hda_dsp_ctrl_ppcap_int_enable(sdev, true);
601
564
602
565
/* initialize waitq for code loading */
603
566
init_waitqueue_head(&sdev->waitq);
+8
-18
sound/soc/sof/ipc.c
+8
-18
sound/soc/sof/ipc.c
···
115
115
}
116
116
break;
117
117
case SOF_IPC_GLB_COMP_MSG:
118
-
str = "GLB_COMP_MSG: SET_VALUE";
118
+
str = "GLB_COMP_MSG";
119
119
switch (type) {
120
120
case SOF_IPC_COMP_SET_VALUE:
121
121
str2 = "SET_VALUE"; break;
···
308
308
int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id)
309
309
{
310
310
struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
311
-
unsigned long flags;
312
-
313
-
/*
314
-
* Protect against a theoretical race with sof_ipc_tx_message(): if the
315
-
* DSP is fast enough to receive an IPC message, reply to it, and the
316
-
* host interrupt processing calls this function on a different core
317
-
* from the one, where the sending is taking place, the message might
318
-
* not yet be marked as expecting a reply.
319
-
*/
320
-
spin_lock_irqsave(&sdev->ipc_lock, flags);
321
311
322
312
if (msg->ipc_complete) {
323
-
spin_unlock_irqrestore(&sdev->ipc_lock, flags);
324
313
dev_err(sdev->dev, "error: no reply expected, received 0x%x",
325
314
msg_id);
326
315
return -EINVAL;
···
318
329
/* wake up and return the error if we have waiters on this message ? */
319
330
msg->ipc_complete = true;
320
331
wake_up(&msg->waitq);
321
-
322
-
spin_unlock_irqrestore(&sdev->ipc_lock, flags);
323
332
324
333
return 0;
325
334
}
···
763
776
}
764
777
}
765
778
766
-
if (ready->debug.bits.build) {
779
+
if (ready->flags & SOF_IPC_INFO_BUILD) {
767
780
dev_info(sdev->dev,
768
781
"Firmware debug build %d on %s-%s - options:\n"
769
782
" GDB: %s\n"
770
783
" lock debug: %s\n"
771
784
" lock vdebug: %s\n",
772
785
v->build, v->date, v->time,
773
-
ready->debug.bits.gdb ? "enabled" : "disabled",
774
-
ready->debug.bits.locks ? "enabled" : "disabled",
775
-
ready->debug.bits.locks_verbose ? "enabled" : "disabled");
786
+
ready->flags & SOF_IPC_INFO_GDB ?
787
+
"enabled" : "disabled",
788
+
ready->flags & SOF_IPC_INFO_LOCKS ?
789
+
"enabled" : "disabled",
790
+
ready->flags & SOF_IPC_INFO_LOCKSV ?
791
+
"enabled" : "disabled");
776
792
}
777
793
778
794
/* copy the fw_version into debugfs at first boot */
+2
sound/soc/sof/loader.c
+2
sound/soc/sof/loader.c
···
372
372
msecs_to_jiffies(sdev->boot_timeout));
373
373
if (ret == 0) {
374
374
dev_err(sdev->dev, "error: firmware boot failure\n");
375
+
/* after this point FW_READY msg should be ignored */
376
+
sdev->boot_complete = true;
375
377
snd_sof_dsp_dbg_dump(sdev, SOF_DBG_REGS | SOF_DBG_MBOX |
376
378
SOF_DBG_TEXT | SOF_DBG_PCI);
377
379
return -EIO;
+4
-4
sound/soc/sof/pcm.c
+4
-4
sound/soc/sof/pcm.c
···
211
211
/* save pcm hw_params */
212
212
memcpy(&spcm->params[substream->stream], params, sizeof(*params));
213
213
214
-
INIT_WORK(&spcm->stream[substream->stream].period_elapsed_work,
215
-
sof_pcm_period_elapsed_work);
214
+
/* clear hw_params_upon_resume flag */
215
+
spcm->hw_params_upon_resume[substream->stream] = 0;
216
216
217
217
return ret;
218
218
}
···
429
429
dev_dbg(sdev->dev, "pcm: open stream %d dir %d\n", spcm->pcm.pcm_id,
430
430
substream->stream);
431
431
432
-
/* clear hw_params_upon_resume flag */
433
-
spcm->hw_params_upon_resume[substream->stream] = 0;
432
+
INIT_WORK(&spcm->stream[substream->stream].period_elapsed_work,
433
+
sof_pcm_period_elapsed_work);
434
434
435
435
caps = &spcm->pcm.caps[substream->stream];
436
436
+1
-1
sound/soc/sof/xtensa/core.c
+1
-1
sound/soc/sof/xtensa/core.c
+9
sound/soc/sunxi/sun4i-codec.c
+9
sound/soc/sunxi/sun4i-codec.c
···
1320
1320
gpiod_set_value_cansleep(scodec->gpio_pa,
1321
1321
!!SND_SOC_DAPM_EVENT_ON(event));
1322
1322
1323
+
if (SND_SOC_DAPM_EVENT_ON(event)) {
1324
+
/*
1325
+
* Need a delay to wait for DAC to push the data. 700ms seems
1326
+
* to be the best compromise not to feel this delay while
1327
+
* playing a sound.
1328
+
*/
1329
+
msleep(700);
1330
+
}
1331
+
1323
1332
return 0;
1324
1333
}
1325
1334
+5
-1
sound/soc/sunxi/sun4i-i2s.c
+5
-1
sound/soc/sunxi/sun4i-i2s.c
···
106
106
107
107
#define SUN8I_I2S_TX_CHAN_MAP_REG 0x44
108
108
#define SUN8I_I2S_TX_CHAN_SEL_REG 0x34
109
-
#define SUN8I_I2S_TX_CHAN_OFFSET_MASK GENMASK(13, 11)
109
+
#define SUN8I_I2S_TX_CHAN_OFFSET_MASK GENMASK(13, 12)
110
110
#define SUN8I_I2S_TX_CHAN_OFFSET(offset) (offset << 12)
111
111
#define SUN8I_I2S_TX_CHAN_EN_MASK GENMASK(11, 4)
112
112
#define SUN8I_I2S_TX_CHAN_EN(num_chan) (((1 << num_chan) - 1) << 4)
···
454
454
val++;
455
455
/* blck offset determines whether i2s or LJ */
456
456
regmap_update_bits(i2s->regmap, SUN8I_I2S_TX_CHAN_SEL_REG,
457
+
SUN8I_I2S_TX_CHAN_OFFSET_MASK,
458
+
SUN8I_I2S_TX_CHAN_OFFSET(offset));
459
+
460
+
regmap_update_bits(i2s->regmap, SUN8I_I2S_RX_CHAN_SEL_REG,
457
461
SUN8I_I2S_TX_CHAN_OFFSET_MASK,
458
462
SUN8I_I2S_TX_CHAN_OFFSET(offset));
459
463
}