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dt-bindings: mtd: mxic,multi-itfc-v009-nand-controller: convert to DT schema

Convert Macronix Raw NAND Controller Device Tree binding to DT Schema.

Signed-off-by: Akhila YS <akhilayalmati@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

authored by

Akhila YS and committed by
Miquel Raynal
bcf8e207 7cce81df

+78 -36
+78
Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + 3 + %YAML 1.2 4 + --- 5 + $id: http://devicetree.org/schemas/mtd/mxic,multi-itfc-v009-nand-controller.yaml# 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 + 8 + title: Macronix Raw NAND Controller 9 + 10 + maintainers: 11 + - Mason Yang <masonccyang@mxic.com.tw> 12 + 13 + description: 14 + The Macronix Multi-Interface Raw NAND Controller is a versatile flash 15 + memory controller for embedding in SoCs, capable of interfacing with 16 + various NAND devices. It requires dedicated clock inputs for core, data 17 + transmit, and delayed transmit paths along with register space and an 18 + interrupt line for operation. 19 + 20 + allOf: 21 + - $ref: nand-controller.yaml# 22 + 23 + properties: 24 + compatible: 25 + const: mxic,multi-itfc-v009-nand-controller 26 + 27 + reg: 28 + maxItems: 1 29 + 30 + interrupts: 31 + maxItems: 1 32 + 33 + "#address-cells": 34 + const: 1 35 + 36 + "#size-cells": 37 + const: 0 38 + 39 + clocks: 40 + minItems: 3 41 + maxItems: 3 42 + 43 + clock-names: 44 + items: 45 + - const: ps 46 + - const: send 47 + - const: send_dly 48 + 49 + required: 50 + - compatible 51 + - reg 52 + - interrupts 53 + - "#address-cells" 54 + - "#size-cells" 55 + - clocks 56 + - clock-names 57 + 58 + unevaluatedProperties: false 59 + 60 + examples: 61 + - | 62 + #include <dt-bindings/interrupt-controller/arm-gic.h> 63 + nand-controller@43c30000 { 64 + compatible = "mxic,multi-itfc-v009-nand-controller"; 65 + reg = <0x43c30000 0x10000>; 66 + #address-cells = <1>; 67 + #size-cells = <0>; 68 + interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>; 69 + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; 70 + clock-names = "ps", "send", "send_dly"; 71 + 72 + nand@0 { 73 + reg = <0>; 74 + nand-ecc-mode = "soft"; 75 + nand-ecc-algo = "bch"; 76 + }; 77 + }; 78 + ...
-36
Documentation/devicetree/bindings/mtd/mxic-nand.txt
··· 1 - Macronix Raw NAND Controller Device Tree Bindings 2 - ------------------------------------------------- 3 - 4 - Required properties: 5 - - compatible: should be "mxic,multi-itfc-v009-nand-controller" 6 - - reg: should contain 1 entry for the registers 7 - - #address-cells: should be set to 1 8 - - #size-cells: should be set to 0 9 - - interrupts: interrupt line connected to this raw NAND controller 10 - - clock-names: should contain "ps", "send" and "send_dly" 11 - - clocks: should contain 3 phandles for the "ps", "send" and 12 - "send_dly" clocks 13 - 14 - Children nodes: 15 - - children nodes represent the available NAND chips. 16 - 17 - See Documentation/devicetree/bindings/mtd/nand-controller.yaml 18 - for more details on generic bindings. 19 - 20 - Example: 21 - 22 - nand: nand-controller@43c30000 { 23 - compatible = "mxic,multi-itfc-v009-nand-controller"; 24 - reg = <0x43c30000 0x10000>; 25 - #address-cells = <1>; 26 - #size-cells = <0>; 27 - interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>; 28 - clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; 29 - clock-names = "send", "send_dly", "ps"; 30 - 31 - nand@0 { 32 - reg = <0>; 33 - nand-ecc-mode = "soft"; 34 - nand-ecc-algo = "bch"; 35 - }; 36 - };