net: pcs: pcs-mtk-lynxi: pass SGMIISYS OF node to PCS

The Mediatek LynxI PCS is used from the MT7530 DSA driver (where it does
not have an OF presence) and from mtk_eth_soc, where it does
(Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml
informs of a combined clock provider + SGMII PCS "SGMIISYS" syscon
block).

Currently, mtk_eth_soc parses the SGMIISYS OF node for the
"mediatek,pnswap" property and sets a bit in the "flags" argument of
mtk_pcs_lynxi_create() if set.

I'd like to deprecate "mediatek,pnswap" in favour of a property which
takes the current phy-mode into consideration. But this is only known at
mtk_pcs_lynxi_config() time, and not known at mtk_pcs_lynxi_create(),
when the SGMIISYS OF node is parsed.

To achieve that, we must pass the OF node of the PCS, if it exists, to
mtk_pcs_lynxi_create(), and let the PCS take a reference on it and
handle property parsing whenever it wants.

Use the fwnode API which is more general than OF (in case we ever need
to describe the PCS using some other format). This API should be NULL
tolerant, so add no particular tests for the mt7530 case.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://patch.msgid.link/20260119091220.1493761-5-vladimir.oltean@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Vladimir Oltean and committed by

Jakub Kicinski 3 months ago bde1ae2d 9f841922

+22 -21

4 changed files

expand all

drivers

net

dsa

mt7530-mdio.c

ethernet

mediatek

mtk_eth_soc.c

pcs

pcs-mtk-lynxi.c

include

linux

pcs

pcs-mtk-lynxi.h

+2 -2

drivers/net/dsa/mt7530-mdio.c

··· 113 113 ret = PTR_ERR(regmap); 114 114 break; 115 115 } 116 - pcs = mtk_pcs_lynxi_create(priv->dev, regmap, 117 - MT7531_PHYA_CTRL_SIGNAL3, 0); 116 + pcs = mtk_pcs_lynxi_create(priv->dev, NULL, regmap, 117 + MT7531_PHYA_CTRL_SIGNAL3); 118 118 if (!pcs) { 119 119 ret = -ENXIO; 120 120 break;

+8 -11

drivers/net/ethernet/mediatek/mtk_eth_soc.c

··· 4994 4994 { 4995 4995 struct device_node *np; 4996 4996 struct regmap *regmap; 4997 - u32 flags; 4998 4997 int i; 4999 4998 5000 4999 for (i = 0; i < MTK_MAX_DEVS; i++) { ··· 5002 5003 break; 5003 5004 5004 5005 regmap = syscon_node_to_regmap(np); 5005 - flags = 0; 5006 - if (of_property_read_bool(np, "mediatek,pnswap")) 5007 - flags |= MTK_SGMII_FLAG_PN_SWAP; 5008 - 5009 - of_node_put(np); 5010 - 5011 - if (IS_ERR(regmap)) 5006 + if (IS_ERR(regmap)) { 5007 + of_node_put(np); 5012 5008 return PTR_ERR(regmap); 5009 + } 5013 5010 5014 - eth->sgmii_pcs[i] = mtk_pcs_lynxi_create(eth->dev, regmap, 5015 - eth->soc->ana_rgc3, 5016 - flags); 5011 + eth->sgmii_pcs[i] = mtk_pcs_lynxi_create(eth->dev, 5012 + of_fwnode_handle(np), 5013 + regmap, 5014 + eth->soc->ana_rgc3); 5015 + of_node_put(np); 5017 5016 } 5018 5017 5019 5018 return 0;

+10 -5

drivers/net/pcs/pcs-mtk-lynxi.c

··· 81 81 phy_interface_t interface; 82 82 struct phylink_pcs pcs; 83 83 u32 flags; 84 + struct fwnode_handle *fwnode; 84 85 }; 85 86 86 87 static struct mtk_pcs_lynxi *pcs_to_mtk_pcs_lynxi(struct phylink_pcs *pcs) ··· 169 168 regmap_set_bits(mpcs->regmap, SGMSYS_RESERVED_0, 170 169 SGMII_SW_RESET); 171 170 172 - if (mpcs->flags & MTK_SGMII_FLAG_PN_SWAP) 171 + if (fwnode_property_read_bool(mpcs->fwnode, "mediatek,pnswap")) 173 172 regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_WRAP_CTRL, 174 173 SGMII_PN_SWAP_MASK, 175 174 SGMII_PN_SWAP_TX_RX); ··· 269 268 }; 270 269 271 270 struct phylink_pcs *mtk_pcs_lynxi_create(struct device *dev, 272 - struct regmap *regmap, u32 ana_rgc3, 273 - u32 flags) 271 + struct fwnode_handle *fwnode, 272 + struct regmap *regmap, u32 ana_rgc3) 274 273 { 275 274 struct mtk_pcs_lynxi *mpcs; 276 275 u32 id, ver; ··· 304 303 305 304 mpcs->ana_rgc3 = ana_rgc3; 306 305 mpcs->regmap = regmap; 307 - mpcs->flags = flags; 308 306 mpcs->pcs.ops = &mtk_pcs_lynxi_ops; 309 307 mpcs->pcs.poll = true; 310 308 mpcs->interface = PHY_INTERFACE_MODE_NA; 309 + mpcs->fwnode = fwnode_handle_get(fwnode); 311 310 312 311 __set_bit(PHY_INTERFACE_MODE_SGMII, mpcs->pcs.supported_interfaces); 313 312 __set_bit(PHY_INTERFACE_MODE_1000BASEX, mpcs->pcs.supported_interfaces); ··· 319 318 320 319 void mtk_pcs_lynxi_destroy(struct phylink_pcs *pcs) 321 320 { 321 + struct mtk_pcs_lynxi *mpcs; 322 + 322 323 if (!pcs) 323 324 return; 324 325 325 - kfree(pcs_to_mtk_pcs_lynxi(pcs)); 326 + mpcs = pcs_to_mtk_pcs_lynxi(pcs); 327 + fwnode_handle_put(mpcs->fwnode); 328 + kfree(mpcs); 326 329 } 327 330 EXPORT_SYMBOL(mtk_pcs_lynxi_destroy); 328 331

+2 -3

include/linux/pcs/pcs-mtk-lynxi.h

··· 5 5 #include <linux/phylink.h> 6 6 #include <linux/regmap.h> 7 7 8 - #define MTK_SGMII_FLAG_PN_SWAP BIT(0) 9 8 struct phylink_pcs *mtk_pcs_lynxi_create(struct device *dev, 10 - struct regmap *regmap, 11 - u32 ana_rgc3, u32 flags); 9 + struct fwnode_handle *fwnode, 10 + struct regmap *regmap, u32 ana_rgc3); 12 11 void mtk_pcs_lynxi_destroy(struct phylink_pcs *pcs); 13 12 #endif

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