soc/tegra: fuse: Use platform info with SoC revision

Tegra pre-silicon platforms do not have chip revisions. This makes the
revision SoC attribute meaningless on these platforms.

Instead, populate the revision SoC attribute with a combination of the
platform name and the chip revision for silicon platforms, and simply
with the platform name on pre-silicon platforms.

Signed-off-by: Kartik <kkartik@nvidia.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

authored by

Kartik and committed by

Thierry Reding 3 years ago bebf683b 0474cc84

+36 -2

3 changed files

expand all

drivers

soc

tegra

fuse

fuse-tegra.c

tegra-apbmisc.c

include

soc

tegra

fuse.h

+20 -2

drivers/soc/tegra/fuse/fuse-tegra.c

··· 35 35 [TEGRA_REVISION_A04] = "A04", 36 36 }; 37 37 38 + static const char *tegra_platform_name[TEGRA_PLATFORM_MAX] = { 39 + [TEGRA_PLATFORM_SILICON] = "Silicon", 40 + [TEGRA_PLATFORM_QT] = "QT", 41 + [TEGRA_PLATFORM_SYSTEM_FPGA] = "System FPGA", 42 + [TEGRA_PLATFORM_UNIT_FPGA] = "Unit FPGA", 43 + [TEGRA_PLATFORM_ASIM_QT] = "Asim QT", 44 + [TEGRA_PLATFORM_ASIM_LINSIM] = "Asim Linsim", 45 + [TEGRA_PLATFORM_DSIM_ASIM_LINSIM] = "Dsim Asim Linsim", 46 + [TEGRA_PLATFORM_VERIFICATION_SIMULATION] = "Verification Simulation", 47 + [TEGRA_PLATFORM_VDK] = "VDK", 48 + [TEGRA_PLATFORM_VSP] = "VSP", 49 + }; 50 + 38 51 static const struct of_device_id car_match[] __initconst = { 39 52 { .compatible = "nvidia,tegra20-car", }, 40 53 { .compatible = "nvidia,tegra30-car", }, ··· 383 370 return NULL; 384 371 385 372 attr->family = kasprintf(GFP_KERNEL, "Tegra"); 386 - attr->revision = kasprintf(GFP_KERNEL, "%s", 387 - tegra_revision_name[tegra_sku_info.revision]); 373 + if (tegra_is_silicon()) 374 + attr->revision = kasprintf(GFP_KERNEL, "%s %s", 375 + tegra_platform_name[tegra_sku_info.platform], 376 + tegra_revision_name[tegra_sku_info.revision]); 377 + else 378 + attr->revision = kasprintf(GFP_KERNEL, "%s", 379 + tegra_platform_name[tegra_sku_info.platform]); 388 380 attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id()); 389 381 attr->custom_attr_group = fuse->soc->soc_attr_group; 390 382

drivers/soc/tegra/fuse/tegra-apbmisc.c

··· 156 156 } 157 157 158 158 tegra_sku_info.sku_id = tegra_fuse_read_early(FUSE_SKU_INFO); 159 + tegra_sku_info.platform = tegra_get_platform(); 159 160 } 160 161 161 162 void __init tegra_init_apbmisc(void)

+15

include/soc/tegra/fuse.h

··· 34 34 TEGRA_REVISION_MAX, 35 35 }; 36 36 37 + enum tegra_platform { 38 + TEGRA_PLATFORM_SILICON = 0, 39 + TEGRA_PLATFORM_QT, 40 + TEGRA_PLATFORM_SYSTEM_FPGA, 41 + TEGRA_PLATFORM_UNIT_FPGA, 42 + TEGRA_PLATFORM_ASIM_QT, 43 + TEGRA_PLATFORM_ASIM_LINSIM, 44 + TEGRA_PLATFORM_DSIM_ASIM_LINSIM, 45 + TEGRA_PLATFORM_VERIFICATION_SIMULATION, 46 + TEGRA_PLATFORM_VDK, 47 + TEGRA_PLATFORM_VSP, 48 + TEGRA_PLATFORM_MAX, 49 + }; 50 + 37 51 struct tegra_sku_info { 38 52 int sku_id; 39 53 int cpu_process_id; ··· 61 47 int gpu_speedo_id; 62 48 int gpu_speedo_value; 63 49 enum tegra_revision revision; 50 + enum tegra_platform platform; 64 51 }; 65 52 66 53 #ifdef CONFIG_ARCH_TEGRA

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