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net: phy: aquantia: clear PMD Global Transmit Disable bit during init

PMD Global Transmit Disable bit should be cleared for normal operation.
This should be HW default, however I found that on Asus RT-AX89X that uses
AQR113C PHY and firmware 5.4 this bit is set by default.

With this bit set the AQR cannot achieve a link with its link-partner and
it took me multiple hours of digging through the vendor GPL source to find
this out, so lets always clear this bit during .config_init() to avoid a
situation like this in the future.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20240211181732.646311-1-robimarko@gmail.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

authored by

Robert Marko and committed by
Paolo Abeni
bed90b06 32c7eec2

+9
+9
drivers/net/phy/aquantia/aquantia_main.c
··· 727 727 if (ret < 0) 728 728 return ret; 729 729 730 + ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, 731 + MDIO_PMD_TXDIS_GLOBAL); 732 + if (ret) 733 + return ret; 734 + 735 + ret = aqr107_wait_processor_intensive_op(phydev); 736 + if (ret) 737 + return ret; 738 + 730 739 return aqr107_fill_interface_modes(phydev); 731 740 } 732 741