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x86/xen: mark boot CPU of PV guest in MSR_IA32_APICBASE

Recent topology checks of the x86 boot code uncovered the need for
PV guests to have the boot cpu marked in the APICBASE MSR.

Fixes: 9d22c96316ac ("x86/topology: Handle bogus ACPI tables correctly")
Reported-by: Niels Dettenbach <nd@syndicat.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Juergen Gross <jgross@suse.com>

+4
+4
arch/x86/xen/enlighten_pv.c
··· 1032 1032 switch (msr) { 1033 1033 case MSR_IA32_APICBASE: 1034 1034 val &= ~X2APIC_ENABLE; 1035 + if (smp_processor_id() == 0) 1036 + val |= MSR_IA32_APICBASE_BSP; 1037 + else 1038 + val &= ~MSR_IA32_APICBASE_BSP; 1035 1039 break; 1036 1040 } 1037 1041 return val;