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drm/amd/display: Fix performance regression from full updates

[Why]
full_update_required is too strict at update_planes_and_stream_state,
causing a performance regression due to too many updates being full.

[How]
* Carve out weak version of full_update_required for use inside
update_planes_and_stream_state.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Dominik Kaszewski and committed by
Alex Deucher
bf95cf7f 03a593b1

+34 -20
+34 -20
drivers/gpu/drm/amd/display/dc/core/dc.c
··· 3419 3419 } 3420 3420 } 3421 3421 3422 - static bool full_update_required(struct dc *dc, 3422 + static bool full_update_required_weak(struct dc *dc, 3423 3423 struct dc_surface_update *srf_updates, 3424 3424 int surface_count, 3425 3425 struct dc_stream_update *stream_update, ··· 3472 3472 context = dc->current_state; 3473 3473 update_type = dc_check_update_surfaces_for_stream( 3474 3474 dc, srf_updates, surface_count, stream_update, stream_status); 3475 - if (full_update_required(dc, srf_updates, surface_count, stream_update, stream)) 3475 + 3476 + if (full_update_required_weak(dc, srf_updates, surface_count, stream_update, stream)) 3476 3477 update_type = UPDATE_TYPE_FULL; 3478 + 3477 3479 /* It is possible to receive a flip for one plane while there are multiple flip_immediate planes in the same stream. 3478 3480 * E.g. Desktop and MPO plane are flip_immediate but only the MPO plane received a flip 3479 3481 * Force the other flip_immediate planes to flip so GSL doesn't wait for a flip that won't come. ··· 5049 5047 return false; 5050 5048 } 5051 5049 5050 + static bool full_update_required_weak(struct dc *dc, 5051 + struct dc_surface_update *srf_updates, 5052 + int surface_count, 5053 + struct dc_stream_update *stream_update, 5054 + struct dc_stream_state *stream) 5055 + { 5056 + const struct dc_state *context = dc->current_state; 5057 + if (srf_updates) 5058 + for (int i = 0; i < surface_count; i++) 5059 + if (!is_surface_in_context(context, srf_updates[i].surface)) 5060 + return true; 5061 + 5062 + if (stream) { 5063 + const struct dc_stream_status *stream_status = dc_stream_get_status(stream); 5064 + if (stream_status == NULL || stream_status->plane_count != surface_count) 5065 + return true; 5066 + } 5067 + if (dc->idle_optimizations_allowed) 5068 + return true; 5069 + 5070 + if (dc_can_clear_cursor_limit(dc)) 5071 + return true; 5072 + 5073 + return false; 5074 + } 5075 + 5052 5076 static bool full_update_required(struct dc *dc, 5053 5077 struct dc_surface_update *srf_updates, 5054 5078 int surface_count, 5055 5079 struct dc_stream_update *stream_update, 5056 5080 struct dc_stream_state *stream) 5057 5081 { 5082 + if (full_update_required_weak(dc, srf_updates, surface_count, stream_update, stream)) 5083 + return true; 5058 5084 5059 - int i; 5060 - struct dc_stream_status *stream_status; 5061 - const struct dc_state *context = dc->current_state; 5062 - 5063 - for (i = 0; i < surface_count; i++) { 5085 + for (int i = 0; i < surface_count; i++) { 5064 5086 if (srf_updates && 5065 5087 (srf_updates[i].plane_info || 5066 5088 srf_updates[i].scaling_info || ··· 5100 5074 srf_updates[i].flip_addr->address.tmz_surface != srf_updates[i].surface->address.tmz_surface) || 5101 5075 (srf_updates[i].cm2_params && 5102 5076 (srf_updates[i].cm2_params->component_settings.shaper_3dlut_setting != srf_updates[i].surface->mcm_shaper_3dlut_setting || 5103 - srf_updates[i].cm2_params->component_settings.lut1d_enable != srf_updates[i].surface->mcm_lut1d_enable)) || 5104 - !is_surface_in_context(context, srf_updates[i].surface))) 5077 + srf_updates[i].cm2_params->component_settings.lut1d_enable != srf_updates[i].surface->mcm_lut1d_enable)))) 5105 5078 return true; 5106 5079 } 5107 5080 ··· 5134 5109 stream_update->crtc_timing_adjust || 5135 5110 stream_update->scaler_sharpener_update || 5136 5111 stream_update->hw_cursor_req)) 5137 - return true; 5138 - 5139 - if (stream) { 5140 - stream_status = dc_stream_get_status(stream); 5141 - if (stream_status == NULL || stream_status->plane_count != surface_count) 5142 - return true; 5143 - } 5144 - if (dc->idle_optimizations_allowed) 5145 - return true; 5146 - 5147 - if (dc_can_clear_cursor_limit(dc)) 5148 5112 return true; 5149 5113 5150 5114 return false;