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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amd/display: Add check for vrr_active_fixed

Why:
vrr_active_fixed should also be checked when
determining if DRR is in use

How:
Add check for vrr_active_fixed when allow_freesync
and vrr_active_variable are also checked

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Austin Zheng <austin.zheng@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Austin Zheng and committed by
Alex Deucher c06ef68a 9aa75e3b

+5 -5
+2 -2
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
··· 554 554 vblank_pipe->stream->timing.v_total - vblank_pipe->stream->timing.v_front_porch - vblank_pipe->stream->timing.v_addressable; 555 555 556 556 if (vblank_pipe->stream->ignore_msa_timing_param && 557 - (vblank_pipe->stream->allow_freesync || vblank_pipe->stream->vrr_active_variable)) 557 + (vblank_pipe->stream->allow_freesync || vblank_pipe->stream->vrr_active_variable || vblank_pipe->stream->vrr_active_fixed)) 558 558 populate_subvp_cmd_drr_info(dc, pipe, vblank_pipe, pipe_data); 559 559 } 560 560 ··· 648 648 pipe_data->pipe_config.subvp_data.mall_region_lines = phantom_timing->v_addressable; 649 649 pipe_data->pipe_config.subvp_data.main_pipe_index = subvp_pipe->stream_res.tg->inst; 650 650 pipe_data->pipe_config.subvp_data.is_drr = subvp_pipe->stream->ignore_msa_timing_param && 651 - (subvp_pipe->stream->allow_freesync || subvp_pipe->stream->vrr_active_variable); 651 + (subvp_pipe->stream->allow_freesync || subvp_pipe->stream->vrr_active_variable || subvp_pipe->stream->vrr_active_fixed); 652 652 653 653 /* Calculate the scaling factor from the src and dst height. 654 654 * e.g. If 3840x2160 being downscaled to 1920x1080, the scaling factor is 1/2.
+2 -2
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
··· 706 706 non_subvp_pipes++; 707 707 drr_psr_capable = (drr_psr_capable || dcn32_is_psr_capable(pipe)); 708 708 if (pipe->stream->ignore_msa_timing_param && 709 - (pipe->stream->allow_freesync || pipe->stream->vrr_active_variable)) { 709 + (pipe->stream->allow_freesync || pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) { 710 710 drr_pipe_found = true; 711 711 } 712 712 } ··· 764 764 non_subvp_pipes++; 765 765 vblank_psr_capable = (vblank_psr_capable || dcn32_is_psr_capable(pipe)); 766 766 if (pipe->stream->ignore_msa_timing_param && 767 - (pipe->stream->allow_freesync || pipe->stream->vrr_active_variable)) { 767 + (pipe->stream->allow_freesync || pipe->stream->vrr_active_variable || pipe->stream->vrr_active_fixed)) { 768 768 drr_pipe_found = true; 769 769 } 770 770 }
+1 -1
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
··· 822 822 continue; 823 823 824 824 if (drr_pipe->stream->mall_stream_config.type == SUBVP_NONE && drr_pipe->stream->ignore_msa_timing_param && 825 - (drr_pipe->stream->allow_freesync || drr_pipe->stream->vrr_active_variable)) 825 + (drr_pipe->stream->allow_freesync || drr_pipe->stream->vrr_active_variable || drr_pipe->stream->vrr_active_fixed)) 826 826 break; 827 827 } 828 828