char/mwave: drop it · tjh.dev/kernel@c0fef45

+1 -1

Documentation/admin-guide/devices.txt

··· 352 352 216 = /dev/fujitsu/apanel Fujitsu/Siemens application panel 353 353 217 = /dev/ni/natmotn National Instruments Motion 354 354 218 = /dev/kchuid Inter-process chuid control 355 - 219 = /dev/modems/mwave MWave modem firmware upload 355 + 219 = 356 356 220 = /dev/mptctl Message passing technology (MPT) control 357 357 221 = /dev/mvista/hssdsi Montavista PICMG hot swap system driver 358 358 222 = /dev/mvista/hasi Montavista PICMG high availability

-1

Documentation/userspace-api/ioctl/ioctl-number.rst

··· 397 397 0xCD 01 linux/reiserfs_fs.h Dead since 6.13 398 398 0xCE 01-02 uapi/linux/cxl_mem.h Compute Express Link Memory Devices 399 399 0xCF 02 fs/smb/client/cifs_ioctl.h 400 - 0xDB 00-0F drivers/char/mwave/mwavepub.h 401 400 0xDD 00-3F ZFCP device driver see drivers/s390/scsi/ 402 401 <mailto:aherrman@de.ibm.com> 403 402 0xE5 00-3F linux/fuse.h

-26

drivers/char/Kconfig

··· 249 249 To compile this driver as a module, choose M here: the 250 250 module will be called sonypi. 251 251 252 - config MWAVE 253 - tristate "ACP Modem (Mwave) support" 254 - depends on X86 && TTY 255 - select SERIAL_8250 256 - help 257 - The ACP modem (Mwave) for Linux is a WinModem. It is composed of a 258 - kernel driver and a user level application. Together these components 259 - support direct attachment to public switched telephone networks (PSTNs) 260 - and support selected world wide countries. 261 - 262 - This version of the ACP Modem driver supports the IBM Thinkpad 600E, 263 - 600, and 770 that include on board ACP modem hardware. 264 - 265 - The modem also supports the standard communications port interface 266 - (ttySx) and is compatible with the Hayes AT Command Set. 267 - 268 - The user level application needed to use this driver can be found at 269 - the IBM Linux Technology Center (LTC) web site: 270 - <http://www.ibm.com/linux/ltc/>. 271 - 272 - If you own one of the above IBM Thinkpads which has the Mwave chipset 273 - in it, say Y. 274 - 275 - To compile this driver as a module, choose M here: the 276 - module will be called mwave. 277 - 278 252 config SCx200_GPIO 279 253 tristate "NatSemi SCx200 GPIO Support" 280 254 depends on SCx200

-1

drivers/char/Makefile

··· 33 33 obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o 34 34 obj-$(CONFIG_TELCLOCK) += tlclk.o 35 35 36 - obj-$(CONFIG_MWAVE) += mwave/ 37 36 obj-y += agp/ 38 37 39 38 obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o

-536

drivers/char/mwave/3780i.c

··· 1 - /* 2 - * 3 - * 3780i.c -- helper routines for the 3780i DSP 4 - * 5 - * 6 - * Written By: Mike Sullivan IBM Corporation 7 - * 8 - * Copyright (C) 1999 IBM Corporation 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * NO WARRANTY 21 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 - * solely responsible for determining the appropriateness of using and 26 - * distributing the Program and assumes all risks associated with its 27 - * exercise of rights under this Agreement, including but not limited to 28 - * the risks and costs of program errors, damage to or loss of data, 29 - * programs or equipment, and unavailability or interruption of operations. 30 - * 31 - * DISCLAIMER OF LIABILITY 32 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 - * 40 - * You should have received a copy of the GNU General Public License 41 - * along with this program; if not, write to the Free Software 42 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 43 - * 44 - * 45 - * 10/23/2000 - Alpha Release 46 - * First release to the public 47 - */ 48 - 49 - #define pr_fmt(fmt) "3780i: " fmt 50 - 51 - #include <linux/kernel.h> 52 - #include <linux/unistd.h> 53 - #include <linux/delay.h> 54 - #include <linux/ioport.h> 55 - #include <linux/bitops.h> 56 - #include <linux/sched.h> /* cond_resched() */ 57 - 58 - #include <asm/io.h> 59 - #include <linux/uaccess.h> 60 - #include <asm/irq.h> 61 - #include "smapi.h" 62 - #include "mwavedd.h" 63 - #include "3780i.h" 64 - 65 - static DEFINE_SPINLOCK(dsp_lock); 66 - 67 - static void PaceMsaAccess(unsigned short usDspBaseIO) 68 - { 69 - cond_resched(); 70 - udelay(100); 71 - cond_resched(); 72 - } 73 - 74 - unsigned short dsp3780I_ReadMsaCfg(unsigned short usDspBaseIO, 75 - unsigned long ulMsaAddr) 76 - { 77 - unsigned long flags; 78 - unsigned short val; 79 - 80 - spin_lock_irqsave(&dsp_lock, flags); 81 - OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulMsaAddr); 82 - OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulMsaAddr >> 16)); 83 - val = InWordDsp(DSP_MsaDataDSISHigh); 84 - spin_unlock_irqrestore(&dsp_lock, flags); 85 - 86 - return val; 87 - } 88 - 89 - void dsp3780I_WriteMsaCfg(unsigned short usDspBaseIO, 90 - unsigned long ulMsaAddr, unsigned short usValue) 91 - { 92 - unsigned long flags; 93 - 94 - spin_lock_irqsave(&dsp_lock, flags); 95 - OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulMsaAddr); 96 - OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulMsaAddr >> 16)); 97 - OutWordDsp(DSP_MsaDataDSISHigh, usValue); 98 - spin_unlock_irqrestore(&dsp_lock, flags); 99 - } 100 - 101 - static void dsp3780I_WriteGenCfg(unsigned short usDspBaseIO, unsigned uIndex, 102 - unsigned char ucValue) 103 - { 104 - DSP_ISA_SLAVE_CONTROL rSlaveControl; 105 - DSP_ISA_SLAVE_CONTROL rSlaveControl_Save; 106 - 107 - MKBYTE(rSlaveControl) = InByteDsp(DSP_IsaSlaveControl); 108 - 109 - rSlaveControl_Save = rSlaveControl; 110 - rSlaveControl.ConfigMode = true; 111 - 112 - OutByteDsp(DSP_IsaSlaveControl, MKBYTE(rSlaveControl)); 113 - OutByteDsp(DSP_ConfigAddress, (unsigned char) uIndex); 114 - OutByteDsp(DSP_ConfigData, ucValue); 115 - OutByteDsp(DSP_IsaSlaveControl, MKBYTE(rSlaveControl_Save)); 116 - } 117 - 118 - int dsp3780I_EnableDSP(struct dsp_3780i_config_settings *pSettings, 119 - unsigned short *pIrqMap, 120 - unsigned short *pDmaMap) 121 - { 122 - unsigned long flags; 123 - unsigned short usDspBaseIO = pSettings->usDspBaseIO; 124 - int i; 125 - DSP_UART_CFG_1 rUartCfg1; 126 - DSP_UART_CFG_2 rUartCfg2; 127 - DSP_HBRIDGE_CFG_1 rHBridgeCfg1; 128 - DSP_HBRIDGE_CFG_2 rHBridgeCfg2; 129 - DSP_BUSMASTER_CFG_1 rBusmasterCfg1; 130 - DSP_BUSMASTER_CFG_2 rBusmasterCfg2; 131 - DSP_ISA_PROT_CFG rIsaProtCfg; 132 - DSP_POWER_MGMT_CFG rPowerMgmtCfg; 133 - DSP_HBUS_TIMER_CFG rHBusTimerCfg; 134 - DSP_LBUS_TIMEOUT_DISABLE rLBusTimeoutDisable; 135 - DSP_CHIP_RESET rChipReset; 136 - DSP_CLOCK_CONTROL_1 rClockControl1; 137 - DSP_CLOCK_CONTROL_2 rClockControl2; 138 - DSP_ISA_SLAVE_CONTROL rSlaveControl; 139 - DSP_HBRIDGE_CONTROL rHBridgeControl; 140 - unsigned short tval; 141 - 142 - if (!pSettings->bDSPEnabled) { 143 - pr_err("%s: Error: DSP not enabled. Aborting.\n", __func__); 144 - return -EIO; 145 - } 146 - 147 - if (pSettings->bModemEnabled) { 148 - rUartCfg1.Reserved = rUartCfg2.Reserved = 0; 149 - rUartCfg1.IrqActiveLow = pSettings->bUartIrqActiveLow; 150 - rUartCfg1.IrqPulse = pSettings->bUartIrqPulse; 151 - rUartCfg1.Irq = 152 - (unsigned char) pIrqMap[pSettings->usUartIrq]; 153 - switch (pSettings->usUartBaseIO) { 154 - case 0x03F8: 155 - rUartCfg1.BaseIO = 0; 156 - break; 157 - case 0x02F8: 158 - rUartCfg1.BaseIO = 1; 159 - break; 160 - case 0x03E8: 161 - rUartCfg1.BaseIO = 2; 162 - break; 163 - case 0x02E8: 164 - rUartCfg1.BaseIO = 3; 165 - break; 166 - } 167 - rUartCfg2.Enable = true; 168 - } 169 - 170 - rHBridgeCfg1.Reserved = rHBridgeCfg2.Reserved = 0; 171 - rHBridgeCfg1.IrqActiveLow = pSettings->bDspIrqActiveLow; 172 - rHBridgeCfg1.IrqPulse = pSettings->bDspIrqPulse; 173 - rHBridgeCfg1.Irq = (unsigned char) pIrqMap[pSettings->usDspIrq]; 174 - rHBridgeCfg1.AccessMode = 1; 175 - rHBridgeCfg2.Enable = true; 176 - 177 - 178 - rBusmasterCfg2.Reserved = 0; 179 - rBusmasterCfg1.Dma = (unsigned char) pDmaMap[pSettings->usDspDma]; 180 - rBusmasterCfg1.NumTransfers = 181 - (unsigned char) pSettings->usNumTransfers; 182 - rBusmasterCfg1.ReRequest = (unsigned char) pSettings->usReRequest; 183 - rBusmasterCfg1.MEMCS16 = pSettings->bEnableMEMCS16; 184 - rBusmasterCfg2.IsaMemCmdWidth = 185 - (unsigned char) pSettings->usIsaMemCmdWidth; 186 - 187 - 188 - rIsaProtCfg.Reserved = 0; 189 - rIsaProtCfg.GateIOCHRDY = pSettings->bGateIOCHRDY; 190 - 191 - rPowerMgmtCfg.Reserved = 0; 192 - rPowerMgmtCfg.Enable = pSettings->bEnablePwrMgmt; 193 - 194 - rHBusTimerCfg.LoadValue = 195 - (unsigned char) pSettings->usHBusTimerLoadValue; 196 - 197 - rLBusTimeoutDisable.Reserved = 0; 198 - rLBusTimeoutDisable.DisableTimeout = 199 - pSettings->bDisableLBusTimeout; 200 - 201 - MKWORD(rChipReset) = ~pSettings->usChipletEnable; 202 - 203 - rClockControl1.Reserved1 = rClockControl1.Reserved2 = 0; 204 - rClockControl1.N_Divisor = pSettings->usN_Divisor; 205 - rClockControl1.M_Multiplier = pSettings->usM_Multiplier; 206 - 207 - rClockControl2.Reserved = 0; 208 - rClockControl2.PllBypass = pSettings->bPllBypass; 209 - 210 - /* Issue a soft reset to the chip */ 211 - /* Note: Since we may be coming in with 3780i clocks suspended, we must keep 212 - * soft-reset active for 10ms. 213 - */ 214 - rSlaveControl.ClockControl = 0; 215 - rSlaveControl.SoftReset = true; 216 - rSlaveControl.ConfigMode = false; 217 - rSlaveControl.Reserved = 0; 218 - 219 - spin_lock_irqsave(&dsp_lock, flags); 220 - OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl)); 221 - MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl); 222 - 223 - for (i = 0; i < 11; i++) 224 - udelay(2000); 225 - 226 - rSlaveControl.SoftReset = false; 227 - OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl)); 228 - 229 - MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl); 230 - 231 - /* Program our general configuration registers */ 232 - WriteGenCfg(DSP_HBridgeCfg1Index, MKBYTE(rHBridgeCfg1)); 233 - WriteGenCfg(DSP_HBridgeCfg2Index, MKBYTE(rHBridgeCfg2)); 234 - WriteGenCfg(DSP_BusMasterCfg1Index, MKBYTE(rBusmasterCfg1)); 235 - WriteGenCfg(DSP_BusMasterCfg2Index, MKBYTE(rBusmasterCfg2)); 236 - WriteGenCfg(DSP_IsaProtCfgIndex, MKBYTE(rIsaProtCfg)); 237 - WriteGenCfg(DSP_PowerMgCfgIndex, MKBYTE(rPowerMgmtCfg)); 238 - WriteGenCfg(DSP_HBusTimerCfgIndex, MKBYTE(rHBusTimerCfg)); 239 - 240 - if (pSettings->bModemEnabled) { 241 - WriteGenCfg(DSP_UartCfg1Index, MKBYTE(rUartCfg1)); 242 - WriteGenCfg(DSP_UartCfg2Index, MKBYTE(rUartCfg2)); 243 - } 244 - 245 - 246 - rHBridgeControl.EnableDspInt = false; 247 - rHBridgeControl.MemAutoInc = true; 248 - rHBridgeControl.IoAutoInc = false; 249 - rHBridgeControl.DiagnosticMode = false; 250 - 251 - OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl)); 252 - spin_unlock_irqrestore(&dsp_lock, flags); 253 - WriteMsaCfg(DSP_LBusTimeoutDisable, MKWORD(rLBusTimeoutDisable)); 254 - WriteMsaCfg(DSP_ClockControl_1, MKWORD(rClockControl1)); 255 - WriteMsaCfg(DSP_ClockControl_2, MKWORD(rClockControl2)); 256 - WriteMsaCfg(DSP_ChipReset, MKWORD(rChipReset)); 257 - 258 - ReadMsaCfg(DSP_ChipID); 259 - 260 - return 0; 261 - } 262 - 263 - int dsp3780I_DisableDSP(struct dsp_3780i_config_settings *pSettings) 264 - { 265 - unsigned long flags; 266 - unsigned short usDspBaseIO = pSettings->usDspBaseIO; 267 - DSP_ISA_SLAVE_CONTROL rSlaveControl; 268 - 269 - rSlaveControl.ClockControl = 0; 270 - rSlaveControl.SoftReset = true; 271 - rSlaveControl.ConfigMode = false; 272 - rSlaveControl.Reserved = 0; 273 - spin_lock_irqsave(&dsp_lock, flags); 274 - OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl)); 275 - 276 - udelay(5); 277 - 278 - rSlaveControl.ClockControl = 1; 279 - OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl)); 280 - spin_unlock_irqrestore(&dsp_lock, flags); 281 - 282 - udelay(5); 283 - 284 - return 0; 285 - } 286 - 287 - int dsp3780I_Reset(struct dsp_3780i_config_settings *pSettings) 288 - { 289 - unsigned long flags; 290 - unsigned short usDspBaseIO = pSettings->usDspBaseIO; 291 - DSP_BOOT_DOMAIN rBootDomain; 292 - DSP_HBRIDGE_CONTROL rHBridgeControl; 293 - 294 - spin_lock_irqsave(&dsp_lock, flags); 295 - /* Mask DSP to PC interrupt */ 296 - MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl); 297 - 298 - rHBridgeControl.EnableDspInt = false; 299 - OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl)); 300 - spin_unlock_irqrestore(&dsp_lock, flags); 301 - 302 - /* Reset the core via the boot domain register */ 303 - rBootDomain.ResetCore = true; 304 - rBootDomain.Halt = true; 305 - rBootDomain.NMI = true; 306 - rBootDomain.Reserved = 0; 307 - 308 - WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain)); 309 - 310 - /* Reset all the chiplets and then reactivate them */ 311 - WriteMsaCfg(DSP_ChipReset, 0xFFFF); 312 - udelay(5); 313 - WriteMsaCfg(DSP_ChipReset, 314 - (unsigned short) (~pSettings->usChipletEnable)); 315 - 316 - return 0; 317 - } 318 - 319 - 320 - int dsp3780I_Run(struct dsp_3780i_config_settings *pSettings) 321 - { 322 - unsigned long flags; 323 - unsigned short usDspBaseIO = pSettings->usDspBaseIO; 324 - DSP_BOOT_DOMAIN rBootDomain; 325 - DSP_HBRIDGE_CONTROL rHBridgeControl; 326 - 327 - /* Transition the core to a running state */ 328 - rBootDomain.ResetCore = true; 329 - rBootDomain.Halt = false; 330 - rBootDomain.NMI = true; 331 - rBootDomain.Reserved = 0; 332 - WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain)); 333 - 334 - udelay(5); 335 - 336 - rBootDomain.ResetCore = false; 337 - WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain)); 338 - udelay(5); 339 - 340 - rBootDomain.NMI = false; 341 - WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain)); 342 - udelay(5); 343 - 344 - /* Enable DSP to PC interrupt */ 345 - spin_lock_irqsave(&dsp_lock, flags); 346 - MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl); 347 - rHBridgeControl.EnableDspInt = true; 348 - 349 - OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl)); 350 - spin_unlock_irqrestore(&dsp_lock, flags); 351 - 352 - return 0; 353 - } 354 - 355 - 356 - int dsp3780I_ReadDStore(unsigned short usDspBaseIO, void __user *pvBuffer, 357 - unsigned uCount, unsigned long ulDSPAddr) 358 - { 359 - unsigned long flags; 360 - unsigned short __user *pusBuffer = pvBuffer; 361 - unsigned short val; 362 - 363 - /* Set the initial MSA address. No adjustments need to be made to data store addresses */ 364 - spin_lock_irqsave(&dsp_lock, flags); 365 - OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr); 366 - OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16)); 367 - spin_unlock_irqrestore(&dsp_lock, flags); 368 - 369 - /* Transfer the memory block */ 370 - while (uCount-- != 0) { 371 - spin_lock_irqsave(&dsp_lock, flags); 372 - val = InWordDsp(DSP_MsaDataDSISHigh); 373 - spin_unlock_irqrestore(&dsp_lock, flags); 374 - if(put_user(val, pusBuffer++)) 375 - return -EFAULT; 376 - 377 - PaceMsaAccess(usDspBaseIO); 378 - } 379 - 380 - return 0; 381 - } 382 - 383 - int dsp3780I_ReadAndClearDStore(unsigned short usDspBaseIO, 384 - void __user *pvBuffer, unsigned uCount, 385 - unsigned long ulDSPAddr) 386 - { 387 - unsigned long flags; 388 - unsigned short __user *pusBuffer = pvBuffer; 389 - unsigned short val; 390 - 391 - /* Set the initial MSA address. No adjustments need to be made to data store addresses */ 392 - spin_lock_irqsave(&dsp_lock, flags); 393 - OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr); 394 - OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16)); 395 - spin_unlock_irqrestore(&dsp_lock, flags); 396 - 397 - /* Transfer the memory block */ 398 - while (uCount-- != 0) { 399 - spin_lock_irqsave(&dsp_lock, flags); 400 - val = InWordDsp(DSP_ReadAndClear); 401 - spin_unlock_irqrestore(&dsp_lock, flags); 402 - if(put_user(val, pusBuffer++)) 403 - return -EFAULT; 404 - 405 - PaceMsaAccess(usDspBaseIO); 406 - } 407 - 408 - return 0; 409 - } 410 - 411 - 412 - int dsp3780I_WriteDStore(unsigned short usDspBaseIO, void __user *pvBuffer, 413 - unsigned uCount, unsigned long ulDSPAddr) 414 - { 415 - unsigned long flags; 416 - unsigned short __user *pusBuffer = pvBuffer; 417 - 418 - /* Set the initial MSA address. No adjustments need to be made to data store addresses */ 419 - spin_lock_irqsave(&dsp_lock, flags); 420 - OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr); 421 - OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16)); 422 - spin_unlock_irqrestore(&dsp_lock, flags); 423 - 424 - /* Transfer the memory block */ 425 - while (uCount-- != 0) { 426 - unsigned short val; 427 - if(get_user(val, pusBuffer++)) 428 - return -EFAULT; 429 - spin_lock_irqsave(&dsp_lock, flags); 430 - OutWordDsp(DSP_MsaDataDSISHigh, val); 431 - spin_unlock_irqrestore(&dsp_lock, flags); 432 - 433 - PaceMsaAccess(usDspBaseIO); 434 - } 435 - 436 - return 0; 437 - } 438 - 439 - 440 - int dsp3780I_ReadIStore(unsigned short usDspBaseIO, void __user *pvBuffer, 441 - unsigned uCount, unsigned long ulDSPAddr) 442 - { 443 - unsigned long flags; 444 - unsigned short __user *pusBuffer = pvBuffer; 445 - 446 - /* 447 - * Set the initial MSA address. To convert from an instruction store 448 - * address to an MSA address 449 - * shift the address two bits to the left and set bit 22 450 - */ 451 - ulDSPAddr = (ulDSPAddr << 2) | (1 << 22); 452 - spin_lock_irqsave(&dsp_lock, flags); 453 - OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr); 454 - OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16)); 455 - spin_unlock_irqrestore(&dsp_lock, flags); 456 - 457 - /* Transfer the memory block */ 458 - while (uCount-- != 0) { 459 - unsigned short val_lo, val_hi; 460 - spin_lock_irqsave(&dsp_lock, flags); 461 - val_lo = InWordDsp(DSP_MsaDataISLow); 462 - val_hi = InWordDsp(DSP_MsaDataDSISHigh); 463 - spin_unlock_irqrestore(&dsp_lock, flags); 464 - if(put_user(val_lo, pusBuffer++)) 465 - return -EFAULT; 466 - if(put_user(val_hi, pusBuffer++)) 467 - return -EFAULT; 468 - 469 - PaceMsaAccess(usDspBaseIO); 470 - 471 - } 472 - 473 - return 0; 474 - } 475 - 476 - 477 - int dsp3780I_WriteIStore(unsigned short usDspBaseIO, void __user *pvBuffer, 478 - unsigned uCount, unsigned long ulDSPAddr) 479 - { 480 - unsigned long flags; 481 - unsigned short __user *pusBuffer = pvBuffer; 482 - 483 - /* 484 - * Set the initial MSA address. To convert from an instruction store 485 - * address to an MSA address 486 - * shift the address two bits to the left and set bit 22 487 - */ 488 - ulDSPAddr = (ulDSPAddr << 2) | (1 << 22); 489 - spin_lock_irqsave(&dsp_lock, flags); 490 - OutWordDsp(DSP_MsaAddrLow, (unsigned short) ulDSPAddr); 491 - OutWordDsp(DSP_MsaAddrHigh, (unsigned short) (ulDSPAddr >> 16)); 492 - spin_unlock_irqrestore(&dsp_lock, flags); 493 - 494 - /* Transfer the memory block */ 495 - while (uCount-- != 0) { 496 - unsigned short val_lo, val_hi; 497 - if(get_user(val_lo, pusBuffer++)) 498 - return -EFAULT; 499 - if(get_user(val_hi, pusBuffer++)) 500 - return -EFAULT; 501 - spin_lock_irqsave(&dsp_lock, flags); 502 - OutWordDsp(DSP_MsaDataISLow, val_lo); 503 - OutWordDsp(DSP_MsaDataDSISHigh, val_hi); 504 - spin_unlock_irqrestore(&dsp_lock, flags); 505 - 506 - PaceMsaAccess(usDspBaseIO); 507 - } 508 - 509 - return 0; 510 - } 511 - 512 - 513 - int dsp3780I_GetIPCSource(unsigned short usDspBaseIO, 514 - unsigned short *pusIPCSource) 515 - { 516 - unsigned long flags; 517 - DSP_HBRIDGE_CONTROL rHBridgeControl; 518 - 519 - /* 520 - * Disable DSP to PC interrupts, read the interrupt register, 521 - * clear the pending IPC bits, and reenable DSP to PC interrupts 522 - */ 523 - spin_lock_irqsave(&dsp_lock, flags); 524 - MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl); 525 - rHBridgeControl.EnableDspInt = false; 526 - OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl)); 527 - 528 - *pusIPCSource = InWordDsp(DSP_Interrupt); 529 - OutWordDsp(DSP_Interrupt, (unsigned short) ~(*pusIPCSource)); 530 - 531 - rHBridgeControl.EnableDspInt = true; 532 - OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl)); 533 - spin_unlock_irqrestore(&dsp_lock, flags); 534 - 535 - return 0; 536 - }

-358

drivers/char/mwave/3780i.h

··· 1 - /* 2 - * 3 - * 3780i.h -- declarations for 3780i.c 4 - * 5 - * 6 - * Written By: Mike Sullivan IBM Corporation 7 - * 8 - * Copyright (C) 1999 IBM Corporation 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * NO WARRANTY 21 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 - * solely responsible for determining the appropriateness of using and 26 - * distributing the Program and assumes all risks associated with its 27 - * exercise of rights under this Agreement, including but not limited to 28 - * the risks and costs of program errors, damage to or loss of data, 29 - * programs or equipment, and unavailability or interruption of operations. 30 - * 31 - * DISCLAIMER OF LIABILITY 32 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 - * 40 - * You should have received a copy of the GNU General Public License 41 - * along with this program; if not, write to the Free Software 42 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 43 - * 44 - * 45 - * 10/23/2000 - Alpha Release 46 - * First release to the public 47 - */ 48 - 49 - #ifndef _LINUX_3780I_H 50 - #define _LINUX_3780I_H 51 - 52 - #include <asm/io.h> 53 - 54 - /* DSP I/O port offsets and definitions */ 55 - #define DSP_IsaSlaveControl 0x0000 /* ISA slave control register */ 56 - #define DSP_IsaSlaveStatus 0x0001 /* ISA slave status register */ 57 - #define DSP_ConfigAddress 0x0002 /* General config address register */ 58 - #define DSP_ConfigData 0x0003 /* General config data register */ 59 - #define DSP_HBridgeControl 0x0002 /* HBridge control register */ 60 - #define DSP_MsaAddrLow 0x0004 /* MSP System Address, low word */ 61 - #define DSP_MsaAddrHigh 0x0006 /* MSP System Address, high word */ 62 - #define DSP_MsaDataDSISHigh 0x0008 /* MSA data register: d-store word or high byte of i-store */ 63 - #define DSP_MsaDataISLow 0x000A /* MSA data register: low word of i-store */ 64 - #define DSP_ReadAndClear 0x000C /* MSA read and clear data register */ 65 - #define DSP_Interrupt 0x000E /* Interrupt register (IPC source) */ 66 - 67 - typedef struct { 68 - unsigned char ClockControl:1; /* RW: Clock control: 0=normal, 1=stop 3780i clocks */ 69 - unsigned char SoftReset:1; /* RW: Soft reset 0=normal, 1=soft reset active */ 70 - unsigned char ConfigMode:1; /* RW: Configuration mode, 0=normal, 1=config mode */ 71 - unsigned short Reserved:13; /* 0: Reserved */ 72 - } DSP_ISA_SLAVE_CONTROL; 73 - 74 - 75 - typedef struct { 76 - unsigned short EnableDspInt:1; /* RW: Enable DSP to X86 ISA interrupt 0=mask it, 1=enable it */ 77 - unsigned short MemAutoInc:1; /* RW: Memory address auto increment, 0=disable, 1=enable */ 78 - unsigned short IoAutoInc:1; /* RW: I/O address auto increment, 0=disable, 1=enable */ 79 - unsigned short DiagnosticMode:1; /* RW: Disgnostic mode 0=nromal, 1=diagnostic mode */ 80 - unsigned short IsaPacingTimer:12; /* R: ISA access pacing timer: count of core cycles stolen */ 81 - } DSP_HBRIDGE_CONTROL; 82 - 83 - 84 - /* DSP register indexes used with the configuration register address (index) register */ 85 - #define DSP_UartCfg1Index 0x0003 /* UART config register 1 */ 86 - #define DSP_UartCfg2Index 0x0004 /* UART config register 2 */ 87 - #define DSP_HBridgeCfg1Index 0x0007 /* HBridge config register 1 */ 88 - #define DSP_HBridgeCfg2Index 0x0008 /* HBridge config register 2 */ 89 - #define DSP_BusMasterCfg1Index 0x0009 /* ISA bus master config register 1 */ 90 - #define DSP_BusMasterCfg2Index 0x000A /* ISA bus master config register 2 */ 91 - #define DSP_IsaProtCfgIndex 0x000F /* ISA protocol control register */ 92 - #define DSP_PowerMgCfgIndex 0x0010 /* Low poser suspend/resume enable */ 93 - #define DSP_HBusTimerCfgIndex 0x0011 /* HBUS timer load value */ 94 - 95 - typedef struct { 96 - unsigned char IrqActiveLow:1; /* RW: IRQ active high or low: 0=high, 1=low */ 97 - unsigned char IrqPulse:1; /* RW: IRQ pulse or level: 0=level, 1=pulse */ 98 - unsigned char Irq:3; /* RW: IRQ selection */ 99 - unsigned char BaseIO:2; /* RW: Base I/O selection */ 100 - unsigned char Reserved:1; /* 0: Reserved */ 101 - } DSP_UART_CFG_1; 102 - 103 - typedef struct { 104 - unsigned char Enable:1; /* RW: Enable I/O and IRQ: 0=false, 1=true */ 105 - unsigned char Reserved:7; /* 0: Reserved */ 106 - } DSP_UART_CFG_2; 107 - 108 - typedef struct { 109 - unsigned char IrqActiveLow:1; /* RW: IRQ active high=0 or low=1 */ 110 - unsigned char IrqPulse:1; /* RW: IRQ pulse=1 or level=0 */ 111 - unsigned char Irq:3; /* RW: IRQ selection */ 112 - unsigned char AccessMode:1; /* RW: 16-bit register access method 0=byte, 1=word */ 113 - unsigned char Reserved:2; /* 0: Reserved */ 114 - } DSP_HBRIDGE_CFG_1; 115 - 116 - typedef struct { 117 - unsigned char Enable:1; /* RW: enable I/O and IRQ: 0=false, 1=true */ 118 - unsigned char Reserved:7; /* 0: Reserved */ 119 - } DSP_HBRIDGE_CFG_2; 120 - 121 - 122 - typedef struct { 123 - unsigned char Dma:3; /* RW: DMA channel selection */ 124 - unsigned char NumTransfers:2; /* RW: Maximum # of transfers once being granted the ISA bus */ 125 - unsigned char ReRequest:2; /* RW: Minimum delay between releasing the ISA bus and requesting it again */ 126 - unsigned char MEMCS16:1; /* RW: ISA signal MEMCS16: 0=disabled, 1=enabled */ 127 - } DSP_BUSMASTER_CFG_1; 128 - 129 - typedef struct { 130 - unsigned char IsaMemCmdWidth:2; /* RW: ISA memory command width */ 131 - unsigned char Reserved:6; /* 0: Reserved */ 132 - } DSP_BUSMASTER_CFG_2; 133 - 134 - 135 - typedef struct { 136 - unsigned char GateIOCHRDY:1; /* RW: Enable IOCHRDY gating: 0=false, 1=true */ 137 - unsigned char Reserved:7; /* 0: Reserved */ 138 - } DSP_ISA_PROT_CFG; 139 - 140 - typedef struct { 141 - unsigned char Enable:1; /* RW: Enable low power suspend/resume 0=false, 1=true */ 142 - unsigned char Reserved:7; /* 0: Reserved */ 143 - } DSP_POWER_MGMT_CFG; 144 - 145 - typedef struct { 146 - unsigned char LoadValue:8; /* RW: HBUS timer load value */ 147 - } DSP_HBUS_TIMER_CFG; 148 - 149 - 150 - 151 - /* DSP registers that exist in MSA I/O space */ 152 - #define DSP_ChipID 0x80000000 153 - #define DSP_MspBootDomain 0x80000580 154 - #define DSP_LBusTimeoutDisable 0x80000580 155 - #define DSP_ClockControl_1 0x8000058A 156 - #define DSP_ClockControl_2 0x8000058C 157 - #define DSP_ChipReset 0x80000588 158 - #define DSP_GpioModeControl_15_8 0x80000082 159 - #define DSP_GpioDriverEnable_15_8 0x80000076 160 - #define DSP_GpioOutputData_15_8 0x80000072 161 - 162 - typedef struct { 163 - unsigned short NMI:1; /* RW: non maskable interrupt */ 164 - unsigned short Halt:1; /* RW: Halt MSP clock */ 165 - unsigned short ResetCore:1; /* RW: Reset MSP core interface */ 166 - unsigned short Reserved:13; /* 0: Reserved */ 167 - } DSP_BOOT_DOMAIN; 168 - 169 - typedef struct { 170 - unsigned short DisableTimeout:1; /* RW: Disable LBus timeout */ 171 - unsigned short Reserved:15; /* 0: Reserved */ 172 - } DSP_LBUS_TIMEOUT_DISABLE; 173 - 174 - typedef struct { 175 - unsigned short Memory:1; /* RW: Reset memory interface */ 176 - unsigned short SerialPort1:1; /* RW: Reset serial port 1 interface */ 177 - unsigned short SerialPort2:1; /* RW: Reset serial port 2 interface */ 178 - unsigned short SerialPort3:1; /* RW: Reset serial port 3 interface */ 179 - unsigned short Gpio:1; /* RW: Reset GPIO interface */ 180 - unsigned short Dma:1; /* RW: Reset DMA interface */ 181 - unsigned short SoundBlaster:1; /* RW: Reset soundblaster interface */ 182 - unsigned short Uart:1; /* RW: Reset UART interface */ 183 - unsigned short Midi:1; /* RW: Reset MIDI interface */ 184 - unsigned short IsaMaster:1; /* RW: Reset ISA master interface */ 185 - unsigned short Reserved:6; /* 0: Reserved */ 186 - } DSP_CHIP_RESET; 187 - 188 - typedef struct { 189 - unsigned short N_Divisor:6; /* RW: (N) PLL output clock divisor */ 190 - unsigned short Reserved1:2; /* 0: reserved */ 191 - unsigned short M_Multiplier:6; /* RW: (M) PLL feedback clock multiplier */ 192 - unsigned short Reserved2:2; /* 0: reserved */ 193 - } DSP_CLOCK_CONTROL_1; 194 - 195 - typedef struct { 196 - unsigned short PllBypass:1; /* RW: PLL Bypass */ 197 - unsigned short Reserved:15; /* 0: Reserved */ 198 - } DSP_CLOCK_CONTROL_2; 199 - 200 - typedef struct { 201 - unsigned short Latch8:1; 202 - unsigned short Latch9:1; 203 - unsigned short Latch10:1; 204 - unsigned short Latch11:1; 205 - unsigned short Latch12:1; 206 - unsigned short Latch13:1; 207 - unsigned short Latch14:1; 208 - unsigned short Latch15:1; 209 - unsigned short Mask8:1; 210 - unsigned short Mask9:1; 211 - unsigned short Mask10:1; 212 - unsigned short Mask11:1; 213 - unsigned short Mask12:1; 214 - unsigned short Mask13:1; 215 - unsigned short Mask14:1; 216 - unsigned short Mask15:1; 217 - } DSP_GPIO_OUTPUT_DATA_15_8; 218 - 219 - typedef struct { 220 - unsigned short Enable8:1; 221 - unsigned short Enable9:1; 222 - unsigned short Enable10:1; 223 - unsigned short Enable11:1; 224 - unsigned short Enable12:1; 225 - unsigned short Enable13:1; 226 - unsigned short Enable14:1; 227 - unsigned short Enable15:1; 228 - unsigned short Mask8:1; 229 - unsigned short Mask9:1; 230 - unsigned short Mask10:1; 231 - unsigned short Mask11:1; 232 - unsigned short Mask12:1; 233 - unsigned short Mask13:1; 234 - unsigned short Mask14:1; 235 - unsigned short Mask15:1; 236 - } DSP_GPIO_DRIVER_ENABLE_15_8; 237 - 238 - typedef struct { 239 - unsigned short GpioMode8:2; 240 - unsigned short GpioMode9:2; 241 - unsigned short GpioMode10:2; 242 - unsigned short GpioMode11:2; 243 - unsigned short GpioMode12:2; 244 - unsigned short GpioMode13:2; 245 - unsigned short GpioMode14:2; 246 - unsigned short GpioMode15:2; 247 - } DSP_GPIO_MODE_15_8; 248 - 249 - /* Component masks that are defined in dspmgr.h */ 250 - #define MW_ADC_MASK 0x0001 251 - #define MW_AIC2_MASK 0x0006 252 - #define MW_MIDI_MASK 0x0008 253 - #define MW_CDDAC_MASK 0x8001 254 - #define MW_AIC1_MASK 0xE006 255 - #define MW_UART_MASK 0xE00A 256 - #define MW_ACI_MASK 0xE00B 257 - 258 - /* 259 - * Definition of 3780i configuration structure. Unless otherwise stated, 260 - * these values are provided as input to the 3780i support layer. At present, 261 - * the only values maintained by the 3780i support layer are the saved UART 262 - * registers. 263 - */ 264 - struct dsp_3780i_config_settings { 265 - 266 - /* Location of base configuration register */ 267 - unsigned short usBaseConfigIO; 268 - 269 - /* Enables for various DSP components */ 270 - int bDSPEnabled; 271 - int bModemEnabled; 272 - int bInterruptClaimed; 273 - 274 - /* IRQ, DMA, and Base I/O addresses for various DSP components */ 275 - unsigned short usDspIrq; 276 - unsigned short usDspDma; 277 - unsigned short usDspBaseIO; 278 - unsigned short usUartIrq; 279 - unsigned short usUartBaseIO; 280 - 281 - /* IRQ modes for various DSP components */ 282 - int bDspIrqActiveLow; 283 - int bUartIrqActiveLow; 284 - int bDspIrqPulse; 285 - int bUartIrqPulse; 286 - 287 - /* Card abilities */ 288 - unsigned uIps; 289 - unsigned uDStoreSize; 290 - unsigned uIStoreSize; 291 - unsigned uDmaBandwidth; 292 - 293 - /* Adapter specific 3780i settings */ 294 - unsigned short usNumTransfers; 295 - unsigned short usReRequest; 296 - int bEnableMEMCS16; 297 - unsigned short usIsaMemCmdWidth; 298 - int bGateIOCHRDY; 299 - int bEnablePwrMgmt; 300 - unsigned short usHBusTimerLoadValue; 301 - int bDisableLBusTimeout; 302 - unsigned short usN_Divisor; 303 - unsigned short usM_Multiplier; 304 - int bPllBypass; 305 - unsigned short usChipletEnable; /* Used with the chip reset register to enable specific chiplets */ 306 - 307 - /* Saved UART registers. These are maintained by the 3780i support layer. */ 308 - int bUartSaved; /* True after a successful save of the UART registers */ 309 - unsigned char ucIER; /* Interrupt enable register */ 310 - unsigned char ucFCR; /* FIFO control register */ 311 - unsigned char ucLCR; /* Line control register */ 312 - unsigned char ucMCR; /* Modem control register */ 313 - unsigned char ucSCR; /* Scratch register */ 314 - unsigned char ucDLL; /* Divisor latch, low byte */ 315 - unsigned char ucDLM; /* Divisor latch, high byte */ 316 - }; 317 - 318 - 319 - /* 3780i support functions */ 320 - int dsp3780I_EnableDSP(struct dsp_3780i_config_settings *pSettings, 321 - unsigned short *pIrqMap, 322 - unsigned short *pDmaMap); 323 - int dsp3780I_DisableDSP(struct dsp_3780i_config_settings *pSettings); 324 - int dsp3780I_Reset(struct dsp_3780i_config_settings *pSettings); 325 - int dsp3780I_Run(struct dsp_3780i_config_settings *pSettings); 326 - int dsp3780I_ReadDStore(unsigned short usDspBaseIO, void __user *pvBuffer, 327 - unsigned uCount, unsigned long ulDSPAddr); 328 - int dsp3780I_ReadAndClearDStore(unsigned short usDspBaseIO, 329 - void __user *pvBuffer, unsigned uCount, 330 - unsigned long ulDSPAddr); 331 - int dsp3780I_WriteDStore(unsigned short usDspBaseIO, void __user *pvBuffer, 332 - unsigned uCount, unsigned long ulDSPAddr); 333 - int dsp3780I_ReadIStore(unsigned short usDspBaseIO, void __user *pvBuffer, 334 - unsigned uCount, unsigned long ulDSPAddr); 335 - int dsp3780I_WriteIStore(unsigned short usDspBaseIO, void __user *pvBuffer, 336 - unsigned uCount, unsigned long ulDSPAddr); 337 - unsigned short dsp3780I_ReadMsaCfg(unsigned short usDspBaseIO, 338 - unsigned long ulMsaAddr); 339 - void dsp3780I_WriteMsaCfg(unsigned short usDspBaseIO, 340 - unsigned long ulMsaAddr, unsigned short usValue); 341 - int dsp3780I_GetIPCSource(unsigned short usDspBaseIO, 342 - unsigned short *pusIPCSource); 343 - 344 - /* I/O port access macros */ 345 - #define MKWORD(var) (*((unsigned short *)(&var))) 346 - #define MKBYTE(var) (*((unsigned char *)(&var))) 347 - 348 - #define WriteMsaCfg(addr,value) dsp3780I_WriteMsaCfg(usDspBaseIO,addr,value) 349 - #define ReadMsaCfg(addr) dsp3780I_ReadMsaCfg(usDspBaseIO,addr) 350 - #define WriteGenCfg(index,value) dsp3780I_WriteGenCfg(usDspBaseIO,index,value) 351 - #define ReadGenCfg(index) dsp3780I_ReadGenCfg(usDspBaseIO,index) 352 - 353 - #define InWordDsp(index) inw(usDspBaseIO+index) 354 - #define InByteDsp(index) inb(usDspBaseIO+index) 355 - #define OutWordDsp(index,value) outw(value,usDspBaseIO+index) 356 - #define OutByteDsp(index,value) outb(value,usDspBaseIO+index) 357 - 358 - #endif

-10

drivers/char/mwave/Makefile

··· 1 - # SPDX-License-Identifier: GPL-2.0-only 2 - # 3 - # Makefile for ACP Modem (Mwave). 4 - # 5 - # See the README file in this directory for more info. <paulsch@us.ibm.com> 6 - # 7 - 8 - obj-$(CONFIG_MWAVE) += mwave.o 9 - 10 - mwave-y := mwavedd.o smapi.o tp3780i.o 3780i.o

-37

drivers/char/mwave/README

··· 1 - Module options 2 - -------------- 3 - 4 - The mwave module takes the following options. Note that these options 5 - are not saved by the BIOS and so do not persist after unload and reload. 6 - 7 - mwave_3780i_irq=5/7/10/11/15 8 - If the dsp irq has not been setup and stored in bios by the 9 - thinkpad configuration utility then this parameter allows the 10 - irq used by the dsp to be configured. 11 - 12 - mwave_3780i_io=0x130/0x350/0x0070/0xDB0 13 - If the dsp io range has not been setup and stored in bios by the 14 - thinkpad configuration utility then this parameter allows the 15 - io range used by the dsp to be configured. 16 - 17 - mwave_uart_irq=3/4 18 - If the mwave's uart irq has not been setup and stored in bios by the 19 - thinkpad configuration utility then this parameter allows the 20 - irq used by the mwave uart to be configured. 21 - 22 - mwave_uart_io=0x3f8/0x2f8/0x3E8/0x2E8 23 - If the uart io range has not been setup and stored in bios by the 24 - thinkpad configuration utility then this parameter allows the 25 - io range used by the mwave uart to be configured. 26 - 27 - Example to enable the 3780i DSP using ttyS1 resources: 28 - 29 - insmod mwave mwave_3780i_irq=10 mwave_3780i_io=0x0130 mwave_uart_irq=3 mwave_uart_io=0x2f8 30 - 31 - Accessing the driver 32 - -------------------- 33 - 34 - You must also create a node for the driver: 35 - mkdir -p /dev/modems 36 - mknod --mode=660 /dev/modems/mwave c 10 219 37 -

-432

drivers/char/mwave/mwavedd.c

··· 1 - /* 2 - * 3 - * mwavedd.c -- mwave device driver 4 - * 5 - * 6 - * Written By: Mike Sullivan IBM Corporation 7 - * 8 - * Copyright (C) 1999 IBM Corporation 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * NO WARRANTY 21 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 - * solely responsible for determining the appropriateness of using and 26 - * distributing the Program and assumes all risks associated with its 27 - * exercise of rights under this Agreement, including but not limited to 28 - * the risks and costs of program errors, damage to or loss of data, 29 - * programs or equipment, and unavailability or interruption of operations. 30 - * 31 - * DISCLAIMER OF LIABILITY 32 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 - * 40 - * You should have received a copy of the GNU General Public License 41 - * along with this program; if not, write to the Free Software 42 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 43 - * 44 - * 45 - * 10/23/2000 - Alpha Release 46 - * First release to the public 47 - */ 48 - 49 - #define pr_fmt(fmt) "mwavedd: " fmt 50 - 51 - #include <linux/module.h> 52 - #include <linux/kernel.h> 53 - #include <linux/fs.h> 54 - #include <linux/init.h> 55 - #include <linux/major.h> 56 - #include <linux/miscdevice.h> 57 - #include <linux/device.h> 58 - #include <linux/serial.h> 59 - #include <linux/sched.h> 60 - #include <linux/spinlock.h> 61 - #include <linux/mutex.h> 62 - #include <linux/delay.h> 63 - #include <linux/serial_8250.h> 64 - #include <linux/nospec.h> 65 - #include "smapi.h" 66 - #include "mwavedd.h" 67 - #include "3780i.h" 68 - #include "tp3780i.h" 69 - 70 - MODULE_DESCRIPTION("3780i Advanced Communications Processor (Mwave) driver"); 71 - MODULE_AUTHOR("Mike Sullivan and Paul Schroeder"); 72 - MODULE_LICENSE("GPL"); 73 - 74 - /* 75 - * These parameters support the setting of MWave resources. Note that no 76 - * checks are made against other devices (ie. superio) for conflicts. 77 - * We'll depend on users using the tpctl utility to do that for now 78 - */ 79 - static DEFINE_MUTEX(mwave_mutex); 80 - int mwave_3780i_irq = 0; 81 - int mwave_3780i_io = 0; 82 - int mwave_uart_irq = 0; 83 - int mwave_uart_io = 0; 84 - module_param_hw(mwave_3780i_irq, int, irq, 0); 85 - module_param_hw(mwave_3780i_io, int, ioport, 0); 86 - module_param_hw(mwave_uart_irq, int, irq, 0); 87 - module_param_hw(mwave_uart_io, int, ioport, 0); 88 - 89 - struct mwave_device_data mwave_s_mdd; 90 - 91 - static long mwave_ioctl(struct file *file, unsigned int iocmd, 92 - unsigned long ioarg) 93 - { 94 - unsigned int retval = 0; 95 - struct mwave_device_data *pDrvData = &mwave_s_mdd; 96 - void __user *arg = (void __user *)ioarg; 97 - 98 - switch (iocmd) { 99 - 100 - case IOCTL_MW_RESET: 101 - mutex_lock(&mwave_mutex); 102 - retval = tp3780I_ResetDSP(&pDrvData->rBDData); 103 - mutex_unlock(&mwave_mutex); 104 - break; 105 - 106 - case IOCTL_MW_RUN: 107 - mutex_lock(&mwave_mutex); 108 - retval = tp3780I_StartDSP(&pDrvData->rBDData); 109 - mutex_unlock(&mwave_mutex); 110 - break; 111 - 112 - case IOCTL_MW_DSP_ABILITIES: { 113 - struct mw_abilities rAbilities; 114 - 115 - mutex_lock(&mwave_mutex); 116 - retval = tp3780I_QueryAbilities(&pDrvData->rBDData, 117 - &rAbilities); 118 - mutex_unlock(&mwave_mutex); 119 - if (retval == 0) { 120 - if (copy_to_user(arg, &rAbilities, sizeof(rAbilities))) 121 - return -EFAULT; 122 - } 123 - } 124 - break; 125 - 126 - case IOCTL_MW_READ_DATA: 127 - case IOCTL_MW_READCLEAR_DATA: { 128 - struct mw_readwrite rReadData; 129 - unsigned short __user *pusBuffer = NULL; 130 - 131 - if( copy_from_user(&rReadData, arg, 132 - sizeof(struct mw_readwrite)) ) 133 - return -EFAULT; 134 - pusBuffer = (unsigned short __user *) (rReadData.pBuf); 135 - 136 - mutex_lock(&mwave_mutex); 137 - retval = tp3780I_ReadWriteDspDStore(&pDrvData->rBDData, 138 - iocmd, 139 - pusBuffer, 140 - rReadData.ulDataLength, 141 - rReadData.usDspAddress); 142 - mutex_unlock(&mwave_mutex); 143 - } 144 - break; 145 - 146 - case IOCTL_MW_READ_INST: { 147 - struct mw_readwrite rReadData; 148 - unsigned short __user *pusBuffer = NULL; 149 - 150 - if (copy_from_user(&rReadData, arg, sizeof(rReadData))) 151 - return -EFAULT; 152 - pusBuffer = (unsigned short __user *) (rReadData.pBuf); 153 - 154 - mutex_lock(&mwave_mutex); 155 - retval = tp3780I_ReadWriteDspDStore(&pDrvData->rBDData, 156 - iocmd, pusBuffer, 157 - rReadData.ulDataLength / 2, 158 - rReadData.usDspAddress); 159 - mutex_unlock(&mwave_mutex); 160 - } 161 - break; 162 - 163 - case IOCTL_MW_WRITE_DATA: { 164 - struct mw_readwrite rWriteData; 165 - unsigned short __user *pusBuffer = NULL; 166 - 167 - if (copy_from_user(&rWriteData, arg, sizeof(rWriteData))) 168 - return -EFAULT; 169 - pusBuffer = (unsigned short __user *) (rWriteData.pBuf); 170 - 171 - mutex_lock(&mwave_mutex); 172 - retval = tp3780I_ReadWriteDspDStore(&pDrvData->rBDData, 173 - iocmd, pusBuffer, 174 - rWriteData.ulDataLength, 175 - rWriteData.usDspAddress); 176 - mutex_unlock(&mwave_mutex); 177 - } 178 - break; 179 - 180 - case IOCTL_MW_WRITE_INST: { 181 - struct mw_readwrite rWriteData; 182 - unsigned short __user *pusBuffer = NULL; 183 - 184 - if (copy_from_user(&rWriteData, arg, sizeof(rWriteData))) 185 - return -EFAULT; 186 - pusBuffer = (unsigned short __user *)(rWriteData.pBuf); 187 - 188 - mutex_lock(&mwave_mutex); 189 - retval = tp3780I_ReadWriteDspIStore(&pDrvData->rBDData, 190 - iocmd, pusBuffer, 191 - rWriteData.ulDataLength, 192 - rWriteData.usDspAddress); 193 - mutex_unlock(&mwave_mutex); 194 - } 195 - break; 196 - 197 - case IOCTL_MW_REGISTER_IPC: { 198 - unsigned int ipcnum = (unsigned int) ioarg; 199 - 200 - if (ipcnum >= ARRAY_SIZE(pDrvData->IPCs)) { 201 - pr_err("%s: IOCTL_MW_REGISTER_IPC: Error: Invalid ipcnum %x\n", 202 - __func__, ipcnum); 203 - return -EINVAL; 204 - } 205 - ipcnum = array_index_nospec(ipcnum, 206 - ARRAY_SIZE(pDrvData->IPCs)); 207 - 208 - mutex_lock(&mwave_mutex); 209 - pDrvData->IPCs[ipcnum].bIsHere = false; 210 - pDrvData->IPCs[ipcnum].bIsEnabled = true; 211 - mutex_unlock(&mwave_mutex); 212 - } 213 - break; 214 - 215 - case IOCTL_MW_GET_IPC: { 216 - unsigned int ipcnum = (unsigned int) ioarg; 217 - 218 - if (ipcnum >= ARRAY_SIZE(pDrvData->IPCs)) { 219 - pr_err("%s: IOCTL_MW_GET_IPC: Error: Invalid ipcnum %x\n", __func__, 220 - ipcnum); 221 - return -EINVAL; 222 - } 223 - ipcnum = array_index_nospec(ipcnum, 224 - ARRAY_SIZE(pDrvData->IPCs)); 225 - 226 - mutex_lock(&mwave_mutex); 227 - if (pDrvData->IPCs[ipcnum].bIsEnabled == true) { 228 - DECLARE_WAITQUEUE(wait, current); 229 - 230 - add_wait_queue(&pDrvData->IPCs[ipcnum].ipc_wait_queue, &wait); 231 - pDrvData->IPCs[ipcnum].bIsHere = true; 232 - set_current_state(TASK_INTERRUPTIBLE); 233 - /* check whether an event was signalled by */ 234 - /* the interrupt handler while we were gone */ 235 - if (pDrvData->IPCs[ipcnum].usIntCount == 1) { /* first int has occurred (race condition) */ 236 - pDrvData->IPCs[ipcnum].usIntCount = 2; /* first int has been handled */ 237 - } else { /* either 1st int has not yet occurred, or we have already handled the first int */ 238 - schedule(); 239 - if (pDrvData->IPCs[ipcnum].usIntCount == 1) { 240 - pDrvData->IPCs[ipcnum].usIntCount = 2; 241 - } 242 - } 243 - pDrvData->IPCs[ipcnum].bIsHere = false; 244 - remove_wait_queue(&pDrvData->IPCs[ipcnum].ipc_wait_queue, &wait); 245 - set_current_state(TASK_RUNNING); 246 - } 247 - mutex_unlock(&mwave_mutex); 248 - } 249 - break; 250 - 251 - case IOCTL_MW_UNREGISTER_IPC: { 252 - unsigned int ipcnum = (unsigned int) ioarg; 253 - 254 - if (ipcnum >= ARRAY_SIZE(pDrvData->IPCs)) { 255 - pr_err("%s: IOCTL_MW_UNREGISTER_IPC: Error: Invalid ipcnum %x\n", 256 - __func__, ipcnum); 257 - return -EINVAL; 258 - } 259 - ipcnum = array_index_nospec(ipcnum, 260 - ARRAY_SIZE(pDrvData->IPCs)); 261 - mutex_lock(&mwave_mutex); 262 - if (pDrvData->IPCs[ipcnum].bIsEnabled == true) { 263 - pDrvData->IPCs[ipcnum].bIsEnabled = false; 264 - if (pDrvData->IPCs[ipcnum].bIsHere == true) { 265 - wake_up_interruptible(&pDrvData->IPCs[ipcnum].ipc_wait_queue); 266 - } 267 - } 268 - mutex_unlock(&mwave_mutex); 269 - } 270 - break; 271 - 272 - default: 273 - return -ENOTTY; 274 - } /* switch */ 275 - 276 - return retval; 277 - } 278 - 279 - static int register_serial_portandirq(unsigned int port, int irq) 280 - { 281 - struct uart_8250_port uart; 282 - 283 - switch ( port ) { 284 - case 0x3f8: 285 - case 0x2f8: 286 - case 0x3e8: 287 - case 0x2e8: 288 - /* OK */ 289 - break; 290 - default: 291 - pr_err("%s: Error: Illegal port %x\n", __func__, port); 292 - return -1; 293 - } /* switch */ 294 - /* port is okay */ 295 - 296 - switch ( irq ) { 297 - case 3: 298 - case 4: 299 - case 5: 300 - case 7: 301 - /* OK */ 302 - break; 303 - default: 304 - pr_err("%s: Error: Illegal irq %x\n", __func__, irq); 305 - return -1; 306 - } /* switch */ 307 - /* irq is okay */ 308 - 309 - memset(&uart, 0, sizeof(uart)); 310 - 311 - uart.port.uartclk = 1843200; 312 - uart.port.iobase = port; 313 - uart.port.irq = irq; 314 - uart.port.iotype = UPIO_PORT; 315 - uart.port.flags = UPF_SHARE_IRQ; 316 - return serial8250_register_8250_port(&uart); 317 - } 318 - 319 - static const struct file_operations mwave_fops = { 320 - .owner = THIS_MODULE, 321 - .unlocked_ioctl = mwave_ioctl, 322 - .llseek = default_llseek, 323 - }; 324 - 325 - static struct miscdevice mwave_misc_dev = { MWAVE_MINOR, "mwave", &mwave_fops }; 326 - 327 - /* 328 - * mwave_init is called on module load 329 - * 330 - * mwave_exit is called on module unload 331 - * mwave_exit is also used to clean up after an aborted mwave_init 332 - */ 333 - static void mwave_exit(void) 334 - { 335 - struct mwave_device_data *pDrvData = &mwave_s_mdd; 336 - 337 - if ( pDrvData->sLine >= 0 ) { 338 - serial8250_unregister_port(pDrvData->sLine); 339 - } 340 - if (pDrvData->bMwaveDevRegistered) { 341 - misc_deregister(&mwave_misc_dev); 342 - } 343 - if (pDrvData->bDSPEnabled) { 344 - tp3780I_DisableDSP(&pDrvData->rBDData); 345 - } 346 - if (pDrvData->bResourcesClaimed) { 347 - tp3780I_ReleaseResources(&pDrvData->rBDData); 348 - } 349 - if (pDrvData->bBDInitialized) { 350 - tp3780I_Cleanup(&pDrvData->rBDData); 351 - } 352 - } 353 - 354 - module_exit(mwave_exit); 355 - 356 - static int __init mwave_init(void) 357 - { 358 - int i; 359 - int retval = 0; 360 - struct mwave_device_data *pDrvData = &mwave_s_mdd; 361 - 362 - memset(&mwave_s_mdd, 0, sizeof(mwave_s_mdd)); 363 - 364 - pDrvData->bBDInitialized = false; 365 - pDrvData->bResourcesClaimed = false; 366 - pDrvData->bDSPEnabled = false; 367 - pDrvData->bDSPReset = false; 368 - pDrvData->bMwaveDevRegistered = false; 369 - pDrvData->sLine = -1; 370 - 371 - for (i = 0; i < ARRAY_SIZE(pDrvData->IPCs); i++) { 372 - pDrvData->IPCs[i].bIsEnabled = false; 373 - pDrvData->IPCs[i].bIsHere = false; 374 - pDrvData->IPCs[i].usIntCount = 0; /* no ints received yet */ 375 - init_waitqueue_head(&pDrvData->IPCs[i].ipc_wait_queue); 376 - } 377 - 378 - retval = tp3780I_InitializeBoardData(&pDrvData->rBDData); 379 - if (retval) { 380 - pr_err("%s: Error: Failed to initialize board data\n", __func__); 381 - goto cleanup_error; 382 - } 383 - pDrvData->bBDInitialized = true; 384 - 385 - retval = tp3780I_CalcResources(&pDrvData->rBDData); 386 - if (retval) { 387 - pr_err("%s: Error: Failed to calculate resources\n", __func__); 388 - goto cleanup_error; 389 - } 390 - 391 - retval = tp3780I_ClaimResources(&pDrvData->rBDData); 392 - if (retval) { 393 - pr_err("%s: Error: Failed to claim resources\n", __func__); 394 - goto cleanup_error; 395 - } 396 - pDrvData->bResourcesClaimed = true; 397 - 398 - retval = tp3780I_EnableDSP(&pDrvData->rBDData); 399 - if (retval) { 400 - pr_err("%s: Error: Failed to enable DSP\n", __func__); 401 - goto cleanup_error; 402 - } 403 - pDrvData->bDSPEnabled = true; 404 - 405 - if (misc_register(&mwave_misc_dev) < 0) { 406 - pr_err("%s: Error: Failed to register misc device\n", __func__); 407 - goto cleanup_error; 408 - } 409 - pDrvData->bMwaveDevRegistered = true; 410 - 411 - pDrvData->sLine = register_serial_portandirq( 412 - pDrvData->rBDData.rDspSettings.usUartBaseIO, 413 - pDrvData->rBDData.rDspSettings.usUartIrq 414 - ); 415 - if (pDrvData->sLine < 0) { 416 - pr_err("%s: Error: Failed to register serial driver\n", __func__); 417 - goto cleanup_error; 418 - } 419 - /* uart is registered */ 420 - 421 - /* SUCCESS! */ 422 - return 0; 423 - 424 - cleanup_error: 425 - pr_err("%s: Error: Failed to initialize\n", __func__); 426 - mwave_exit(); /* clean up */ 427 - 428 - return -EIO; 429 - } 430 - 431 - module_init(mwave_init); 432 -

-90

drivers/char/mwave/mwavedd.h

··· 1 - /* 2 - * 3 - * mwavedd.h -- declarations for mwave device driver 4 - * 5 - * 6 - * Written By: Mike Sullivan IBM Corporation 7 - * 8 - * Copyright (C) 1999 IBM Corporation 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * NO WARRANTY 21 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 - * solely responsible for determining the appropriateness of using and 26 - * distributing the Program and assumes all risks associated with its 27 - * exercise of rights under this Agreement, including but not limited to 28 - * the risks and costs of program errors, damage to or loss of data, 29 - * programs or equipment, and unavailability or interruption of operations. 30 - * 31 - * DISCLAIMER OF LIABILITY 32 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 - * 40 - * You should have received a copy of the GNU General Public License 41 - * along with this program; if not, write to the Free Software 42 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 43 - * 44 - * 45 - * 10/23/2000 - Alpha Release 46 - * First release to the public 47 - */ 48 - 49 - #ifndef _LINUX_MWAVEDD_H 50 - #define _LINUX_MWAVEDD_H 51 - #include "3780i.h" 52 - #include "tp3780i.h" 53 - #include "smapi.h" 54 - #include "mwavepub.h" 55 - #include <linux/ioctl.h> 56 - #include <linux/uaccess.h> 57 - #include <linux/wait.h> 58 - 59 - extern int mwave_3780i_irq; 60 - extern int mwave_3780i_io; 61 - extern int mwave_uart_irq; 62 - extern int mwave_uart_io; 63 - 64 - struct mwave_ipc { 65 - unsigned short usIntCount; /* 0=none, 1=first, 2=greater than 1st */ 66 - bool bIsEnabled; 67 - bool bIsHere; 68 - /* entry spin lock */ 69 - wait_queue_head_t ipc_wait_queue; 70 - }; 71 - 72 - struct mwave_device_data { 73 - struct thinkpad_bd_data rBDData; /* board driver's data area */ 74 - unsigned long ulIPCSource_ISR; /* IPC source bits for recently processed intr, set during ISR processing */ 75 - unsigned long ulIPCSource_DPC; /* IPC source bits for recently processed intr, set during DPC processing */ 76 - bool bBDInitialized; 77 - bool bResourcesClaimed; 78 - bool bDSPEnabled; 79 - bool bDSPReset; 80 - struct mwave_ipc IPCs[16]; 81 - bool bMwaveDevRegistered; 82 - short sLine; 83 - int nr_registered_attrs; 84 - int device_registered; 85 - 86 - }; 87 - 88 - extern struct mwave_device_data mwave_s_mdd; 89 - 90 - #endif

-89

drivers/char/mwave/mwavepub.h

··· 1 - /* 2 - * 3 - * mwavepub.h -- PUBLIC declarations for the mwave driver 4 - * and applications using it 5 - * 6 - * 7 - * Written By: Mike Sullivan IBM Corporation 8 - * 9 - * Copyright (C) 1999 IBM Corporation 10 - * 11 - * This program is free software; you can redistribute it and/or modify 12 - * it under the terms of the GNU General Public License as published by 13 - * the Free Software Foundation; either version 2 of the License, or 14 - * (at your option) any later version. 15 - * 16 - * This program is distributed in the hope that it will be useful, 17 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 - * GNU General Public License for more details. 20 - * 21 - * NO WARRANTY 22 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 23 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 24 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 25 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 26 - * solely responsible for determining the appropriateness of using and 27 - * distributing the Program and assumes all risks associated with its 28 - * exercise of rights under this Agreement, including but not limited to 29 - * the risks and costs of program errors, damage to or loss of data, 30 - * programs or equipment, and unavailability or interruption of operations. 31 - * 32 - * DISCLAIMER OF LIABILITY 33 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 34 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 36 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 37 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 38 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 39 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 40 - * 41 - * You should have received a copy of the GNU General Public License 42 - * along with this program; if not, write to the Free Software 43 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 44 - * 45 - * 46 - * 10/23/2000 - Alpha Release 47 - * First release to the public 48 - */ 49 - 50 - #ifndef _LINUX_MWAVEPUB_H 51 - #define _LINUX_MWAVEPUB_H 52 - 53 - #include <linux/miscdevice.h> 54 - 55 - 56 - struct mw_abilities { 57 - unsigned long instr_per_sec; 58 - unsigned long data_size; 59 - unsigned long inst_size; 60 - unsigned long bus_dma_bw; 61 - unsigned short uart_enable; 62 - short component_count; 63 - unsigned long component_list[7]; 64 - char mwave_os_name[16]; 65 - char bios_task_name[16]; 66 - }; 67 - 68 - 69 - struct mw_readwrite { 70 - unsigned short usDspAddress; /* The dsp address */ 71 - unsigned long ulDataLength; /* The size in bytes of the data or user buffer */ 72 - void __user *pBuf; /* Input:variable sized buffer */ 73 - }; 74 - 75 - #define IOCTL_MW_RESET _IO(MWAVE_MINOR,1) 76 - #define IOCTL_MW_RUN _IO(MWAVE_MINOR,2) 77 - #define IOCTL_MW_DSP_ABILITIES _IOR(MWAVE_MINOR,3,struct mw_abilities) 78 - #define IOCTL_MW_READ_DATA _IOR(MWAVE_MINOR,4,struct mw_readwrite) 79 - #define IOCTL_MW_READCLEAR_DATA _IOR(MWAVE_MINOR,5,struct mw_readwrite) 80 - #define IOCTL_MW_READ_INST _IOR(MWAVE_MINOR,6,struct mw_readwrite) 81 - #define IOCTL_MW_WRITE_DATA _IOW(MWAVE_MINOR,7,struct mw_readwrite) 82 - #define IOCTL_MW_WRITE_INST _IOW(MWAVE_MINOR,8,struct mw_readwrite) 83 - #define IOCTL_MW_REGISTER_IPC _IOW(MWAVE_MINOR,9,int) 84 - #define IOCTL_MW_UNREGISTER_IPC _IOW(MWAVE_MINOR,10,int) 85 - #define IOCTL_MW_GET_IPC _IOW(MWAVE_MINOR,11,int) 86 - #define IOCTL_MW_TRACE _IOR(MWAVE_MINOR,12,struct mw_readwrite) 87 - 88 - 89 - #endif

-404

drivers/char/mwave/smapi.c

··· 1 - /* 2 - * 3 - * smapi.c -- SMAPI interface routines 4 - * 5 - * 6 - * Written By: Mike Sullivan IBM Corporation 7 - * 8 - * Copyright (C) 1999 IBM Corporation 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * NO WARRANTY 21 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 - * solely responsible for determining the appropriateness of using and 26 - * distributing the Program and assumes all risks associated with its 27 - * exercise of rights under this Agreement, including but not limited to 28 - * the risks and costs of program errors, damage to or loss of data, 29 - * programs or equipment, and unavailability or interruption of operations. 30 - * 31 - * DISCLAIMER OF LIABILITY 32 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 - * 40 - * You should have received a copy of the GNU General Public License 41 - * along with this program; if not, write to the Free Software 42 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 43 - * 44 - * 45 - * 10/23/2000 - Alpha Release 46 - * First release to the public 47 - */ 48 - 49 - #define pr_fmt(fmt) "smapi: " fmt 50 - 51 - #include <linux/kernel.h> 52 - #include <linux/mc146818rtc.h> /* CMOS defines */ 53 - #include "smapi.h" 54 - #include "mwavedd.h" 55 - 56 - static unsigned short g_usSmapiPort = 0; 57 - 58 - 59 - static int smapi_request(unsigned short inBX, unsigned short inCX, 60 - unsigned short inDI, unsigned short inSI, 61 - unsigned short *outAX, unsigned short *outBX, 62 - unsigned short *outCX, unsigned short *outDX, 63 - unsigned short *outDI, unsigned short *outSI) 64 - { 65 - unsigned short myoutAX = 2, *pmyoutAX = &myoutAX; 66 - unsigned short myoutBX = 3, *pmyoutBX = &myoutBX; 67 - unsigned short myoutCX = 4, *pmyoutCX = &myoutCX; 68 - unsigned short myoutDX = 5, *pmyoutDX = &myoutDX; 69 - unsigned short myoutDI = 6, *pmyoutDI = &myoutDI; 70 - unsigned short myoutSI = 7, *pmyoutSI = &myoutSI; 71 - unsigned short usSmapiOK = -EIO, *pusSmapiOK = &usSmapiOK; 72 - unsigned int inBXCX = (inBX << 16) | inCX; 73 - unsigned int inDISI = (inDI << 16) | inSI; 74 - 75 - __asm__ __volatile__("movw $0x5380,%%ax\n\t" 76 - "movl %7,%%ebx\n\t" 77 - "shrl $16, %%ebx\n\t" 78 - "movw %7,%%cx\n\t" 79 - "movl %8,%%edi\n\t" 80 - "shrl $16,%%edi\n\t" 81 - "movw %8,%%si\n\t" 82 - "movw %9,%%dx\n\t" 83 - "out %%al,%%dx\n\t" 84 - "out %%al,$0x4F\n\t" 85 - "cmpb $0x53,%%ah\n\t" 86 - "je 2f\n\t" 87 - "1:\n\t" 88 - "orb %%ah,%%ah\n\t" 89 - "jnz 2f\n\t" 90 - "movw %%ax,%0\n\t" 91 - "movw %%bx,%1\n\t" 92 - "movw %%cx,%2\n\t" 93 - "movw %%dx,%3\n\t" 94 - "movw %%di,%4\n\t" 95 - "movw %%si,%5\n\t" 96 - "movw $1,%6\n\t" 97 - "2:\n\t":"=m"(*(unsigned short *) pmyoutAX), 98 - "=m"(*(unsigned short *) pmyoutBX), 99 - "=m"(*(unsigned short *) pmyoutCX), 100 - "=m"(*(unsigned short *) pmyoutDX), 101 - "=m"(*(unsigned short *) pmyoutDI), 102 - "=m"(*(unsigned short *) pmyoutSI), 103 - "=m"(*(unsigned short *) pusSmapiOK) 104 - :"m"(inBXCX), "m"(inDISI), "m"(g_usSmapiPort) 105 - :"%eax", "%ebx", "%ecx", "%edx", "%edi", 106 - "%esi"); 107 - 108 - *outAX = myoutAX; 109 - *outBX = myoutBX; 110 - *outCX = myoutCX; 111 - *outDX = myoutDX; 112 - *outDI = myoutDI; 113 - *outSI = myoutSI; 114 - 115 - return usSmapiOK == 1 ? 0 : -EIO; 116 - } 117 - 118 - 119 - int smapi_query_DSP_cfg(struct smapi_dsp_settings *pSettings) 120 - { 121 - int bRC; 122 - unsigned short usAX, usBX, usCX, usDX, usDI, usSI; 123 - static const unsigned short ausDspBases[] = { 124 - 0x0030, 0x4E30, 0x8E30, 0xCE30, 125 - 0x0130, 0x0350, 0x0070, 0x0DB0 }; 126 - static const unsigned short ausUartBases[] = { 127 - 0x03F8, 0x02F8, 0x03E8, 0x02E8 }; 128 - 129 - bRC = smapi_request(0x1802, 0x0000, 0, 0, 130 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 131 - if (bRC) { 132 - pr_err("%s: Error: Could not get DSP Settings. Aborting.\n", __func__); 133 - return bRC; 134 - } 135 - 136 - pSettings->bDSPPresent = ((usBX & 0x0100) != 0); 137 - pSettings->bDSPEnabled = ((usCX & 0x0001) != 0); 138 - pSettings->usDspIRQ = usSI & 0x00FF; 139 - pSettings->usDspDMA = (usSI & 0xFF00) >> 8; 140 - if ((usDI & 0x00FF) < ARRAY_SIZE(ausDspBases)) { 141 - pSettings->usDspBaseIO = ausDspBases[usDI & 0x00FF]; 142 - } else { 143 - pSettings->usDspBaseIO = 0; 144 - } 145 - 146 - /* check for illegal values */ 147 - if ( pSettings->usDspBaseIO == 0 ) 148 - pr_err("%s: Worry: DSP base I/O address is 0\n", __func__); 149 - if ( pSettings->usDspIRQ == 0 ) 150 - pr_err("%s: Worry: DSP IRQ line is 0\n", __func__); 151 - 152 - bRC = smapi_request(0x1804, 0x0000, 0, 0, 153 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 154 - if (bRC) { 155 - pr_err("%s: Error: Could not get DSP modem settings. Aborting.\n", __func__); 156 - return bRC; 157 - } 158 - 159 - pSettings->bModemEnabled = ((usCX & 0x0001) != 0); 160 - pSettings->usUartIRQ = usSI & 0x000F; 161 - if (((usSI & 0xFF00) >> 8) < ARRAY_SIZE(ausUartBases)) { 162 - pSettings->usUartBaseIO = ausUartBases[(usSI & 0xFF00) >> 8]; 163 - } else { 164 - pSettings->usUartBaseIO = 0; 165 - } 166 - 167 - /* check for illegal values */ 168 - if ( pSettings->usUartBaseIO == 0 ) 169 - pr_err("%s: Worry: UART base I/O address is 0\n", __func__); 170 - if ( pSettings->usUartIRQ == 0 ) 171 - pr_err("%s: Worry: UART IRQ line is 0\n", __func__); 172 - 173 - return bRC; 174 - } 175 - 176 - 177 - int smapi_set_DSP_cfg(void) 178 - { 179 - int bRC = -EIO; 180 - int i; 181 - unsigned short usAX, usBX, usCX, usDX, usDI, usSI; 182 - static const unsigned short ausDspBases[] = { 183 - 0x0030, 0x4E30, 0x8E30, 0xCE30, 184 - 0x0130, 0x0350, 0x0070, 0x0DB0 }; 185 - static const unsigned short ausUartBases[] = { 186 - 0x03F8, 0x02F8, 0x03E8, 0x02E8 }; 187 - static const unsigned short ausDspIrqs[] = { 188 - 5, 7, 10, 11, 15 }; 189 - static const unsigned short ausUartIrqs[] = { 190 - 3, 4 }; 191 - 192 - unsigned short dspio_index = 0, uartio_index = 0; 193 - 194 - if (mwave_3780i_io) { 195 - for (i = 0; i < ARRAY_SIZE(ausDspBases); i++) { 196 - if (mwave_3780i_io == ausDspBases[i]) 197 - break; 198 - } 199 - if (i == ARRAY_SIZE(ausDspBases)) { 200 - pr_err("%s: Error: Invalid mwave_3780i_io address %x. Aborting.\n", 201 - __func__, mwave_3780i_io); 202 - return bRC; 203 - } 204 - dspio_index = i; 205 - } 206 - 207 - if (mwave_3780i_irq) { 208 - for (i = 0; i < ARRAY_SIZE(ausDspIrqs); i++) { 209 - if (mwave_3780i_irq == ausDspIrqs[i]) 210 - break; 211 - } 212 - if (i == ARRAY_SIZE(ausDspIrqs)) { 213 - pr_err("%s: Error: Invalid mwave_3780i_irq %x. Aborting.\n", __func__, 214 - mwave_3780i_irq); 215 - return bRC; 216 - } 217 - } 218 - 219 - if (mwave_uart_io) { 220 - for (i = 0; i < ARRAY_SIZE(ausUartBases); i++) { 221 - if (mwave_uart_io == ausUartBases[i]) 222 - break; 223 - } 224 - if (i == ARRAY_SIZE(ausUartBases)) { 225 - pr_err("%s: Error: Invalid mwave_uart_io address %x. Aborting.\n", __func__, 226 - mwave_uart_io); 227 - return bRC; 228 - } 229 - uartio_index = i; 230 - } 231 - 232 - 233 - if (mwave_uart_irq) { 234 - for (i = 0; i < ARRAY_SIZE(ausUartIrqs); i++) { 235 - if (mwave_uart_irq == ausUartIrqs[i]) 236 - break; 237 - } 238 - if (i == ARRAY_SIZE(ausUartIrqs)) { 239 - pr_err("%s: Error: Invalid mwave_uart_irq %x. Aborting.\n", __func__, 240 - mwave_uart_irq); 241 - return bRC; 242 - } 243 - } 244 - 245 - if (mwave_uart_irq || mwave_uart_io) { 246 - 247 - /* Check serial port A */ 248 - bRC = smapi_request(0x1402, 0x0000, 0, 0, 249 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 250 - if (bRC) goto exit_smapi_request_error; 251 - /* bRC == 0 */ 252 - if (usBX & 0x0100) { /* serial port A is present */ 253 - if (usCX & 1) { /* serial port is enabled */ 254 - if ((usSI & 0xFF) == mwave_uart_irq) { 255 - pr_err("%s: Serial port A irq %x conflicts with mwave_uart_irq %x\n", 256 - __func__, usSI & 0xFF, mwave_uart_irq); 257 - goto exit_conflict; 258 - } else { 259 - if ((usSI >> 8) == uartio_index) { 260 - pr_err("%s: Serial port A base I/O address %x conflicts with mwave uart I/O %x\n", 261 - __func__, ausUartBases[usSI >> 8], 262 - ausUartBases[uartio_index]); 263 - goto exit_conflict; 264 - } 265 - } 266 - } 267 - } 268 - 269 - /* Check serial port B */ 270 - bRC = smapi_request(0x1404, 0x0000, 0, 0, 271 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 272 - if (bRC) goto exit_smapi_request_error; 273 - /* bRC == 0 */ 274 - if (usBX & 0x0100) { /* serial port B is present */ 275 - if (usCX & 1) { /* serial port is enabled */ 276 - if ((usSI & 0xFF) == mwave_uart_irq) { 277 - pr_err("%s: Serial port B irq %x conflicts with mwave_uart_irq %x\n", 278 - __func__, usSI & 0xFF, mwave_uart_irq); 279 - goto exit_conflict; 280 - } else { 281 - if ((usSI >> 8) == uartio_index) { 282 - pr_err("%s: Serial port B base I/O address %x conflicts with mwave uart I/O %x\n", 283 - __func__, ausUartBases[usSI >> 8], 284 - ausUartBases[uartio_index]); 285 - goto exit_conflict; 286 - } 287 - } 288 - } 289 - } 290 - 291 - /* Check IR port */ 292 - bRC = smapi_request(0x1700, 0x0000, 0, 0, 293 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 294 - if (bRC) goto exit_smapi_request_error; 295 - bRC = smapi_request(0x1704, 0x0000, 0, 0, 296 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 297 - if (bRC) goto exit_smapi_request_error; 298 - /* bRC == 0 */ 299 - if ((usCX & 0xff) != 0xff) { /* IR port not disabled */ 300 - if ((usCX & 0xff) == mwave_uart_irq) { 301 - pr_err("%s: IR port irq %x conflicts with mwave_uart_irq %x\n", 302 - __func__, usCX & 0xff, mwave_uart_irq); 303 - goto exit_conflict; 304 - } else { 305 - if ((usSI & 0xff) == uartio_index) { 306 - pr_err("%s: IR port base I/O address %x conflicts with mwave uart I/O %x\n", 307 - __func__, ausUartBases[usSI & 0xff], 308 - ausUartBases[uartio_index]); 309 - goto exit_conflict; 310 - } 311 - } 312 - } 313 - } 314 - 315 - bRC = smapi_request(0x1802, 0x0000, 0, 0, 316 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 317 - if (bRC) goto exit_smapi_request_error; 318 - 319 - if (mwave_3780i_io) { 320 - usDI = dspio_index; 321 - } 322 - if (mwave_3780i_irq) { 323 - usSI = (usSI & 0xff00) | mwave_3780i_irq; 324 - } 325 - 326 - bRC = smapi_request(0x1803, 0x0101, usDI, usSI, 327 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 328 - if (bRC) goto exit_smapi_request_error; 329 - 330 - bRC = smapi_request(0x1804, 0x0000, 0, 0, 331 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 332 - if (bRC) goto exit_smapi_request_error; 333 - 334 - if (mwave_uart_io) { 335 - usSI = (usSI & 0x00ff) | (uartio_index << 8); 336 - } 337 - if (mwave_uart_irq) { 338 - usSI = (usSI & 0xff00) | mwave_uart_irq; 339 - } 340 - bRC = smapi_request(0x1805, 0x0101, 0, usSI, 341 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 342 - if (bRC) goto exit_smapi_request_error; 343 - 344 - bRC = smapi_request(0x1802, 0x0000, 0, 0, 345 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 346 - if (bRC) goto exit_smapi_request_error; 347 - 348 - bRC = smapi_request(0x1804, 0x0000, 0, 0, 349 - &usAX, &usBX, &usCX, &usDX, &usDI, &usSI); 350 - if (bRC) goto exit_smapi_request_error; 351 - 352 - /* normal exit: */ 353 - return 0; 354 - 355 - exit_conflict: 356 - /* Message has already been printed */ 357 - return -EIO; 358 - 359 - exit_smapi_request_error: 360 - pr_err("%s: exit on smapi_request error bRC %x\n", __func__, bRC); 361 - return bRC; 362 - } 363 - 364 - 365 - int smapi_set_DSP_power_state(bool bOn) 366 - { 367 - unsigned short usAX, usBX, usCX, usDX, usDI, usSI; 368 - unsigned short usPowerFunction; 369 - 370 - usPowerFunction = (bOn) ? 1 : 0; 371 - 372 - return smapi_request(0x4901, 0x0000, 0, usPowerFunction, &usAX, &usBX, &usCX, &usDX, &usDI, 373 - &usSI); 374 - } 375 - 376 - int smapi_init(void) 377 - { 378 - int retval = -EIO; 379 - unsigned short usSmapiID = 0; 380 - unsigned long flags; 381 - 382 - spin_lock_irqsave(&rtc_lock, flags); 383 - usSmapiID = CMOS_READ(0x7C); 384 - usSmapiID |= (CMOS_READ(0x7D) << 8); 385 - spin_unlock_irqrestore(&rtc_lock, flags); 386 - 387 - if (usSmapiID == 0x5349) { 388 - spin_lock_irqsave(&rtc_lock, flags); 389 - g_usSmapiPort = CMOS_READ(0x7E); 390 - g_usSmapiPort |= (CMOS_READ(0x7F) << 8); 391 - spin_unlock_irqrestore(&rtc_lock, flags); 392 - if (g_usSmapiPort == 0) { 393 - pr_err("%s: ERROR unable to read from SMAPI port\n", __func__); 394 - } else { 395 - retval = 0; 396 - //SmapiQuerySystemID(); 397 - } 398 - } else { 399 - pr_err("%s: ERROR invalid usSmapiID\n", __func__); 400 - retval = -ENXIO; 401 - } 402 - 403 - return retval; 404 - }

-76

drivers/char/mwave/smapi.h

··· 1 - /* 2 - * 3 - * smapi.h -- declarations for SMAPI interface routines 4 - * 5 - * 6 - * Written By: Mike Sullivan IBM Corporation 7 - * 8 - * Copyright (C) 1999 IBM Corporation 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * NO WARRANTY 21 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 - * solely responsible for determining the appropriateness of using and 26 - * distributing the Program and assumes all risks associated with its 27 - * exercise of rights under this Agreement, including but not limited to 28 - * the risks and costs of program errors, damage to or loss of data, 29 - * programs or equipment, and unavailability or interruption of operations. 30 - * 31 - * DISCLAIMER OF LIABILITY 32 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 - * 40 - * You should have received a copy of the GNU General Public License 41 - * along with this program; if not, write to the Free Software 42 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 43 - * 44 - * 45 - * 10/23/2000 - Alpha Release 46 - * First release to the public 47 - */ 48 - 49 - #ifndef _LINUX_SMAPI_H 50 - #define _LINUX_SMAPI_H 51 - 52 - struct smapi_dsp_settings { 53 - int bDSPPresent; 54 - int bDSPEnabled; 55 - int bModemEnabled; 56 - int bMIDIEnabled; 57 - int bSblstEnabled; 58 - unsigned short usDspIRQ; 59 - unsigned short usDspDMA; 60 - unsigned short usDspBaseIO; 61 - unsigned short usUartIRQ; 62 - unsigned short usUartBaseIO; 63 - unsigned short usMidiIRQ; 64 - unsigned short usMidiBaseIO; 65 - unsigned short usSndblstIRQ; 66 - unsigned short usSndblstDMA; 67 - unsigned short usSndblstBaseIO; 68 - }; 69 - 70 - int smapi_init(void); 71 - int smapi_query_DSP_cfg(struct smapi_dsp_settings *pSettings); 72 - int smapi_set_DSP_cfg(void); 73 - int smapi_set_DSP_power_state(bool bOn); 74 - 75 - 76 - #endif

-477

drivers/char/mwave/tp3780i.c

··· 1 - /* 2 - * 3 - * tp3780i.c -- board driver for 3780i on ThinkPads 4 - * 5 - * 6 - * Written By: Mike Sullivan IBM Corporation 7 - * 8 - * Copyright (C) 1999 IBM Corporation 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * NO WARRANTY 21 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 - * solely responsible for determining the appropriateness of using and 26 - * distributing the Program and assumes all risks associated with its 27 - * exercise of rights under this Agreement, including but not limited to 28 - * the risks and costs of program errors, damage to or loss of data, 29 - * programs or equipment, and unavailability or interruption of operations. 30 - * 31 - * DISCLAIMER OF LIABILITY 32 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 - * 40 - * You should have received a copy of the GNU General Public License 41 - * along with this program; if not, write to the Free Software 42 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 43 - * 44 - * 45 - * 10/23/2000 - Alpha Release 46 - * First release to the public 47 - */ 48 - 49 - #define pr_fmt(fmt) "tp3780i: " fmt 50 - 51 - #include <linux/interrupt.h> 52 - #include <linux/kernel.h> 53 - #include <linux/ptrace.h> 54 - #include <linux/ioport.h> 55 - #include <asm/io.h> 56 - #include "smapi.h" 57 - #include "mwavedd.h" 58 - #include "tp3780i.h" 59 - #include "3780i.h" 60 - #include "mwavepub.h" 61 - 62 - static unsigned short s_ausThinkpadIrqToField[16] = 63 - { 0xFFFF, 0xFFFF, 0xFFFF, 0x0001, 0x0002, 0x0003, 0xFFFF, 0x0004, 64 - 0xFFFF, 0xFFFF, 0x0005, 0x0006, 0xFFFF, 0xFFFF, 0xFFFF, 0x0007 }; 65 - static unsigned short s_ausThinkpadDmaToField[8] = 66 - { 0x0001, 0x0002, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0x0003, 0x0004 }; 67 - static unsigned short s_numIrqs = 16, s_numDmas = 8; 68 - 69 - 70 - static void EnableSRAM(struct thinkpad_bd_data *pBDData) 71 - { 72 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 73 - unsigned short usDspBaseIO = pSettings->usDspBaseIO; 74 - DSP_GPIO_OUTPUT_DATA_15_8 rGpioOutputData; 75 - DSP_GPIO_DRIVER_ENABLE_15_8 rGpioDriverEnable; 76 - DSP_GPIO_MODE_15_8 rGpioMode; 77 - 78 - MKWORD(rGpioMode) = ReadMsaCfg(DSP_GpioModeControl_15_8); 79 - rGpioMode.GpioMode10 = 0; 80 - WriteMsaCfg(DSP_GpioModeControl_15_8, MKWORD(rGpioMode)); 81 - 82 - MKWORD(rGpioDriverEnable) = 0; 83 - rGpioDriverEnable.Enable10 = true; 84 - rGpioDriverEnable.Mask10 = true; 85 - WriteMsaCfg(DSP_GpioDriverEnable_15_8, MKWORD(rGpioDriverEnable)); 86 - 87 - MKWORD(rGpioOutputData) = 0; 88 - rGpioOutputData.Latch10 = 0; 89 - rGpioOutputData.Mask10 = true; 90 - WriteMsaCfg(DSP_GpioOutputData_15_8, MKWORD(rGpioOutputData)); 91 - } 92 - 93 - 94 - static irqreturn_t UartInterrupt(int irq, void *dev_id) 95 - { 96 - return IRQ_HANDLED; 97 - } 98 - 99 - static irqreturn_t DspInterrupt(int irq, void *dev_id) 100 - { 101 - struct mwave_device_data *pDrvData = &mwave_s_mdd; 102 - struct dsp_3780i_config_settings *pSettings = &pDrvData->rBDData.rDspSettings; 103 - unsigned short usDspBaseIO = pSettings->usDspBaseIO; 104 - unsigned short usIPCSource = 0, usIsolationMask, usPCNum; 105 - 106 - if (dsp3780I_GetIPCSource(usDspBaseIO, &usIPCSource) == 0) { 107 - usIsolationMask = 1; 108 - for (usPCNum = 1; usPCNum <= 16; usPCNum++) { 109 - if (usIPCSource & usIsolationMask) { 110 - usIPCSource &= ~usIsolationMask; 111 - if (pDrvData->IPCs[usPCNum - 1].usIntCount == 0) { 112 - pDrvData->IPCs[usPCNum - 1].usIntCount = 1; 113 - } 114 - if (pDrvData->IPCs[usPCNum - 1].bIsEnabled == true) { 115 - wake_up_interruptible(&pDrvData->IPCs[usPCNum - 1].ipc_wait_queue); 116 - } 117 - } 118 - if (usIPCSource == 0) 119 - break; 120 - /* try next IPC */ 121 - usIsolationMask = usIsolationMask << 1; 122 - } 123 - } 124 - return IRQ_HANDLED; 125 - } 126 - 127 - 128 - int tp3780I_InitializeBoardData(struct thinkpad_bd_data *pBDData) 129 - { 130 - int retval = 0; 131 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 132 - 133 - pBDData->bDSPEnabled = false; 134 - pSettings->bInterruptClaimed = false; 135 - 136 - retval = smapi_init(); 137 - if (retval) { 138 - pr_err("%s: Error: SMAPI is not available on this machine\n", __func__); 139 - } else { 140 - if (mwave_3780i_irq || mwave_3780i_io || mwave_uart_irq || mwave_uart_io) { 141 - retval = smapi_set_DSP_cfg(); 142 - } 143 - } 144 - 145 - return retval; 146 - } 147 - 148 - void tp3780I_Cleanup(struct thinkpad_bd_data *pBDData) 149 - { 150 - } 151 - 152 - int tp3780I_CalcResources(struct thinkpad_bd_data *pBDData) 153 - { 154 - struct smapi_dsp_settings rSmapiInfo; 155 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 156 - 157 - if (smapi_query_DSP_cfg(&rSmapiInfo)) { 158 - pr_err("%s: Error: Could not query DSP config. Aborting.\n", __func__); 159 - return -EIO; 160 - } 161 - 162 - /* Sanity check */ 163 - if ( 164 - ( rSmapiInfo.usDspIRQ == 0 ) 165 - || ( rSmapiInfo.usDspBaseIO == 0 ) 166 - || ( rSmapiInfo.usUartIRQ == 0 ) 167 - || ( rSmapiInfo.usUartBaseIO == 0 ) 168 - ) { 169 - pr_err("%s: Error: Illegal resource setting. Aborting.\n", __func__); 170 - return -EIO; 171 - } 172 - 173 - pSettings->bDSPEnabled = (rSmapiInfo.bDSPEnabled && rSmapiInfo.bDSPPresent); 174 - pSettings->bModemEnabled = rSmapiInfo.bModemEnabled; 175 - pSettings->usDspIrq = rSmapiInfo.usDspIRQ; 176 - pSettings->usDspDma = rSmapiInfo.usDspDMA; 177 - pSettings->usDspBaseIO = rSmapiInfo.usDspBaseIO; 178 - pSettings->usUartIrq = rSmapiInfo.usUartIRQ; 179 - pSettings->usUartBaseIO = rSmapiInfo.usUartBaseIO; 180 - 181 - pSettings->uDStoreSize = TP_ABILITIES_DATA_SIZE; 182 - pSettings->uIStoreSize = TP_ABILITIES_INST_SIZE; 183 - pSettings->uIps = TP_ABILITIES_INTS_PER_SEC; 184 - 185 - if (pSettings->bDSPEnabled && pSettings->bModemEnabled && pSettings->usDspIrq == pSettings->usUartIrq) { 186 - pBDData->bShareDspIrq = pBDData->bShareUartIrq = 1; 187 - } else { 188 - pBDData->bShareDspIrq = pBDData->bShareUartIrq = 0; 189 - } 190 - 191 - return 0; 192 - } 193 - 194 - 195 - int tp3780I_ClaimResources(struct thinkpad_bd_data *pBDData) 196 - { 197 - int retval = 0; 198 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 199 - struct resource *pres; 200 - 201 - pres = request_region(pSettings->usDspBaseIO, 16, "mwave_3780i"); 202 - if ( pres == NULL ) retval = -EIO; 203 - 204 - if (retval) { 205 - pr_err("%s: Error: Could not claim I/O region starting at %x\n", __func__, 206 - pSettings->usDspBaseIO); 207 - return -EIO; 208 - } 209 - 210 - return retval; 211 - } 212 - 213 - int tp3780I_ReleaseResources(struct thinkpad_bd_data *pBDData) 214 - { 215 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 216 - 217 - release_region(pSettings->usDspBaseIO & (~3), 16); 218 - 219 - if (pSettings->bInterruptClaimed) { 220 - free_irq(pSettings->usDspIrq, NULL); 221 - pSettings->bInterruptClaimed = false; 222 - } 223 - 224 - return 0; 225 - } 226 - 227 - 228 - 229 - int tp3780I_EnableDSP(struct thinkpad_bd_data *pBDData) 230 - { 231 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 232 - bool bDSPPoweredUp = false, bInterruptAllocated = false; 233 - 234 - if (pBDData->bDSPEnabled) { 235 - pr_err("%s: Error: DSP already enabled!\n", __func__); 236 - goto exit_cleanup; 237 - } 238 - 239 - if (!pSettings->bDSPEnabled) { 240 - pr_err("%s: Error: pSettings->bDSPEnabled not set\n", __func__); 241 - goto exit_cleanup; 242 - } 243 - 244 - if ( 245 - (pSettings->usDspIrq >= s_numIrqs) 246 - || (pSettings->usDspDma >= s_numDmas) 247 - || (s_ausThinkpadIrqToField[pSettings->usDspIrq] == 0xFFFF) 248 - || (s_ausThinkpadDmaToField[pSettings->usDspDma] == 0xFFFF) 249 - ) { 250 - pr_err("%s: Error: invalid irq %x\n", __func__, pSettings->usDspIrq); 251 - goto exit_cleanup; 252 - } 253 - 254 - if ( 255 - ((pSettings->usDspBaseIO & 0xF00F) != 0) 256 - || (pSettings->usDspBaseIO & 0x0FF0) == 0 257 - ) { 258 - pr_err("%s: Error: Invalid DSP base I/O address %x\n", __func__, 259 - pSettings->usDspBaseIO); 260 - goto exit_cleanup; 261 - } 262 - 263 - if (pSettings->bModemEnabled) { 264 - if ( 265 - pSettings->usUartIrq >= s_numIrqs 266 - || s_ausThinkpadIrqToField[pSettings->usUartIrq] == 0xFFFF 267 - ) { 268 - pr_err("%s: Error: Invalid UART IRQ %x\n", __func__, pSettings->usUartIrq); 269 - goto exit_cleanup; 270 - } 271 - switch (pSettings->usUartBaseIO) { 272 - case 0x03F8: 273 - case 0x02F8: 274 - case 0x03E8: 275 - case 0x02E8: 276 - break; 277 - 278 - default: 279 - pr_err("%s: Error: Invalid UART base I/O address %x\n", __func__, 280 - pSettings->usUartBaseIO); 281 - goto exit_cleanup; 282 - } 283 - } 284 - 285 - pSettings->bDspIrqActiveLow = pSettings->bDspIrqPulse = true; 286 - pSettings->bUartIrqActiveLow = pSettings->bUartIrqPulse = true; 287 - 288 - if (pBDData->bShareDspIrq) { 289 - pSettings->bDspIrqActiveLow = false; 290 - } 291 - if (pBDData->bShareUartIrq) { 292 - pSettings->bUartIrqActiveLow = false; 293 - } 294 - 295 - pSettings->usNumTransfers = TP_CFG_NumTransfers; 296 - pSettings->usReRequest = TP_CFG_RerequestTimer; 297 - pSettings->bEnableMEMCS16 = TP_CFG_MEMCS16; 298 - pSettings->usIsaMemCmdWidth = TP_CFG_IsaMemCmdWidth; 299 - pSettings->bGateIOCHRDY = TP_CFG_GateIOCHRDY; 300 - pSettings->bEnablePwrMgmt = TP_CFG_EnablePwrMgmt; 301 - pSettings->usHBusTimerLoadValue = TP_CFG_HBusTimerValue; 302 - pSettings->bDisableLBusTimeout = TP_CFG_DisableLBusTimeout; 303 - pSettings->usN_Divisor = TP_CFG_N_Divisor; 304 - pSettings->usM_Multiplier = TP_CFG_M_Multiplier; 305 - pSettings->bPllBypass = TP_CFG_PllBypass; 306 - pSettings->usChipletEnable = TP_CFG_ChipletEnable; 307 - 308 - if (request_irq(pSettings->usUartIrq, &UartInterrupt, 0, "mwave_uart", NULL)) { 309 - pr_err("%s: Error: Could not get UART IRQ %x\n", __func__, pSettings->usUartIrq); 310 - goto exit_cleanup; 311 - } else { /* no conflict just release */ 312 - free_irq(pSettings->usUartIrq, NULL); 313 - } 314 - 315 - if (request_irq(pSettings->usDspIrq, &DspInterrupt, 0, "mwave_3780i", NULL)) { 316 - pr_err("%s: Error: Could not get 3780i IRQ %x\n", __func__, pSettings->usDspIrq); 317 - goto exit_cleanup; 318 - } else { 319 - bInterruptAllocated = true; 320 - pSettings->bInterruptClaimed = true; 321 - } 322 - 323 - smapi_set_DSP_power_state(false); 324 - if (smapi_set_DSP_power_state(true)) { 325 - pr_err("%s: Error: smapi_set_DSP_power_state(true) failed\n", __func__); 326 - goto exit_cleanup; 327 - } else { 328 - bDSPPoweredUp = true; 329 - } 330 - 331 - if (dsp3780I_EnableDSP(pSettings, s_ausThinkpadIrqToField, s_ausThinkpadDmaToField)) { 332 - pr_err("%s: Error: dsp7880I_EnableDSP() failed\n", __func__); 333 - goto exit_cleanup; 334 - } 335 - 336 - EnableSRAM(pBDData); 337 - 338 - pBDData->bDSPEnabled = true; 339 - 340 - return 0; 341 - 342 - exit_cleanup: 343 - pr_err("%s: Cleaning up\n", __func__); 344 - if (bDSPPoweredUp) 345 - smapi_set_DSP_power_state(false); 346 - if (bInterruptAllocated) { 347 - free_irq(pSettings->usDspIrq, NULL); 348 - pSettings->bInterruptClaimed = false; 349 - } 350 - return -EIO; 351 - } 352 - 353 - 354 - int tp3780I_DisableDSP(struct thinkpad_bd_data *pBDData) 355 - { 356 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 357 - 358 - if (pBDData->bDSPEnabled) { 359 - dsp3780I_DisableDSP(&pBDData->rDspSettings); 360 - if (pSettings->bInterruptClaimed) { 361 - free_irq(pSettings->usDspIrq, NULL); 362 - pSettings->bInterruptClaimed = false; 363 - } 364 - smapi_set_DSP_power_state(false); 365 - pBDData->bDSPEnabled = false; 366 - } 367 - 368 - return 0; 369 - } 370 - 371 - 372 - int tp3780I_ResetDSP(struct thinkpad_bd_data *pBDData) 373 - { 374 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 375 - 376 - if (dsp3780I_Reset(pSettings) == 0) { 377 - EnableSRAM(pBDData); 378 - return 0; 379 - } 380 - return -EIO; 381 - } 382 - 383 - 384 - int tp3780I_StartDSP(struct thinkpad_bd_data *pBDData) 385 - { 386 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 387 - 388 - if (dsp3780I_Run(pSettings) == 0) { 389 - // @BUG @TBD EnableSRAM(pBDData); 390 - } else { 391 - return -EIO; 392 - } 393 - 394 - return 0; 395 - } 396 - 397 - 398 - int tp3780I_QueryAbilities(struct thinkpad_bd_data *pBDData, struct mw_abilities *pAbilities) 399 - { 400 - memset(pAbilities, 0, sizeof(*pAbilities)); 401 - /* fill out standard constant fields */ 402 - pAbilities->instr_per_sec = pBDData->rDspSettings.uIps; 403 - pAbilities->data_size = pBDData->rDspSettings.uDStoreSize; 404 - pAbilities->inst_size = pBDData->rDspSettings.uIStoreSize; 405 - pAbilities->bus_dma_bw = pBDData->rDspSettings.uDmaBandwidth; 406 - 407 - /* fill out dynamically determined fields */ 408 - pAbilities->component_list[0] = 0x00010000 | MW_ADC_MASK; 409 - pAbilities->component_list[1] = 0x00010000 | MW_ACI_MASK; 410 - pAbilities->component_list[2] = 0x00010000 | MW_AIC1_MASK; 411 - pAbilities->component_list[3] = 0x00010000 | MW_AIC2_MASK; 412 - pAbilities->component_list[4] = 0x00010000 | MW_CDDAC_MASK; 413 - pAbilities->component_list[5] = 0x00010000 | MW_MIDI_MASK; 414 - pAbilities->component_list[6] = 0x00010000 | MW_UART_MASK; 415 - pAbilities->component_count = 7; 416 - 417 - /* Fill out Mwave OS and BIOS task names */ 418 - 419 - memcpy(pAbilities->mwave_os_name, TP_ABILITIES_MWAVEOS_NAME, 420 - sizeof(TP_ABILITIES_MWAVEOS_NAME)); 421 - memcpy(pAbilities->bios_task_name, TP_ABILITIES_BIOSTASK_NAME, 422 - sizeof(TP_ABILITIES_BIOSTASK_NAME)); 423 - 424 - return 0; 425 - } 426 - 427 - int tp3780I_ReadWriteDspDStore(struct thinkpad_bd_data *pBDData, unsigned int uOpcode, 428 - void __user *pvBuffer, unsigned int uCount, 429 - unsigned long ulDSPAddr) 430 - { 431 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 432 - unsigned short usDspBaseIO = pSettings->usDspBaseIO; 433 - bool bRC = 0; 434 - 435 - if (pBDData->bDSPEnabled) { 436 - switch (uOpcode) { 437 - case IOCTL_MW_READ_DATA: 438 - bRC = dsp3780I_ReadDStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); 439 - break; 440 - 441 - case IOCTL_MW_READCLEAR_DATA: 442 - bRC = dsp3780I_ReadAndClearDStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); 443 - break; 444 - 445 - case IOCTL_MW_WRITE_DATA: 446 - bRC = dsp3780I_WriteDStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); 447 - break; 448 - } 449 - } 450 - 451 - return bRC ? -EIO : 0; 452 - } 453 - 454 - 455 - int tp3780I_ReadWriteDspIStore(struct thinkpad_bd_data *pBDData, unsigned int uOpcode, 456 - void __user *pvBuffer, unsigned int uCount, 457 - unsigned long ulDSPAddr) 458 - { 459 - struct dsp_3780i_config_settings *pSettings = &pBDData->rDspSettings; 460 - unsigned short usDspBaseIO = pSettings->usDspBaseIO; 461 - bool bRC = 0; 462 - 463 - if (pBDData->bDSPEnabled) { 464 - switch (uOpcode) { 465 - case IOCTL_MW_READ_INST: 466 - bRC = dsp3780I_ReadIStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); 467 - break; 468 - 469 - case IOCTL_MW_WRITE_INST: 470 - bRC = dsp3780I_WriteIStore(usDspBaseIO, pvBuffer, uCount, ulDSPAddr); 471 - break; 472 - } 473 - } 474 - 475 - return bRC ? -EIO : 0; 476 - } 477 -

-103

drivers/char/mwave/tp3780i.h

··· 1 - /* 2 - * 3 - * tp3780i.h -- declarations for tp3780i.c 4 - * 5 - * 6 - * Written By: Mike Sullivan IBM Corporation 7 - * 8 - * Copyright (C) 1999 IBM Corporation 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * NO WARRANTY 21 - * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 - * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 - * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 - * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 - * solely responsible for determining the appropriateness of using and 26 - * distributing the Program and assumes all risks associated with its 27 - * exercise of rights under this Agreement, including but not limited to 28 - * the risks and costs of program errors, damage to or loss of data, 29 - * programs or equipment, and unavailability or interruption of operations. 30 - * 31 - * DISCLAIMER OF LIABILITY 32 - * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 - * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 - * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 - * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 - * 40 - * You should have received a copy of the GNU General Public License 41 - * along with this program; if not, write to the Free Software 42 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 43 - * 44 - * 45 - * 10/23/2000 - Alpha Release 46 - * First release to the public 47 - */ 48 - 49 - #ifndef _LINUX_TP3780I_H 50 - #define _LINUX_TP3780I_H 51 - 52 - #include <asm/io.h> 53 - #include "mwavepub.h" 54 - 55 - 56 - /* DSP abilities constants for 3780i based Thinkpads */ 57 - #define TP_ABILITIES_INTS_PER_SEC 39160800 58 - #define TP_ABILITIES_DATA_SIZE 32768 59 - #define TP_ABILITIES_INST_SIZE 32768 60 - #define TP_ABILITIES_MWAVEOS_NAME "mwaveos0700.dsp" 61 - #define TP_ABILITIES_BIOSTASK_NAME "mwbio701.dsp" 62 - 63 - 64 - /* DSP configuration values for 3780i based Thinkpads */ 65 - #define TP_CFG_NumTransfers 3 /* 16 transfers */ 66 - #define TP_CFG_RerequestTimer 1 /* 2 usec */ 67 - #define TP_CFG_MEMCS16 0 /* Disabled, 16-bit memory assumed */ 68 - #define TP_CFG_IsaMemCmdWidth 3 /* 295 nsec (16-bit) */ 69 - #define TP_CFG_GateIOCHRDY 0 /* No IOCHRDY gating */ 70 - #define TP_CFG_EnablePwrMgmt 1 /* Enable low poser suspend/resume */ 71 - #define TP_CFG_HBusTimerValue 255 /* HBus timer load value */ 72 - #define TP_CFG_DisableLBusTimeout 0 /* Enable LBus timeout */ 73 - #define TP_CFG_N_Divisor 32 /* Clock = 39.1608 Mhz */ 74 - #define TP_CFG_M_Multiplier 37 /* " */ 75 - #define TP_CFG_PllBypass 0 /* don't bypass */ 76 - #define TP_CFG_ChipletEnable 0xFFFF /* Enable all chiplets */ 77 - 78 - struct thinkpad_bd_data { 79 - int bDSPEnabled; 80 - int bShareDspIrq; 81 - int bShareUartIrq; 82 - struct dsp_3780i_config_settings rDspSettings; 83 - }; 84 - 85 - int tp3780I_InitializeBoardData(struct thinkpad_bd_data *pBDData); 86 - int tp3780I_CalcResources(struct thinkpad_bd_data *pBDData); 87 - int tp3780I_ClaimResources(struct thinkpad_bd_data *pBDData); 88 - int tp3780I_ReleaseResources(struct thinkpad_bd_data *pBDData); 89 - int tp3780I_EnableDSP(struct thinkpad_bd_data *pBDData); 90 - int tp3780I_DisableDSP(struct thinkpad_bd_data *pBDData); 91 - int tp3780I_ResetDSP(struct thinkpad_bd_data *pBDData); 92 - int tp3780I_StartDSP(struct thinkpad_bd_data *pBDData); 93 - int tp3780I_QueryAbilities(struct thinkpad_bd_data *pBDData, struct mw_abilities *pAbilities); 94 - void tp3780I_Cleanup(struct thinkpad_bd_data *pBDData); 95 - int tp3780I_ReadWriteDspDStore(struct thinkpad_bd_data *pBDData, unsigned int uOpcode, 96 - void __user *pvBuffer, unsigned int uCount, 97 - unsigned long ulDSPAddr); 98 - int tp3780I_ReadWriteDspIStore(struct thinkpad_bd_data *pBDData, unsigned int uOpcode, 99 - void __user *pvBuffer, unsigned int uCount, 100 - unsigned long ulDSPAddr); 101 - 102 - 103 - #endif

-1

include/linux/miscdevice.h

··· 52 52 #define PXA3XX_GCU_MINOR 197 53 53 #define TUN_MINOR 200 54 54 #define CUSE_MINOR 203 55 - #define MWAVE_MINOR 219 /* ACP/Mwave Modem */ 56 55 #define MPT_MINOR 220 57 56 #define MPT2SAS_MINOR 221 58 57 #define MPT3SAS_MINOR 222

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