Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'i2c-for-6.16-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"omap:
- add missing error check
- fix PM disable in probe error path
stm32:
- unmap DMA buffer on transfer failure
- use correct device when mapping and unmapping during transfers"
* tag 'i2c-for-6.16-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: stm32f7: unmap DMA mapped buffer
i2c: stm32: fix the device used for the DMA map
i2c: omap: Fix an error handling path in omap_i2c_probe()
i2c: omap: Handle omap_i2c_init() errors in omap_i2c_probe()
+17
-22
+5
-2
drivers/i2c/busses/i2c-omap.c
+5
-2
drivers/i2c/busses/i2c-omap.c
···
1472
1472
}
1473
1473
1474
1474
/* reset ASAP, clearing any IRQs */
1475
-
omap_i2c_init(omap);
1475
+
r = omap_i2c_init(omap);
1476
+
if (r)
1477
+
goto err_mux_state_deselect;
1476
1478
1477
1479
if (omap->rev < OMAP_I2C_OMAP1_REV_2)
1478
1480
r = devm_request_irq(&pdev->dev, omap->irq, omap_i2c_omap1_isr,
···
1517
1515
1518
1516
err_unuse_clocks:
1519
1517
omap_i2c_write_reg(omap, OMAP_I2C_CON_REG, 0);
1518
+
err_mux_state_deselect:
1520
1519
if (omap->mux_state)
1521
1520
mux_state_deselect(omap->mux_state);
1522
1521
err_put_pm:
1523
-
pm_runtime_dont_use_autosuspend(omap->dev);
1524
1522
pm_runtime_put_sync(omap->dev);
1525
1523
err_disable_pm:
1524
+
pm_runtime_dont_use_autosuspend(omap->dev);
1526
1525
pm_runtime_disable(&pdev->dev);
1527
1526
1528
1527
return r;
+3
-5
drivers/i2c/busses/i2c-stm32.c
+3
-5
drivers/i2c/busses/i2c-stm32.c
···
102
102
void *dma_async_param)
103
103
{
104
104
struct dma_async_tx_descriptor *txdesc;
105
-
struct device *chan_dev;
106
105
int ret;
107
106
108
107
if (rd_wr) {
···
115
116
}
116
117
117
118
dma->dma_len = len;
118
-
chan_dev = dma->chan_using->device->dev;
119
119
120
-
dma->dma_buf = dma_map_single(chan_dev, buf, dma->dma_len,
120
+
dma->dma_buf = dma_map_single(dev, buf, dma->dma_len,
121
121
dma->dma_data_dir);
122
-
if (dma_mapping_error(chan_dev, dma->dma_buf)) {
122
+
if (dma_mapping_error(dev, dma->dma_buf)) {
123
123
dev_err(dev, "DMA mapping failed\n");
124
124
return -EINVAL;
125
125
}
···
148
150
return 0;
149
151
150
152
err:
151
-
dma_unmap_single(chan_dev, dma->dma_buf, dma->dma_len,
153
+
dma_unmap_single(dev, dma->dma_buf, dma->dma_len,
152
154
dma->dma_data_dir);
153
155
return ret;
154
156
}
+9
-15
drivers/i2c/busses/i2c-stm32f7.c
+9
-15
drivers/i2c/busses/i2c-stm32f7.c
···
739
739
740
740
static void stm32f7_i2c_dma_callback(void *arg)
741
741
{
742
-
struct stm32f7_i2c_dev *i2c_dev = (struct stm32f7_i2c_dev *)arg;
742
+
struct stm32f7_i2c_dev *i2c_dev = arg;
743
743
struct stm32_i2c_dma *dma = i2c_dev->dma;
744
-
struct device *dev = dma->chan_using->device->dev;
745
744
746
745
stm32f7_i2c_disable_dma_req(i2c_dev);
747
-
dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir);
746
+
dmaengine_terminate_async(dma->chan_using);
747
+
dma_unmap_single(i2c_dev->dev, dma->dma_buf, dma->dma_len,
748
+
dma->dma_data_dir);
748
749
complete(&dma->dma_complete);
749
750
}
750
751
···
1511
1510
u16 addr = f7_msg->addr;
1512
1511
void __iomem *base = i2c_dev->base;
1513
1512
struct device *dev = i2c_dev->dev;
1514
-
struct stm32_i2c_dma *dma = i2c_dev->dma;
1515
1513
1516
1514
/* Bus error */
1517
1515
if (status & STM32F7_I2C_ISR_BERR) {
···
1551
1551
}
1552
1552
1553
1553
/* Disable dma */
1554
-
if (i2c_dev->use_dma) {
1555
-
stm32f7_i2c_disable_dma_req(i2c_dev);
1556
-
dmaengine_terminate_async(dma->chan_using);
1557
-
}
1554
+
if (i2c_dev->use_dma)
1555
+
stm32f7_i2c_dma_callback(i2c_dev);
1558
1556
1559
1557
i2c_dev->master_mode = false;
1560
1558
complete(&i2c_dev->complete);
···
1598
1600
{
1599
1601
struct stm32f7_i2c_dev *i2c_dev = data;
1600
1602
struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg;
1601
-
struct stm32_i2c_dma *dma = i2c_dev->dma;
1602
1603
void __iomem *base = i2c_dev->base;
1603
1604
u32 status, mask;
1604
1605
int ret;
···
1616
1619
dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n",
1617
1620
__func__, f7_msg->addr);
1618
1621
writel_relaxed(STM32F7_I2C_ICR_NACKCF, base + STM32F7_I2C_ICR);
1619
-
if (i2c_dev->use_dma) {
1620
-
stm32f7_i2c_disable_dma_req(i2c_dev);
1621
-
dmaengine_terminate_async(dma->chan_using);
1622
-
}
1622
+
if (i2c_dev->use_dma)
1623
+
stm32f7_i2c_dma_callback(i2c_dev);
1623
1624
f7_msg->result = -ENXIO;
1624
1625
}
1625
1626
···
1635
1640
ret = wait_for_completion_timeout(&i2c_dev->dma->dma_complete, HZ);
1636
1641
if (!ret) {
1637
1642
dev_dbg(i2c_dev->dev, "<%s>: Timed out\n", __func__);
1638
-
stm32f7_i2c_disable_dma_req(i2c_dev);
1639
-
dmaengine_terminate_async(dma->chan_using);
1643
+
stm32f7_i2c_dma_callback(i2c_dev);
1640
1644
f7_msg->result = -ETIMEDOUT;
1641
1645
}
1642
1646
}